igb: remove three redundant functions left in the code
Three functions were left in the code that are no longer used. I am removing these functions just to keep the code clean. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
This commit is contained in:
Alexander Duyck
Jeff Garzik
Родитель
549bdd84dc
Коммит
ec796b4ffc
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@ -1237,70 +1237,6 @@ out:
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return ret_val;
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}
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/**
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* igb_translate_register_82576 - Translate the proper register offset
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* @reg: e1000 register to be read
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*
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* Registers in 82576 are located in different offsets than other adapters
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* even though they function in the same manner. This function takes in
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* the name of the register to read and returns the correct offset for
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* 82576 silicon.
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**/
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u32 igb_translate_register_82576(u32 reg)
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{
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/*
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* Some of the 82576 registers are located at different
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* offsets than they are in older adapters.
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* Despite the difference in location, the registers
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* function in the same manner.
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*/
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switch (reg) {
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case E1000_TDBAL(0):
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reg = 0x0E000;
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break;
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case E1000_TDBAH(0):
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reg = 0x0E004;
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break;
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case E1000_TDLEN(0):
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reg = 0x0E008;
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break;
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case E1000_TDH(0):
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reg = 0x0E010;
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break;
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case E1000_TDT(0):
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reg = 0x0E018;
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break;
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case E1000_TXDCTL(0):
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reg = 0x0E028;
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break;
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case E1000_RDBAL(0):
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reg = 0x0C000;
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break;
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case E1000_RDBAH(0):
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reg = 0x0C004;
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break;
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case E1000_RDLEN(0):
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reg = 0x0C008;
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break;
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case E1000_RDH(0):
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reg = 0x0C010;
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break;
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case E1000_RDT(0):
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reg = 0x0C018;
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break;
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case E1000_RXDCTL(0):
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reg = 0x0C028;
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break;
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case E1000_SRRCTL(0):
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reg = 0x0C00C;
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break;
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default:
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break;
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}
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return reg;
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}
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/**
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* igb_reset_init_script_82575 - Inits HW defaults after reset
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* @hw: pointer to the HW structure
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@ -28,7 +28,6 @@
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#ifndef _E1000_82575_H_
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#define _E1000_82575_H_
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u32 igb_translate_register_82576(u32 reg);
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void igb_update_mc_addr_list_82575(struct e1000_hw*, u8*, u32, u32, u32);
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extern void igb_shutdown_fiber_serdes_link_82575(struct e1000_hw *hw);
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extern void igb_rx_fifo_flush_82575(struct e1000_hw *hw);
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@ -143,34 +143,6 @@ void igb_write_vfta(struct e1000_hw *hw, u32 offset, u32 value)
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wrfl();
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}
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/**
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* igb_init_rx_addrs - Initialize receive address's
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* @hw: pointer to the HW structure
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* @rar_count: receive address registers
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*
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* Setups the receive address registers by setting the base receive address
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* register to the devices MAC address and clearing all the other receive
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* address registers to 0.
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**/
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void igb_init_rx_addrs(struct e1000_hw *hw, u16 rar_count)
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{
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u32 i;
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/* Setup the receive address */
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hw_dbg("Programming MAC Address into RAR[0]\n");
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hw->mac.ops.rar_set(hw, hw->mac.addr, 0);
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/* Zero out the other (rar_entry_count - 1) receive addresses */
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hw_dbg("Clearing RAR[1-%u]\n", rar_count-1);
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for (i = 1; i < rar_count; i++) {
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array_wr32(E1000_RA, (i << 1), 0);
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wrfl();
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array_wr32(E1000_RA, ((i << 1) + 1), 0);
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wrfl();
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}
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}
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/**
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* igb_check_alt_mac_addr - Check for alternate MAC addr
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* @hw: pointer to the HW structure
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@ -296,60 +268,6 @@ void igb_mta_set(struct e1000_hw *hw, u32 hash_value)
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wrfl();
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}
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/**
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* igb_update_mc_addr_list - Update Multicast addresses
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* @hw: pointer to the HW structure
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* @mc_addr_list: array of multicast addresses to program
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* @mc_addr_count: number of multicast addresses to program
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* @rar_used_count: the first RAR register free to program
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* @rar_count: total number of supported Receive Address Registers
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*
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* Updates the Receive Address Registers and Multicast Table Array.
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* The caller must have a packed mc_addr_list of multicast addresses.
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* The parameter rar_count will usually be hw->mac.rar_entry_count
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* unless there are workarounds that change this.
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**/
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void igb_update_mc_addr_list(struct e1000_hw *hw,
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u8 *mc_addr_list, u32 mc_addr_count,
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u32 rar_used_count, u32 rar_count)
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{
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u32 hash_value;
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u32 i;
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/*
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* Load the first set of multicast addresses into the exact
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* filters (RAR). If there are not enough to fill the RAR
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* array, clear the filters.
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*/
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for (i = rar_used_count; i < rar_count; i++) {
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if (mc_addr_count) {
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hw->mac.ops.rar_set(hw, mc_addr_list, i);
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mc_addr_count--;
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mc_addr_list += ETH_ALEN;
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} else {
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array_wr32(E1000_RA, i << 1, 0);
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wrfl();
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array_wr32(E1000_RA, (i << 1) + 1, 0);
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wrfl();
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}
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}
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/* Clear the old settings from the MTA */
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hw_dbg("Clearing MTA\n");
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for (i = 0; i < hw->mac.mta_reg_count; i++) {
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array_wr32(E1000_MTA, i, 0);
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wrfl();
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}
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/* Load any remaining multicast addresses into the hash table. */
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for (; mc_addr_count > 0; mc_addr_count--) {
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hash_value = igb_hash_mc_addr(hw, mc_addr_list);
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hw_dbg("Hash value = 0x%03X\n", hash_value);
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igb_mta_set(hw, hash_value);
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mc_addr_list += ETH_ALEN;
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}
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}
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/**
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* igb_hash_mc_addr - Generate a multicast hash value
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* @hw: pointer to the HW structure
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@ -51,9 +51,6 @@ s32 igb_get_speed_and_duplex_copper(struct e1000_hw *hw, u16 *speed,
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u16 *duplex);
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s32 igb_id_led_init(struct e1000_hw *hw);
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s32 igb_led_off(struct e1000_hw *hw);
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void igb_update_mc_addr_list(struct e1000_hw *hw,
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u8 *mc_addr_list, u32 mc_addr_count,
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u32 rar_used_count, u32 rar_count);
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s32 igb_setup_link(struct e1000_hw *hw);
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s32 igb_validate_mdi_setting(struct e1000_hw *hw);
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s32 igb_write_8bit_ctrl_reg(struct e1000_hw *hw, u32 reg,
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@ -62,7 +59,6 @@ s32 igb_write_8bit_ctrl_reg(struct e1000_hw *hw, u32 reg,
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void igb_clear_hw_cntrs_base(struct e1000_hw *hw);
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void igb_clear_vfta(struct e1000_hw *hw);
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void igb_config_collision_dist(struct e1000_hw *hw);
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void igb_init_rx_addrs(struct e1000_hw *hw, u16 rar_count);
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void igb_mta_set(struct e1000_hw *hw, u32 hash_value);
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void igb_put_hw_semaphore(struct e1000_hw *hw);
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void igb_rar_set(struct e1000_hw *hw, u8 *addr, u32 index);
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@ -262,9 +262,6 @@
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#define E1000_RETA(_i) (0x05C00 + ((_i) * 4))
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#define E1000_RSSRK(_i) (0x05C80 + ((_i) * 4)) /* RSS Random Key - RW Array */
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#define E1000_REGISTER(a, reg) (((a)->mac.type < e1000_82576) \
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? reg : e1000_translate_register_82576(reg))
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#define wr32(reg, value) (writel(value, hw->hw_addr + reg))
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#define rd32(reg) (readl(hw->hw_addr + reg))
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#define wrfl() ((void)rd32(E1000_STATUS))
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