dt-bindings: clock: drop useless consumer example
Consumer examples in the bindings of resource providers are trivial, useless and duplication of code. Remove the example code for consumer Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20220316130858.93455-2-krzysztof.kozlowski@canonical.com Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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@ -61,16 +61,4 @@ examples:
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#clock-cells = <1>;
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};
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# Example UART controller node that consumes clock generated by the clock controller:
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- |
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uart0: serial@58018000 {
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compatible = "snps,dw-apb-uart";
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reg = <0x58018000 0x2000>;
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clocks = <&clk 45>, <&clk 46>;
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clock-names = "baudclk", "apb_pclk";
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interrupts = <0 9 4>;
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reg-shift = <2>;
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reg-io-width = <4>;
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};
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...
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@ -191,11 +191,4 @@ examples:
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};
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};
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/* Consumer referencing the 5P49V5923 pin OUT1 */
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consumer {
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/* ... */
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clocks = <&vc5 1>;
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/* ... */
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};
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...
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@ -40,12 +40,3 @@ examples:
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compatible = "fsl,imx1-ccm";
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reg = <0x0021b000 0x1000>;
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};
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pwm@208000 {
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#pwm-cells = <2>;
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compatible = "fsl,imx1-pwm";
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reg = <0x00208000 0x1000>;
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interrupts = <34>;
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clocks = <&clks IMX1_CLK_DUMMY>, <&clks IMX1_CLK_PER1>;
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clock-names = "ipg", "per";
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};
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@ -40,12 +40,3 @@ examples:
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reg = <0x10027000 0x800>;
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#clock-cells = <1>;
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};
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serial@1000a000 {
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compatible = "fsl,imx21-uart";
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reg = <0x1000a000 0x1000>;
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interrupts = <20>;
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clocks = <&clks IMX21_CLK_UART1_IPG_GATE>,
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<&clks IMX21_CLK_PER1>;
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clock-names = "ipg", "per";
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};
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@ -83,12 +83,3 @@ examples:
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reg = <0x80040000 0x2000>;
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#clock-cells = <1>;
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};
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serial@8006c000 {
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compatible = "fsl,imx23-auart";
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reg = <0x8006c000 0x2000>;
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interrupts = <24>;
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clocks = <&clks 32>;
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dmas = <&dma_apbx 6>, <&dma_apbx 7>;
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dma-names = "rx", "tx";
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};
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@ -176,11 +176,3 @@ examples:
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interrupts = <31>;
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#clock-cells = <1>;
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};
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serial@43f90000 {
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compatible = "fsl,imx25-uart", "fsl,imx21-uart";
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reg = <0x43f90000 0x4000>;
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interrupts = <45>;
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clocks = <&clks 79>, <&clks 50>;
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clock-names = "ipg", "per";
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};
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@ -44,12 +44,3 @@ examples:
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interrupts = <31>;
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#clock-cells = <1>;
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};
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serial@1000a000 {
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compatible = "fsl,imx27-uart", "fsl,imx21-uart";
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reg = <0x1000a000 0x1000>;
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interrupts = <20>;
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clocks = <&clks IMX27_CLK_UART1_IPG_GATE>,
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<&clks IMX27_CLK_PER1_GATE>;
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clock-names = "ipg", "per";
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};
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@ -106,12 +106,3 @@ examples:
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reg = <0x80040000 0x2000>;
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#clock-cells = <1>;
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};
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serial@8006a000 {
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compatible = "fsl,imx28-auart";
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reg = <0x8006a000 0x2000>;
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interrupts = <112>;
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dmas = <&dma_apbx 8>, <&dma_apbx 9>;
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dma-names = "rx", "tx";
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clocks = <&clks 45>;
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};
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@ -110,11 +110,3 @@ examples:
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interrupts = <31>, <53>;
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#clock-cells = <1>;
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};
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serial@43f90000 {
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compatible = "fsl,imx31-uart", "fsl,imx21-uart";
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reg = <0x43f90000 0x4000>;
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interrupts = <45>;
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clocks = <&clks 10>, <&clks 30>;
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clock-names = "ipg", "per";
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};
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@ -129,11 +129,3 @@ examples:
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interrupts = <31>;
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#clock-cells = <1>;
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};
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mmc@53fb4000 {
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compatible = "fsl,imx35-esdhc";
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reg = <0x53fb4000 0x4000>;
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interrupts = <7>;
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clocks = <&clks 9>, <&clks 8>, <&clks 43>;
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clock-names = "ipg", "ahb", "per";
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};
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@ -108,14 +108,3 @@ examples:
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"upll", "sosc_bus_clk", "firc_bus_clk",
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"rosc", "spll_bus_clk";
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};
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mmc@40380000 {
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compatible = "fsl,imx7ulp-usdhc";
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reg = <0x40380000 0x10000>;
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interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>,
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<&scg1 IMX7ULP_CLK_NIC1_DIV>,
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<&pcc2 IMX7ULP_CLK_USDHC1>;
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clock-names ="ipg", "ahb", "per";
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bus-width = <4>;
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};
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@ -86,14 +86,3 @@ examples:
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"firc", "upll";
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#clock-cells = <1>;
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};
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mmc@40380000 {
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compatible = "fsl,imx7ulp-usdhc";
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reg = <0x40380000 0x10000>;
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interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>,
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<&scg1 IMX7ULP_CLK_NIC1_DIV>,
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<&pcc2 IMX7ULP_CLK_USDHC1>;
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clock-names ="ipg", "ahb", "per";
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bus-width = <4>;
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};
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@ -101,14 +101,3 @@ examples:
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"sdhc0_lpcg_ahb_clk";
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power-domains = <&pd IMX_SC_R_SDHC_0>;
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};
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mmc@5b010000 {
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compatible = "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";
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interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0x5b010000 0x10000>;
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clocks = <&sdhc0_lpcg IMX_LPCG_CLK_4>,
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<&sdhc0_lpcg IMX_LPCG_CLK_5>,
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<&sdhc0_lpcg IMX_LPCG_CLK_0>;
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clock-names = "ipg", "ahb", "per";
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power-domains = <&pd IMX_SC_R_SDHC_0>;
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};
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@ -57,11 +57,3 @@ examples:
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clock-names = "osc";
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#clock-cells = <1>;
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};
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lpuart1: serial@40184000 {
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compatible = "fsl,imxrt1050-lpuart";
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reg = <0x40184000 0x4000>;
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interrupts = <20>;
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clocks = <&clks IMXRT1050_CLK_LPUART1>;
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clock-names = "ipg";
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};
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@ -106,10 +106,3 @@ examples:
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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usb-controller@c5004000 {
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compatible = "nvidia,tegra20-ehci";
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reg = <0xc5004000 0x4000>;
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clocks = <&car TEGRA124_CLK_USB2>;
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resets = <&car TEGRA124_CLK_USB2>;
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};
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@ -97,10 +97,3 @@ examples:
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power-domains = <&domain>;
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};
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};
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usb-controller@c5004000 {
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compatible = "nvidia,tegra20-ehci";
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reg = <0xc5004000 0x4000>;
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clocks = <&car TEGRA20_CLK_USB2>;
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resets = <&car TEGRA20_CLK_USB2>;
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};
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