Merge branch 'msm-core' into for-next
* msm-core: msm: Clean up useless ifdefs msm: clock: Add support for more proc_comm clocks msm: clock: Invert debugfs directory layout msm: clock: Move debugfs code from clock.c to clock-debug.c msm: clock: Remove 7x30 and pcom includes from clock.h msm: clock: Remove unused code and definitions msm: Warning fix in trout gpio board file msm: Remove broken register definition from trout
This commit is contained in:
Коммит
ecca8194c1
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@ -1,4 +1,7 @@
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obj-y += io.o idle.o timer.o
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ifdef CONFIG_MSM_PROC_COMM
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obj-$(CONFIG_DEBUG_FS) += clock-debug.o
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endif
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obj-$(CONFIG_MSM_VIC) += irq-vic.o
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@ -93,8 +93,6 @@ static void __init halibut_map_io(void)
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}
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MACHINE_START(HALIBUT, "Halibut Board (QCT SURF7200A)")
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#ifdef CONFIG_MSM_DEBUG_UART
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#endif
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.boot_params = 0x10000100,
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.fixup = halibut_fixup,
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.map_io = halibut_map_io,
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@ -74,8 +74,6 @@ static void __init mahimahi_map_io(void)
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extern struct sys_timer msm_timer;
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MACHINE_START(MAHIMAHI, "mahimahi")
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#ifdef CONFIG_MSM_DEBUG_UART
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#endif
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.boot_params = 0x20000100,
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.fixup = mahimahi_fixup,
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.map_io = mahimahi_map_io,
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@ -130,8 +130,6 @@ static void __init msm7x2x_map_io(void)
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}
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MACHINE_START(MSM7X27_SURF, "QCT MSM7x27 SURF")
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#ifdef CONFIG_MSM_DEBUG_UART
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#endif
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.boot_params = PHYS_OFFSET + 0x100,
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.map_io = msm7x2x_map_io,
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.init_irq = msm7x2x_init_irq,
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@ -140,8 +138,6 @@ MACHINE_START(MSM7X27_SURF, "QCT MSM7x27 SURF")
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MACHINE_END
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MACHINE_START(MSM7X27_FFA, "QCT MSM7x27 FFA")
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#ifdef CONFIG_MSM_DEBUG_UART
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#endif
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.boot_params = PHYS_OFFSET + 0x100,
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.map_io = msm7x2x_map_io,
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.init_irq = msm7x2x_init_irq,
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@ -150,8 +146,6 @@ MACHINE_START(MSM7X27_FFA, "QCT MSM7x27 FFA")
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MACHINE_END
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MACHINE_START(MSM7X25_SURF, "QCT MSM7x25 SURF")
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#ifdef CONFIG_MSM_DEBUG_UART
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#endif
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.boot_params = PHYS_OFFSET + 0x100,
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.map_io = msm7x2x_map_io,
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.init_irq = msm7x2x_init_irq,
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@ -160,8 +154,6 @@ MACHINE_START(MSM7X25_SURF, "QCT MSM7x25 SURF")
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MACHINE_END
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MACHINE_START(MSM7X25_FFA, "QCT MSM7x25 FFA")
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#ifdef CONFIG_MSM_DEBUG_UART
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#endif
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.boot_params = PHYS_OFFSET + 0x100,
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.map_io = msm7x2x_map_io,
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.init_irq = msm7x2x_init_irq,
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@ -105,8 +105,6 @@ static void __init msm7x30_map_io(void)
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}
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MACHINE_START(MSM7X30_SURF, "QCT MSM7X30 SURF")
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#ifdef CONFIG_MSM_DEBUG_UART
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#endif
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.boot_params = PHYS_OFFSET + 0x100,
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.map_io = msm7x30_map_io,
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.init_irq = msm7x30_init_irq,
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@ -115,8 +113,6 @@ MACHINE_START(MSM7X30_SURF, "QCT MSM7X30 SURF")
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MACHINE_END
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MACHINE_START(MSM7X30_FFA, "QCT MSM7X30 FFA")
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#ifdef CONFIG_MSM_DEBUG_UART
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#endif
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.boot_params = PHYS_OFFSET + 0x100,
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.map_io = msm7x30_map_io,
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.init_irq = msm7x30_init_irq,
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@ -125,8 +121,6 @@ MACHINE_START(MSM7X30_FFA, "QCT MSM7X30 FFA")
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MACHINE_END
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MACHINE_START(MSM7X30_FLUID, "QCT MSM7X30 FLUID")
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#ifdef CONFIG_MSM_DEBUG_UART
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#endif
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.boot_params = PHYS_OFFSET + 0x100,
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.map_io = msm7x30_map_io,
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.init_irq = msm7x30_init_irq,
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|
|
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@ -28,10 +28,6 @@
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#include <mach/board.h>
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#include <mach/msm_iomap.h>
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unsigned long clk_get_max_axi_khz(void)
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{
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return 0;
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}
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static void __init msm8x60_map_io(void)
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{
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|
|
|
@ -195,8 +195,6 @@ static void __init qsd8x50_init(void)
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}
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MACHINE_START(QSD8X50_SURF, "QCT QSD8X50 SURF")
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#ifdef CONFIG_MSM_DEBUG_UART
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#endif
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.boot_params = PHYS_OFFSET + 0x100,
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.map_io = qsd8x50_map_io,
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.init_irq = qsd8x50_init_irq,
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|
@ -205,8 +203,6 @@ MACHINE_START(QSD8X50_SURF, "QCT QSD8X50 SURF")
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MACHINE_END
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MACHINE_START(QSD8X50A_ST1_5, "QCT QSD8X50A ST1.5")
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#ifdef CONFIG_MSM_DEBUG_UART
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#endif
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.boot_params = PHYS_OFFSET + 0x100,
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.map_io = qsd8x50_map_io,
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.init_irq = qsd8x50_init_irq,
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|
|
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@ -105,8 +105,6 @@ static void __init sapphire_map_io(void)
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MACHINE_START(SAPPHIRE, "sapphire")
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/* Maintainer: Brian Swetland <swetland@google.com> */
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#ifdef CONFIG_MSM_DEBUG_UART
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#endif
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.boot_params = PHYS_OFFSET + 0x100,
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.fixup = sapphire_fixup,
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.map_io = sapphire_map_io,
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|
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@ -74,8 +74,6 @@ static int msm_gpiolib_direction_output(struct gpio_chip *chip,
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static int trout_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
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{
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struct msm_gpio_chip *msm_gpio = to_msm_gpio_chip(chip);
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return TROUT_GPIO_TO_INT(offset + chip->base);
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}
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|
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@ -92,8 +92,6 @@ static void __init trout_map_io(void)
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}
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MACHINE_START(TROUT, "HTC Dream")
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#ifdef CONFIG_MSM_DEBUG_UART
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#endif
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.boot_params = 0x10000100,
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.fixup = trout_fixup,
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.map_io = trout_map_io,
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|
|
@ -0,0 +1,131 @@
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/*
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* Copyright (C) 2007 Google, Inc.
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* Copyright (c) 2007-2010, Code Aurora Forum. All rights reserved.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/ctype.h>
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#include <linux/debugfs.h>
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#include <linux/clk.h>
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#include "clock.h"
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#include "clock-pcom.h"
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static int clock_debug_rate_set(void *data, u64 val)
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{
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struct clk *clock = data;
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int ret;
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/* Only increases to max rate will succeed, but that's actually good
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* for debugging purposes so we don't check for error. */
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if (clock->flags & CLK_MAX)
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clk_set_max_rate(clock, val);
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if (clock->flags & CLK_MIN)
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ret = clk_set_min_rate(clock, val);
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else
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ret = clk_set_rate(clock, val);
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if (ret != 0)
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printk(KERN_ERR "clk_set%s_rate failed (%d)\n",
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(clock->flags & CLK_MIN) ? "_min" : "", ret);
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return ret;
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}
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static int clock_debug_rate_get(void *data, u64 *val)
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{
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struct clk *clock = data;
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*val = clk_get_rate(clock);
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return 0;
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}
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DEFINE_SIMPLE_ATTRIBUTE(clock_rate_fops, clock_debug_rate_get,
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clock_debug_rate_set, "%llu\n");
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static int clock_debug_enable_set(void *data, u64 val)
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{
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struct clk *clock = data;
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int rc = 0;
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if (val)
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rc = clock->ops->enable(clock->id);
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else
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clock->ops->disable(clock->id);
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return rc;
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}
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static int clock_debug_enable_get(void *data, u64 *val)
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{
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struct clk *clock = data;
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*val = clock->ops->is_enabled(clock->id);
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return 0;
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}
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DEFINE_SIMPLE_ATTRIBUTE(clock_enable_fops, clock_debug_enable_get,
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clock_debug_enable_set, "%llu\n");
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static int clock_debug_local_get(void *data, u64 *val)
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{
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struct clk *clock = data;
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*val = clock->ops != &clk_ops_pcom;
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return 0;
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}
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DEFINE_SIMPLE_ATTRIBUTE(clock_local_fops, clock_debug_local_get,
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NULL, "%llu\n");
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static struct dentry *debugfs_base;
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int __init clock_debug_init(void)
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{
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debugfs_base = debugfs_create_dir("clk", NULL);
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if (!debugfs_base)
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return -ENOMEM;
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return 0;
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}
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int __init clock_debug_add(struct clk *clock)
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{
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char temp[50], *ptr;
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struct dentry *clk_dir;
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if (!debugfs_base)
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return -ENOMEM;
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strncpy(temp, clock->dbg_name, ARRAY_SIZE(temp)-1);
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for (ptr = temp; *ptr; ptr++)
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*ptr = tolower(*ptr);
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clk_dir = debugfs_create_dir(temp, debugfs_base);
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if (!clk_dir)
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return -ENOMEM;
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if (!debugfs_create_file("rate", S_IRUGO | S_IWUSR, clk_dir,
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clock, &clock_rate_fops))
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goto error;
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if (!debugfs_create_file("enable", S_IRUGO | S_IWUSR, clk_dir,
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clock, &clock_enable_fops))
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goto error;
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|
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if (!debugfs_create_file("is_local", S_IRUGO, clk_dir, clock,
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&clock_local_fops))
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goto error;
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return 0;
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error:
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debugfs_remove_recursive(clk_dir);
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return -ENOMEM;
|
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}
|
|
@ -20,6 +20,7 @@
|
|||
|
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#include "proc_comm.h"
|
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#include "clock.h"
|
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#include "clock-pcom.h"
|
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|
||||
/*
|
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* glue for the proc_comm interface
|
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|
|
|
@ -132,8 +132,10 @@
|
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#define P_CSI1_P_CLK 97
|
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#define P_GSBI_CLK 98
|
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#define P_GSBI_P_CLK 99
|
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#define P_CE_CLK 100 /* Crypto engine */
|
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#define P_CODEC_SSBI_CLK 101
|
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|
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#define P_NR_CLKS 100
|
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#define P_NR_CLKS 102
|
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|
||||
struct clk_ops;
|
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extern struct clk_ops clk_ops_pcom;
|
||||
|
|
|
@ -15,33 +15,19 @@
|
|||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/list.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/debugfs.h>
|
||||
#include <linux/ctype.h>
|
||||
#include <linux/pm_qos_params.h>
|
||||
#include <mach/clk.h>
|
||||
|
||||
#include "clock.h"
|
||||
#include "proc_comm.h"
|
||||
#include "clock-7x30.h"
|
||||
#include "clock-pcom.h"
|
||||
|
||||
static DEFINE_MUTEX(clocks_mutex);
|
||||
static DEFINE_SPINLOCK(clocks_lock);
|
||||
static LIST_HEAD(clocks);
|
||||
struct clk *msm_clocks;
|
||||
unsigned msm_num_clocks;
|
||||
|
||||
/*
|
||||
* Bitmap of enabled clocks, excluding ACPU which is always
|
||||
* enabled
|
||||
*/
|
||||
static DECLARE_BITMAP(clock_map_enabled, NR_CLKS);
|
||||
static DEFINE_SPINLOCK(clock_map_lock);
|
||||
|
||||
/*
|
||||
* Standard clock functions defined in include/linux/clk.h
|
||||
|
@ -77,12 +63,8 @@ int clk_enable(struct clk *clk)
|
|||
unsigned long flags;
|
||||
spin_lock_irqsave(&clocks_lock, flags);
|
||||
clk->count++;
|
||||
if (clk->count == 1) {
|
||||
if (clk->count == 1)
|
||||
clk->ops->enable(clk->id);
|
||||
spin_lock(&clock_map_lock);
|
||||
clock_map_enabled[BIT_WORD(clk->id)] |= BIT_MASK(clk->id);
|
||||
spin_unlock(&clock_map_lock);
|
||||
}
|
||||
spin_unlock_irqrestore(&clocks_lock, flags);
|
||||
return 0;
|
||||
}
|
||||
|
@ -94,12 +76,8 @@ void clk_disable(struct clk *clk)
|
|||
spin_lock_irqsave(&clocks_lock, flags);
|
||||
BUG_ON(clk->count == 0);
|
||||
clk->count--;
|
||||
if (clk->count == 0) {
|
||||
if (clk->count == 0)
|
||||
clk->ops->disable(clk->id);
|
||||
spin_lock(&clock_map_lock);
|
||||
clock_map_enabled[BIT_WORD(clk->id)] &= ~BIT_MASK(clk->id);
|
||||
spin_unlock(&clock_map_lock);
|
||||
}
|
||||
spin_unlock_irqrestore(&clocks_lock, flags);
|
||||
}
|
||||
EXPORT_SYMBOL(clk_disable);
|
||||
|
@ -196,13 +174,10 @@ void __init msm_clock_init(struct clk *clock_tbl, unsigned num_clocks)
|
|||
{
|
||||
unsigned n;
|
||||
|
||||
spin_lock_init(&clocks_lock);
|
||||
mutex_lock(&clocks_mutex);
|
||||
msm_clocks = clock_tbl;
|
||||
msm_num_clocks = num_clocks;
|
||||
for (n = 0; n < msm_num_clocks; n++) {
|
||||
set_clock_ops(&msm_clocks[n]);
|
||||
list_add_tail(&msm_clocks[n].list, &clocks);
|
||||
for (n = 0; n < num_clocks; n++) {
|
||||
set_clock_ops(&clock_tbl[n]);
|
||||
list_add_tail(&clock_tbl[n].list, &clocks);
|
||||
}
|
||||
mutex_unlock(&clocks_mutex);
|
||||
|
||||
|
@ -211,115 +186,6 @@ void __init msm_clock_init(struct clk *clock_tbl, unsigned num_clocks)
|
|||
|
||||
}
|
||||
|
||||
#if defined(CONFIG_DEBUG_FS)
|
||||
static struct clk *msm_clock_get_nth(unsigned index)
|
||||
{
|
||||
if (index < msm_num_clocks)
|
||||
return msm_clocks + index;
|
||||
else
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int clock_debug_rate_set(void *data, u64 val)
|
||||
{
|
||||
struct clk *clock = data;
|
||||
int ret;
|
||||
|
||||
/* Only increases to max rate will succeed, but that's actually good
|
||||
* for debugging purposes. So we don't check for error. */
|
||||
if (clock->flags & CLK_MAX)
|
||||
clk_set_max_rate(clock, val);
|
||||
if (clock->flags & CLK_MIN)
|
||||
ret = clk_set_min_rate(clock, val);
|
||||
else
|
||||
ret = clk_set_rate(clock, val);
|
||||
if (ret != 0)
|
||||
printk(KERN_ERR "clk_set%s_rate failed (%d)\n",
|
||||
(clock->flags & CLK_MIN) ? "_min" : "", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int clock_debug_rate_get(void *data, u64 *val)
|
||||
{
|
||||
struct clk *clock = data;
|
||||
*val = clk_get_rate(clock);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int clock_debug_enable_set(void *data, u64 val)
|
||||
{
|
||||
struct clk *clock = data;
|
||||
int rc = 0;
|
||||
|
||||
if (val)
|
||||
rc = clock->ops->enable(clock->id);
|
||||
else
|
||||
clock->ops->disable(clock->id);
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
static int clock_debug_enable_get(void *data, u64 *val)
|
||||
{
|
||||
struct clk *clock = data;
|
||||
|
||||
*val = clock->ops->is_enabled(clock->id);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int clock_debug_local_get(void *data, u64 *val)
|
||||
{
|
||||
struct clk *clock = data;
|
||||
|
||||
*val = clock->ops != &clk_ops_pcom;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
DEFINE_SIMPLE_ATTRIBUTE(clock_rate_fops, clock_debug_rate_get,
|
||||
clock_debug_rate_set, "%llu\n");
|
||||
DEFINE_SIMPLE_ATTRIBUTE(clock_enable_fops, clock_debug_enable_get,
|
||||
clock_debug_enable_set, "%llu\n");
|
||||
DEFINE_SIMPLE_ATTRIBUTE(clock_local_fops, clock_debug_local_get,
|
||||
NULL, "%llu\n");
|
||||
|
||||
static int __init clock_debug_init(void)
|
||||
{
|
||||
struct dentry *dent_rate, *dent_enable, *dent_local;
|
||||
struct clk *clock;
|
||||
unsigned n = 0;
|
||||
char temp[50], *ptr;
|
||||
|
||||
dent_rate = debugfs_create_dir("clk_rate", 0);
|
||||
if (IS_ERR(dent_rate))
|
||||
return PTR_ERR(dent_rate);
|
||||
|
||||
dent_enable = debugfs_create_dir("clk_enable", 0);
|
||||
if (IS_ERR(dent_enable))
|
||||
return PTR_ERR(dent_enable);
|
||||
|
||||
dent_local = debugfs_create_dir("clk_local", NULL);
|
||||
if (IS_ERR(dent_local))
|
||||
return PTR_ERR(dent_local);
|
||||
|
||||
while ((clock = msm_clock_get_nth(n++)) != 0) {
|
||||
strncpy(temp, clock->dbg_name, ARRAY_SIZE(temp)-1);
|
||||
for (ptr = temp; *ptr; ptr++)
|
||||
*ptr = tolower(*ptr);
|
||||
debugfs_create_file(temp, 0644, dent_rate,
|
||||
clock, &clock_rate_fops);
|
||||
debugfs_create_file(temp, 0644, dent_enable,
|
||||
clock, &clock_enable_fops);
|
||||
debugfs_create_file(temp, S_IRUGO, dent_local,
|
||||
clock, &clock_local_fops);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
device_initcall(clock_debug_init);
|
||||
#endif
|
||||
|
||||
/* The bootloader and/or AMSS may have left various clocks enabled.
|
||||
* Disable any clocks that belong to us (CLKFLAG_AUTO_OFF) but have
|
||||
* not been explicitly enabled by a clk_enable() call.
|
||||
|
@ -330,8 +196,10 @@ static int __init clock_late_init(void)
|
|||
struct clk *clk;
|
||||
unsigned count = 0;
|
||||
|
||||
clock_debug_init();
|
||||
mutex_lock(&clocks_mutex);
|
||||
list_for_each_entry(clk, &clocks, list) {
|
||||
clock_debug_add(clk);
|
||||
if (clk->flags & CLKFLAG_AUTO_OFF) {
|
||||
spin_lock_irqsave(&clocks_lock, flags);
|
||||
if (!clk->count) {
|
||||
|
|
|
@ -17,12 +17,10 @@
|
|||
#ifndef __ARCH_ARM_MACH_MSM_CLOCK_H
|
||||
#define __ARCH_ARM_MACH_MSM_CLOCK_H
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/list.h>
|
||||
#include <mach/clk.h>
|
||||
|
||||
#include "clock-pcom.h"
|
||||
#include "clock-7x30.h"
|
||||
|
||||
#define CLKFLAG_INVERT 0x00000001
|
||||
#define CLKFLAG_NOINVERT 0x00000002
|
||||
#define CLKFLAG_NONEST 0x00000004
|
||||
|
@ -59,51 +57,17 @@ struct clk {
|
|||
struct device *dev;
|
||||
};
|
||||
|
||||
#define A11S_CLK_CNTL_ADDR (MSM_CSR_BASE + 0x100)
|
||||
#define A11S_CLK_SEL_ADDR (MSM_CSR_BASE + 0x104)
|
||||
#define A11S_VDD_SVS_PLEVEL_ADDR (MSM_CSR_BASE + 0x124)
|
||||
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
#define CLOCK_DBG_NAME(x) .dbg_name = x,
|
||||
#else
|
||||
#define CLOCK_DBG_NAME(x)
|
||||
#endif
|
||||
|
||||
#define CLOCK(clk_name, clk_id, clk_dev, clk_flags) { \
|
||||
.name = clk_name, \
|
||||
.id = clk_id, \
|
||||
.flags = clk_flags, \
|
||||
.dev = clk_dev, \
|
||||
CLOCK_DBG_NAME(#clk_id) \
|
||||
}
|
||||
|
||||
#define OFF CLKFLAG_AUTO_OFF
|
||||
#define CLK_MIN CLKFLAG_MIN
|
||||
#define CLK_MAX CLKFLAG_MAX
|
||||
#define CLK_MINMAX (CLK_MIN | CLK_MAX)
|
||||
#define NR_CLKS P_NR_CLKS
|
||||
|
||||
enum {
|
||||
PLL_0 = 0,
|
||||
PLL_1,
|
||||
PLL_2,
|
||||
PLL_3,
|
||||
PLL_4,
|
||||
PLL_5,
|
||||
PLL_6,
|
||||
NUM_PLL
|
||||
};
|
||||
|
||||
enum clkvote_client {
|
||||
CLKVOTE_ACPUCLK = 0,
|
||||
CLKVOTE_PMQOS,
|
||||
CLKVOTE_MAX,
|
||||
};
|
||||
|
||||
int msm_clock_require_tcxo(unsigned long *reason, int nbits);
|
||||
int msm_clock_get_name(uint32_t id, char *name, uint32_t size);
|
||||
int ebi1_clk_set_min_rate(enum clkvote_client client, unsigned long rate);
|
||||
unsigned long clk_get_max_axi_khz(void);
|
||||
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
int __init clock_debug_init(void);
|
||||
int __init clock_debug_add(struct clk *clock);
|
||||
#else
|
||||
static inline int __init clock_debug_init(void) { return 0; }
|
||||
static inline int __init clock_debug_add(struct clk *clock) { return 0; }
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
|
@ -26,6 +26,7 @@
|
|||
|
||||
|
||||
#include "clock.h"
|
||||
#include "clock-pcom.h"
|
||||
#include <mach/mmc.h>
|
||||
|
||||
static struct resource resources_uart1[] = {
|
||||
|
|
|
@ -28,6 +28,7 @@
|
|||
#include <asm/mach/flash.h>
|
||||
|
||||
#include "clock-pcom.h"
|
||||
#include "clock-7x30.h"
|
||||
|
||||
#include <mach/mmc.h>
|
||||
|
||||
|
@ -133,6 +134,8 @@ struct clk msm_clocks_7x30[] = {
|
|||
CLK_PCOM("adsp_clk", ADSP_CLK, NULL, 0),
|
||||
CLK_PCOM("cam_m_clk", CAM_M_CLK, NULL, 0),
|
||||
CLK_PCOM("camif_pad_pclk", CAMIF_PAD_P_CLK, NULL, OFF),
|
||||
CLK_PCOM("ce_clk", CE_CLK, NULL, 0),
|
||||
CLK_PCOM("codec_ssbi_clk", CODEC_SSBI_CLK, NULL, 0),
|
||||
CLK_PCOM("ebi1_clk", EBI1_CLK, NULL, CLK_MIN),
|
||||
CLK_PCOM("ecodec_clk", ECODEC_CLK, NULL, 0),
|
||||
CLK_PCOM("emdh_clk", EMDH_CLK, NULL, OFF | CLK_MINMAX),
|
||||
|
|
|
@ -27,6 +27,7 @@
|
|||
#include <asm/mach/flash.h>
|
||||
|
||||
#include <mach/mmc.h>
|
||||
#include "clock-pcom.h"
|
||||
|
||||
static struct resource resources_uart3[] = {
|
||||
{
|
||||
|
@ -315,12 +316,14 @@ int __init msm_add_sdcc(unsigned int controller,
|
|||
|
||||
struct clk msm_clocks_8x50[] = {
|
||||
CLK_PCOM("adm_clk", ADM_CLK, NULL, 0),
|
||||
CLK_PCOM("ce_clk", CE_CLK, NULL, 0),
|
||||
CLK_PCOM("ebi1_clk", EBI1_CLK, NULL, CLK_MIN),
|
||||
CLK_PCOM("ebi2_clk", EBI2_CLK, NULL, 0),
|
||||
CLK_PCOM("ecodec_clk", ECODEC_CLK, NULL, 0),
|
||||
CLK_PCOM("emdh_clk", EMDH_CLK, NULL, OFF | CLK_MINMAX),
|
||||
CLK_PCOM("gp_clk", GP_CLK, NULL, 0),
|
||||
CLK_PCOM("grp_clk", GRP_3D_CLK, NULL, 0),
|
||||
CLK_PCOM("i2c_clk", I2C_CLK, NULL, 0),
|
||||
CLK_PCOM("icodec_rx_clk", ICODEC_RX_CLK, NULL, 0),
|
||||
CLK_PCOM("icodec_tx_clk", ICODEC_TX_CLK, NULL, 0),
|
||||
CLK_PCOM("imem_clk", IMEM_CLK, NULL, OFF),
|
||||
|
@ -346,7 +349,11 @@ struct clk msm_clocks_8x50[] = {
|
|||
CLK_PCOM("tsif_ref_clk", TSIF_REF_CLK, NULL, 0),
|
||||
CLK_PCOM("tv_dac_clk", TV_DAC_CLK, NULL, 0),
|
||||
CLK_PCOM("tv_enc_clk", TV_ENC_CLK, NULL, 0),
|
||||
CLK_PCOM("uart_clk", UART1_CLK, NULL, OFF),
|
||||
CLK_PCOM("uart_clk", UART2_CLK, NULL, 0),
|
||||
CLK_PCOM("uart_clk", UART3_CLK, &msm_device_uart3.dev, OFF),
|
||||
CLK_PCOM("uartdm_clk", UART1DM_CLK, NULL, OFF),
|
||||
CLK_PCOM("uartdm_clk", UART2DM_CLK, NULL, 0),
|
||||
CLK_PCOM("usb_hs_clk", USB_HS_CLK, NULL, OFF),
|
||||
CLK_PCOM("usb_hs_pclk", USB_HS_P_CLK, NULL, OFF),
|
||||
CLK_PCOM("usb_otg_clk", USB_OTG_CLK, NULL, 0),
|
||||
|
|
|
@ -126,10 +126,4 @@
|
|||
#define MSM_AD5_SIZE (SZ_1M*13)
|
||||
|
||||
|
||||
#if defined(CONFIG_ARCH_MSM7X30)
|
||||
#define MSM_GCC_BASE IOMEM(0xF8009000)
|
||||
#define MSM_GCC_PHYS 0xC0182000
|
||||
#define MSM_GCC_SIZE SZ_4K
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
|
@ -42,7 +42,6 @@
|
|||
static struct map_desc msm_io_desc[] __initdata = {
|
||||
MSM_DEVICE(VIC),
|
||||
MSM_CHIP_DEVICE(CSR, MSM7X00),
|
||||
MSM_DEVICE(GPT),
|
||||
MSM_DEVICE(DMOV),
|
||||
MSM_DEVICE(GPIO1),
|
||||
MSM_DEVICE(GPIO2),
|
||||
|
|
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