media: atomisp: remove unused hive_isp_css_host_ids_hrt.h
Nothing here is really used by the driver. So, let's just get rid of them. Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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@ -1,84 +0,0 @@
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/*
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* Support for Intel Camera Imaging ISP subsystem.
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* Copyright (c) 2015, Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef _hive_isp_css_host_ids_hrt_h_
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#define _hive_isp_css_host_ids_hrt_h_
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/* ISP_CSS identifiers */
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#define INP_SYS testbench_isp_inp_sys
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#define ISYS_GP_REGS testbench_isp_inp_sys_gpreg
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#define ISYS_IRQ_CTRL testbench_isp_inp_sys_irq_ctrl
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#define ISYS_CAP_A testbench_isp_inp_sys_capt_unit_a
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#define ISYS_CAP_B testbench_isp_inp_sys_capt_unit_b
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#define ISYS_CAP_C testbench_isp_inp_sys_capt_unit_c
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#define ISYS_INP_BUF testbench_isp_inp_sys_input_buffer
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#define ISYS_INP_CTRL testbench_isp_inp_sys_inp_ctrl
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#define ISYS_ACQ testbench_isp_inp_sys_acq_unit
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#define ISP testbench_isp_isp
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#define SP testbench_isp_scp
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#define IF_PRIM testbench_isp_ifmt_ift_prim
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#define IF_PRIM_B testbench_isp_ifmt_ift_prim_b
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#define IF_SEC testbench_isp_ifmt_ift_sec
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#define IF_SEC_MASTER testbench_isp_ifmt_ift_sec_mt_out
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#define STR_TO_MEM testbench_isp_ifmt_mem_cpy
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#define IFMT_GP_REGS testbench_isp_ifmt_gp_reg
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#define IFMT_IRQ_CTRL testbench_isp_ifmt_irq_ctrl
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#define CSS_RECEIVER testbench_isp_inp_sys_csi_receiver
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#define TC testbench_isp_gpd_tc
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#define GPTIMER testbench_isp_gpd_gptimer
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#define DMA testbench_isp_isp_dma
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#define GDC testbench_isp_gdc1
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#define GDC2 testbench_isp_gdc2
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#define IRQ_CTRL testbench_isp_gpd_irq_ctrl
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#define GPIO testbench_isp_gpd_c_gpio
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#define GP_REGS testbench_isp_gpd_gp_reg
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#define ISEL_GP_REGS testbench_isp_isel_gpr
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#define ISEL_IRQ_CTRL testbench_isp_isel_irq_ctrl
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#define DATA_MMU testbench_isp_data_out_sys_c_mmu
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#define ICACHE_MMU testbench_isp_icache_out_sys_c_mmu
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/* next is actually not FIFO but FIFO adapter, or slave to streaming adapter */
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#define ISP_SP_FIFO testbench_isp_fa_sp_isp
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#define ISEL_FIFO testbench_isp_isel_sf_fa_in
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#define FIFO_GPF_SP testbench_isp_sf_fa2sp_in
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#define FIFO_GPF_ISP testbench_isp_sf_fa2isp_in
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#define FIFO_SP_GPF testbench_isp_sf_sp2fa_in
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#define FIFO_ISP_GPF testbench_isp_sf_isp2fa_in
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#define DATA_OCP_MASTER testbench_isp_data_out_sys_cio2ocp_wide_data_out_mt
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#define ICACHE_OCP_MASTER testbench_isp_icache_out_sys_cio2ocp_wide_data_out_mt
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#define SP_IN_FIFO testbench_isp_sf_fa2sp_in
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#define SP_OUT_FIFO testbench_isp_sf_sp2fa_out
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#define ISP_IN_FIFO testbench_isp_sf_fa2isp_in
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#define ISP_OUT_FIFO testbench_isp_sf_isp2fa_out
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#define GEN_SHORT_PACK_PORT testbench_isp_inp_sys_csi_str_mon_fa_gensh_out
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#define ISYS_GP_REGS testbench_isp_inp_sys_gpreg
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/* Testbench identifiers */
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#define DDR testbench_ddram
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#define DDR_SMALL testbench_ddram_small
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#define XMEM DDR
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#define GPIO_ADAPTER testbench_gp_adapter
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#define SIG_MONITOR testbench_sig_mon
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#define DDR_SLAVE testbench_ddram_ip0
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#define DDR_SMALL_SLAVE testbench_ddram_small_ip0
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#define HOST_MASTER host_op0
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#endif /* _hive_isp_css_host_ids_hrt_h_ */
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@ -15,7 +15,6 @@
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#ifndef __PIXELGEN_PRIVATE_H_INCLUDED__
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#define __PIXELGEN_PRIVATE_H_INCLUDED__
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#include "pixelgen_public.h"
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#include "hive_isp_css_host_ids_hrt.h"
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#include "PixelGen_SysBlock_defs.h"
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#include "device_access.h" /* ia_css_device_load_uint32 */
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#include "assert_support.h" /* assert */
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#ifndef _PixelGen_SysBlock_defs_h
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#define _PixelGen_SysBlock_defs_h
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#ifdef ISYS2401_PXG_A
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#else
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#ifdef ISYS2401_PXG_B
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#else
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#ifdef ISYS2401_PXG_C
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#else
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#include <mipi_backend/hrt/include/mipi_backend_defs.h>
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#endif
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#endif
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#endif
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/* Parematers and User_Parameters for HSS */
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#define _PXG_PPC Ppc
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#define _PXG_PIXEL_BITS PixelWidth
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@ -1,118 +0,0 @@
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/*
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* Support for Intel Camera Imaging ISP subsystem.
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* Copyright (c) 2015, Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef _hive_isp_css_host_ids_hrt_h_
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#define _hive_isp_css_host_ids_hrt_h_
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/* ISP_CSS identifiers */
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#define INP_SYS testbench_isp_isp_css_part_is_2400_inp_sys
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#define ISYS_GP_REGS testbench_isp_isp_css_part_is_2400_inp_sys_gpreg
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#define ISYS_IRQ_CTRL testbench_isp_isp_css_part_is_2400_inp_sys_irq_ctrl
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#define ISYS_CAP_A testbench_isp_isp_css_part_is_2400_inp_sys_capt_unit_a
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#define ISYS_CAP_B testbench_isp_isp_css_part_is_2400_inp_sys_capt_unit_b
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#define ISYS_CAP_C testbench_isp_isp_css_part_is_2400_inp_sys_capt_unit_c
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#define ISYS_INP_BUF testbench_isp_isp_css_part_input_buffer
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#define ISYS_INP_CTRL testbench_isp_isp_css_part_is_2400_inp_sys_inp_ctrl
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#define ISYS_ACQ testbench_isp_isp_css_part_is_2400_inp_sys_acq_unit
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#define ISP testbench_isp_isp_css_sec_part_isp
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#define SP testbench_isp_isp_css_sec_part_scp
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#define IF_PRIM testbench_isp_isp_css_part_is_2400_ifmt_ift_prim
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#define IF_PRIM_B testbench_isp_isp_css_part_is_2400_ifmt_ift_prim_b
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#define IF_SEC testbench_isp_isp_css_part_is_2400_ifmt_ift_sec
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#define IF_SEC_MASTER testbench_isp_isp_css_part_is_2400_ifmt_ift_sec_mt_out
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#define STR_TO_MEM testbench_isp_isp_css_part_is_2400_ifmt_mem_cpy
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#define IFMT_GP_REGS testbench_isp_isp_css_part_is_2400_ifmt_gp_reg
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#define IFMT_IRQ_CTRL testbench_isp_isp_css_part_is_2400_ifmt_irq_ctrl
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#define CSS_RECEIVER testbench_isp_isp_css_part_is_2400_inp_sys_csi_receiver
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#define TC testbench_isp_isp_css_sec_part_gpd_tc
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#define GPTIMER testbench_isp_isp_css_sec_part_gpd_gptimer
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#define DMA testbench_isp_isp_css_sec_part_isp_dma
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#define GDC testbench_isp_isp_css_sec_part_gdc1
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#define GDC2 testbench_isp_isp_css_sec_part_gdc2
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#define IRQ_CTRL testbench_isp_isp_css_sec_part_gpd_irq_ctrl
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#define GPIO testbench_isp_isp_css_sec_part_gpd_c_gpio
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#define GP_REGS testbench_isp_isp_css_sec_part_gpd_gp_reg
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#define ISEL_GP_REGS testbench_isp_isp_css_part_is_2400_isel_gpr
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#define ISEL_IRQ_CTRL testbench_isp_isp_css_part_is_2400_isel_irq_ctrl
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#define DATA_MMU testbench_isp_isp_css_sec_part_data_out_sys_c_mmu
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#define ICACHE_MMU testbench_isp_isp_css_sec_part_icache_out_sys_c_mmu
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/* next is actually not FIFO but FIFO adapter, or slave to streaming adapter */
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#define ISP_SP_FIFO testbench_isp_isp_css_sec_part_fa_sp_isp
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#define ISEL_FIFO testbench_isp_isp_css_part_is_2400_isel_sf_fa_in
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#define FIFO_GPF_SP testbench_isp_isp_css_sec_part_sf_fa2sp_in
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#define FIFO_GPF_ISP testbench_isp_isp_css_sec_part_sf_fa2isp_in
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#define FIFO_SP_GPF testbench_isp_isp_css_sec_part_sf_sp2fa_in
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#define FIFO_ISP_GPF testbench_isp_isp_css_sec_part_sf_isp2fa_in
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#define DATA_OCP_MASTER testbench_isp_isp_css_sec_part_data_out_sys_cio2ocp_wide_data_out_mt
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#define ICACHE_OCP_MASTER testbench_isp_isp_css_sec_part_icache_out_sys_cio2ocp_wide_data_out_mt
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#define SP_IN_FIFO testbench_isp_isp_css_sec_part_sf_fa2sp_in
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#define SP_OUT_FIFO testbench_isp_isp_css_sec_part_sf_sp2fa_out
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#define ISP_IN_FIFO testbench_isp_isp_css_sec_part_sf_fa2isp_in
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#define ISP_OUT_FIFO testbench_isp_isp_css_sec_part_sf_isp2fa_out
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#define GEN_SHORT_PACK_PORT testbench_isp_isp_css_part_is_2400_inp_sys_csi_str_mon_fa_gensh_out
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/* input_system_2401 identifiers */
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#define ISYS2401_GP_REGS testbench_isp_isp_css_part_is_2401_gpreg
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#define ISYS2401_DMA testbench_isp_isp_css_part_is_2401_dma
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#define ISYS2401_IRQ_CTRL testbench_isp_isp_css_part_is_2401_isys_irq_ctrl
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#define ISYS2401_CSI_RX_A testbench_isp_isp_css_part_is_2401_is_pipe_a_csi_rx
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#define ISYS2401_MIPI_BE_A testbench_isp_isp_css_part_is_2401_is_pipe_a_mipi_be
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#define ISYS2401_S2M_A testbench_isp_isp_css_part_is_2401_is_pipe_a_s2m
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#define ISYS2401_PXG_A testbench_isp_isp_css_part_is_2401_is_pipe_a_pxlgen
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#define ISYS2401_IBUF_CNTRL_A testbench_isp_isp_css_part_is_2401_is_pipe_a_ibuf_ctrl
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#define ISYS2401_IRQ_CTRL_A testbench_isp_isp_css_part_is_2401_is_pipe_a_irq_ctrl_pipe
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#define ISYS2401_CSI_RX_B testbench_isp_isp_css_part_is_2401_is_pipe_b_csi_rx
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#define ISYS2401_MIPI_BE_B testbench_isp_isp_css_part_is_2401_is_pipe_b_mipi_be
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#define ISYS2401_S2M_B testbench_isp_isp_css_part_is_2401_is_pipe_b_s2m
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#define ISYS2401_PXG_B testbench_isp_isp_css_part_is_2401_is_pipe_b_pxlgen
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#define ISYS2401_IBUF_CNTRL_B testbench_isp_isp_css_part_is_2401_is_pipe_b_ibuf_ctrl
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#define ISYS2401_IRQ_CTRL_B testbench_isp_isp_css_part_is_2401_is_pipe_b_irq_ctrl_pipe
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#define ISYS2401_CSI_RX_C testbench_isp_isp_css_part_is_2401_is_pipe_c_csi_rx
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#define ISYS2401_MIPI_BE_C testbench_isp_isp_css_part_is_2401_is_pipe_c_mipi_be
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#define ISYS2401_S2M_C testbench_isp_isp_css_part_is_2401_is_pipe_c_s2m
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#define ISYS2401_PXG_C testbench_isp_isp_css_part_is_2401_is_pipe_c_pxlgen
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#define ISYS2401_IBUF_CNTRL_C testbench_isp_isp_css_part_is_2401_is_pipe_c_ibuf_ctrl
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#define ISYS2401_IRQ_CTRL_C testbench_isp_isp_css_part_is_2401_is_pipe_c_irq_ctrl_pipe
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/* Testbench identifiers */
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#define DDR testbench_ddram
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#define DDR_SMALL testbench_ddram_small
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#define XMEM DDR
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#define GPIO_ADAPTER testbench_gp_adapter
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#define SIG_MONITOR testbench_sig_mon
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#define DDR_SLAVE testbench_ddram_ip0
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#define DDR_SMALL_SLAVE testbench_ddram_small_ip0
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#define HOST_MASTER host_op0
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#define CSI_SENSOR testbench_vied_sensor
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#define CSI_SENSOR_GP_REGS testbench_vied_sensor_gpreg
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#define CSI_STR_IN_A testbench_vied_sensor_tx_a_csi_tx_data_in
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#define CSI_STR_IN_B testbench_vied_sensor_tx_b_csi_tx_data_in
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#define CSI_STR_IN_C testbench_vied_sensor_tx_c_csi_tx_data_in
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#define CSI_SENSOR_TX_A testbench_vied_sensor_tx_a
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#define CSI_SENSOR_TX_B testbench_vied_sensor_tx_b
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#define CSI_SENSOR_TX_C testbench_vied_sensor_tx_c
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#endif /* _hive_isp_css_host_ids_hrt_h_ */
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@ -1,118 +0,0 @@
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/*
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* Support for Intel Camera Imaging ISP subsystem.
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* Copyright (c) 2015, Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
|
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* under the terms and conditions of the GNU General Public License,
|
||||
* version 2, as published by the Free Software Foundation.
|
||||
*
|
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* This program is distributed in the hope it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
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*/
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#ifndef _hive_isp_css_host_ids_hrt_h_
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#define _hive_isp_css_host_ids_hrt_h_
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/* ISP_CSS identifiers */
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#define INP_SYS testbench_isp_isp_css_part_is_2400_inp_sys
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#define ISYS_GP_REGS testbench_isp_isp_css_part_is_2400_inp_sys_gpreg
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#define ISYS_IRQ_CTRL testbench_isp_isp_css_part_is_2400_inp_sys_irq_ctrl
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#define ISYS_CAP_A testbench_isp_isp_css_part_is_2400_inp_sys_capt_unit_a
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#define ISYS_CAP_B testbench_isp_isp_css_part_is_2400_inp_sys_capt_unit_b
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#define ISYS_CAP_C testbench_isp_isp_css_part_is_2400_inp_sys_capt_unit_c
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#define ISYS_INP_BUF testbench_isp_isp_css_part_input_buffer
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#define ISYS_INP_CTRL testbench_isp_isp_css_part_is_2400_inp_sys_inp_ctrl
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#define ISYS_ACQ testbench_isp_isp_css_part_is_2400_inp_sys_acq_unit
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#define ISP testbench_isp_isp_css_sec_part_isp
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#define SP testbench_isp_isp_css_sec_part_scp
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#define IF_PRIM testbench_isp_isp_css_part_is_2400_ifmt_ift_prim
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#define IF_PRIM_B testbench_isp_isp_css_part_is_2400_ifmt_ift_prim_b
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#define IF_SEC testbench_isp_isp_css_part_is_2400_ifmt_ift_sec
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#define IF_SEC_MASTER testbench_isp_isp_css_part_is_2400_ifmt_ift_sec_mt_out
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#define STR_TO_MEM testbench_isp_isp_css_part_is_2400_ifmt_mem_cpy
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#define IFMT_GP_REGS testbench_isp_isp_css_part_is_2400_ifmt_gp_reg
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#define IFMT_IRQ_CTRL testbench_isp_isp_css_part_is_2400_ifmt_irq_ctrl
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#define CSS_RECEIVER testbench_isp_isp_css_part_is_2400_inp_sys_csi_receiver
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#define TC testbench_isp_isp_css_sec_part_gpd_tc
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#define GPTIMER testbench_isp_isp_css_sec_part_gpd_gptimer
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#define DMA testbench_isp_isp_css_sec_part_isp_dma
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#define GDC testbench_isp_isp_css_sec_part_gdc1
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#define GDC2 testbench_isp_isp_css_sec_part_gdc2
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#define IRQ_CTRL testbench_isp_isp_css_sec_part_gpd_irq_ctrl
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#define GPIO testbench_isp_isp_css_sec_part_gpd_c_gpio
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#define GP_REGS testbench_isp_isp_css_sec_part_gpd_gp_reg
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#define ISEL_GP_REGS testbench_isp_isp_css_part_is_2400_isel_gpr
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#define ISEL_IRQ_CTRL testbench_isp_isp_css_part_is_2400_isel_irq_ctrl
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#define DATA_MMU testbench_isp_isp_css_sec_part_data_out_sys_c_mmu
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#define ICACHE_MMU testbench_isp_isp_css_sec_part_icache_out_sys_c_mmu
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/* next is actually not FIFO but FIFO adapter, or slave to streaming adapter */
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#define ISP_SP_FIFO testbench_isp_isp_css_sec_part_fa_sp_isp
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#define ISEL_FIFO testbench_isp_isp_css_part_is_2400_isel_sf_fa_in
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#define FIFO_GPF_SP testbench_isp_isp_css_sec_part_sf_fa2sp_in
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#define FIFO_GPF_ISP testbench_isp_isp_css_sec_part_sf_fa2isp_in
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#define FIFO_SP_GPF testbench_isp_isp_css_sec_part_sf_sp2fa_in
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#define FIFO_ISP_GPF testbench_isp_isp_css_sec_part_sf_isp2fa_in
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#define DATA_OCP_MASTER testbench_isp_isp_css_sec_part_data_out_sys_cio2ocp_wide_data_out_mt
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#define ICACHE_OCP_MASTER testbench_isp_isp_css_sec_part_icache_out_sys_cio2ocp_wide_data_out_mt
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#define SP_IN_FIFO testbench_isp_isp_css_sec_part_sf_fa2sp_in
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#define SP_OUT_FIFO testbench_isp_isp_css_sec_part_sf_sp2fa_out
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#define ISP_IN_FIFO testbench_isp_isp_css_sec_part_sf_fa2isp_in
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#define ISP_OUT_FIFO testbench_isp_isp_css_sec_part_sf_isp2fa_out
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#define GEN_SHORT_PACK_PORT testbench_isp_isp_css_part_is_2400_inp_sys_csi_str_mon_fa_gensh_out
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/* input_system_2401 identifiers */
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#define ISYS2401_GP_REGS testbench_isp_isp_css_part_is_2401_gpreg
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#define ISYS2401_DMA testbench_isp_isp_css_part_is_2401_dma
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#define ISYS2401_IRQ_CTRL testbench_isp_isp_css_part_is_2401_isys_irq_ctrl
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#define ISYS2401_CSI_RX_A testbench_isp_isp_css_part_is_2401_is_pipe_a_csi_rx
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#define ISYS2401_MIPI_BE_A testbench_isp_isp_css_part_is_2401_is_pipe_a_mipi_be
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#define ISYS2401_S2M_A testbench_isp_isp_css_part_is_2401_is_pipe_a_s2m
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#define ISYS2401_PXG_A testbench_isp_isp_css_part_is_2401_is_pipe_a_pxlgen
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#define ISYS2401_IBUF_CNTRL_A testbench_isp_isp_css_part_is_2401_is_pipe_a_ibuf_ctrl
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#define ISYS2401_IRQ_CTRL_A testbench_isp_isp_css_part_is_2401_is_pipe_a_irq_ctrl_pipe
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#define ISYS2401_CSI_RX_B testbench_isp_isp_css_part_is_2401_is_pipe_b_csi_rx
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#define ISYS2401_MIPI_BE_B testbench_isp_isp_css_part_is_2401_is_pipe_b_mipi_be
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#define ISYS2401_S2M_B testbench_isp_isp_css_part_is_2401_is_pipe_b_s2m
|
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#define ISYS2401_PXG_B testbench_isp_isp_css_part_is_2401_is_pipe_b_pxlgen
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#define ISYS2401_IBUF_CNTRL_B testbench_isp_isp_css_part_is_2401_is_pipe_b_ibuf_ctrl
|
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#define ISYS2401_IRQ_CTRL_B testbench_isp_isp_css_part_is_2401_is_pipe_b_irq_ctrl_pipe
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|
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#define ISYS2401_CSI_RX_C testbench_isp_isp_css_part_is_2401_is_pipe_c_csi_rx
|
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#define ISYS2401_MIPI_BE_C testbench_isp_isp_css_part_is_2401_is_pipe_c_mipi_be
|
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#define ISYS2401_S2M_C testbench_isp_isp_css_part_is_2401_is_pipe_c_s2m
|
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#define ISYS2401_PXG_C testbench_isp_isp_css_part_is_2401_is_pipe_c_pxlgen
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#define ISYS2401_IBUF_CNTRL_C testbench_isp_isp_css_part_is_2401_is_pipe_c_ibuf_ctrl
|
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#define ISYS2401_IRQ_CTRL_C testbench_isp_isp_css_part_is_2401_is_pipe_c_irq_ctrl_pipe
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|
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/* Testbench identifiers */
|
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#define DDR testbench_ddram
|
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#define DDR_SMALL testbench_ddram_small
|
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#define XMEM DDR
|
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#define GPIO_ADAPTER testbench_gp_adapter
|
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#define SIG_MONITOR testbench_sig_mon
|
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#define DDR_SLAVE testbench_ddram_ip0
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#define DDR_SMALL_SLAVE testbench_ddram_small_ip0
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#define HOST_MASTER host_op0
|
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|
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#define CSI_SENSOR testbench_vied_sensor
|
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#define CSI_SENSOR_GP_REGS testbench_vied_sensor_gpreg
|
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#define CSI_STR_IN_A testbench_vied_sensor_tx_a_csi_tx_data_in
|
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#define CSI_STR_IN_B testbench_vied_sensor_tx_b_csi_tx_data_in
|
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#define CSI_STR_IN_C testbench_vied_sensor_tx_c_csi_tx_data_in
|
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#define CSI_SENSOR_TX_A testbench_vied_sensor_tx_a
|
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#define CSI_SENSOR_TX_B testbench_vied_sensor_tx_b
|
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#define CSI_SENSOR_TX_C testbench_vied_sensor_tx_c
|
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|
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#endif /* _hive_isp_css_host_ids_hrt_h_ */
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