ARM: davinci: cp-intc: remove cp_intc.h
There's no need to have a local header for cp-intc. Move the only declaration for a public function to common.h. Move all register offsets into the driver source file and drop all unused defines. Make cp_intc_of_init() static. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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@ -39,7 +39,6 @@
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#include <mach/mux.h>
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#include <mach/da8xx.h>
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#include "cp_intc.h"
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#include "irqs.h"
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#define DA830_EVM_PHY_ID ""
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@ -46,7 +46,6 @@
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#include <mach/da8xx.h>
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#include <mach/mux.h>
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#include "cp_intc.h"
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#include "irqs.h"
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#include "sram.h"
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@ -29,7 +29,6 @@
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <mach/common.h>
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#include "cp_intc.h"
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#include <mach/da8xx.h>
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#include <linux/platform_data/mtd-davinci.h>
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#include <linux/platform_data/mtd-davinci-aemif.h>
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@ -27,7 +27,6 @@
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#include <asm/mach/arch.h>
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#include <mach/common.h>
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#include "cp_intc.h"
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#include <mach/da8xx.h>
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#include <mach/mux.h>
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@ -21,7 +21,22 @@
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#include <asm/exception.h>
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#include <mach/common.h>
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#include "cp_intc.h"
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#define CP_INTC_CTRL 0x04
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#define CP_INTC_HOST_CTRL 0x0C
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#define CP_INTC_GLOBAL_ENABLE 0x10
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#define CP_INTC_SYS_STAT_IDX_CLR 0x24
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#define CP_INTC_SYS_ENABLE_IDX_SET 0x28
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#define CP_INTC_SYS_ENABLE_IDX_CLR 0x2C
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#define CP_INTC_HOST_ENABLE_IDX_SET 0x34
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#define CP_INTC_HOST_ENABLE_IDX_CLR 0x38
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#define CP_INTC_PRIO_IDX 0x80
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#define CP_INTC_SYS_STAT_CLR(n) (0x0280 + (n << 2))
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#define CP_INTC_SYS_ENABLE_CLR(n) (0x0380 + (n << 2))
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#define CP_INTC_CHAN_MAP(n) (0x0400 + (n << 2))
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#define CP_INTC_SYS_POLARITY(n) (0x0D00 + (n << 2))
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#define CP_INTC_SYS_TYPE(n) (0x0D80 + (n << 2))
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#define CP_INTC_HOST_ENABLE(n) (0x1500 + (n << 2))
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#define DAVINCI_CP_INTC_PRI_INDX_MASK GENMASK(9, 0)
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#define DAVINCI_CP_INTC_GPIR_NONE BIT(31)
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@ -141,7 +156,8 @@ static const struct irq_domain_ops cp_intc_host_ops = {
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.xlate = irq_domain_xlate_onetwocell,
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};
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int __init cp_intc_of_init(struct device_node *node, struct device_node *parent)
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static int __init cp_intc_of_init(struct device_node *node,
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struct device_node *parent)
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{
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u32 num_irq = davinci_soc_info.intc_irq_num;
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u8 *irq_prio = davinci_soc_info.intc_irq_prios;
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@ -1,57 +0,0 @@
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/*
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* TI Common Platform Interrupt Controller (cp_intc) definitions
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*
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* Author: Steve Chen <schen@mvista.com>
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* Copyright (C) 2008-2009, MontaVista Software, Inc. <source@mvista.com>
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#ifndef __ASM_HARDWARE_CP_INTC_H
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#define __ASM_HARDWARE_CP_INTC_H
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#define CP_INTC_REV 0x00
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#define CP_INTC_CTRL 0x04
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#define CP_INTC_HOST_CTRL 0x0C
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#define CP_INTC_GLOBAL_ENABLE 0x10
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#define CP_INTC_GLOBAL_NESTING_LEVEL 0x1C
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#define CP_INTC_SYS_STAT_IDX_SET 0x20
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#define CP_INTC_SYS_STAT_IDX_CLR 0x24
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#define CP_INTC_SYS_ENABLE_IDX_SET 0x28
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#define CP_INTC_SYS_ENABLE_IDX_CLR 0x2C
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#define CP_INTC_GLOBAL_WAKEUP_ENABLE 0x30
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#define CP_INTC_HOST_ENABLE_IDX_SET 0x34
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#define CP_INTC_HOST_ENABLE_IDX_CLR 0x38
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#define CP_INTC_PACING_PRESCALE 0x40
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#define CP_INTC_VECTOR_BASE 0x50
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#define CP_INTC_VECTOR_SIZE 0x54
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#define CP_INTC_VECTOR_NULL 0x58
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#define CP_INTC_PRIO_IDX 0x80
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#define CP_INTC_PRIO_VECTOR 0x84
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#define CP_INTC_SECURE_ENABLE 0x90
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#define CP_INTC_SECURE_PRIO_IDX 0x94
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#define CP_INTC_PACING_PARAM(n) (0x0100 + (n << 4))
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#define CP_INTC_PACING_DEC(n) (0x0104 + (n << 4))
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#define CP_INTC_PACING_MAP(n) (0x0108 + (n << 4))
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#define CP_INTC_SYS_RAW_STAT(n) (0x0200 + (n << 2))
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#define CP_INTC_SYS_STAT_CLR(n) (0x0280 + (n << 2))
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#define CP_INTC_SYS_ENABLE_SET(n) (0x0300 + (n << 2))
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#define CP_INTC_SYS_ENABLE_CLR(n) (0x0380 + (n << 2))
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#define CP_INTC_CHAN_MAP(n) (0x0400 + (n << 2))
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#define CP_INTC_HOST_MAP(n) (0x0800 + (n << 2))
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#define CP_INTC_HOST_PRIO_IDX(n) (0x0900 + (n << 2))
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#define CP_INTC_SYS_POLARITY(n) (0x0D00 + (n << 2))
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#define CP_INTC_SYS_TYPE(n) (0x0D80 + (n << 2))
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#define CP_INTC_WAKEUP_ENABLE(n) (0x0E00 + (n << 2))
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#define CP_INTC_DEBUG_SELECT(n) (0x0F00 + (n << 2))
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#define CP_INTC_SYS_SECURE_ENABLE(n) (0x1000 + (n << 2))
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#define CP_INTC_HOST_NESTING_LEVEL(n) (0x1100 + (n << 2))
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#define CP_INTC_HOST_ENABLE(n) (0x1500 + (n << 2))
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#define CP_INTC_HOST_PRIO_VECTOR(n) (0x1600 + (n << 2))
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#define CP_INTC_VECTOR_ADDR(n) (0x2000 + (n << 2))
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void cp_intc_init(void);
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int cp_intc_of_init(struct device_node *, struct device_node *);
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#endif /* __ASM_HARDWARE_CP_INTC_H */
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@ -22,6 +22,7 @@
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#define DAVINCI_INTC_START NR_IRQS
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#define DAVINCI_INTC_IRQ(_irqnum) (DAVINCI_INTC_START + (_irqnum))
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void cp_intc_init(void);
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void davinci_timer_init(struct clk *clk);
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struct davinci_timer_instance {
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