bus: mvebu-mbus: Remove name -> target, attribute mapping tables
This tables were used together with the name-based MBus window creation API. Since that's has been removed, we can also remove the tables. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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ed843a7d62
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@ -97,33 +97,6 @@
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#define DOVE_DDR_BASE_CS_OFF(n) ((n) << 4)
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struct mvebu_mbus_mapping {
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const char *name;
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u8 target;
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u8 attr;
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u8 attrmask;
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};
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/*
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* Masks used for the 'attrmask' field of mvebu_mbus_mapping. They
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* allow to get the real attribute value, discarding the special bits
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* used to select a PCI MEM region or a PCI WA region. This allows the
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* debugfs code to reverse-match the name of a device from its
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* target/attr values.
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*
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* For all devices except PCI, all bits of 'attr' must be
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* considered. For most SoCs, only bit 3 should be ignored (it allows
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* to select between PCI MEM and PCI I/O). On Orion5x however, there
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* is the special bit 5 to select a PCI WA region.
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*/
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#define MAPDEF_NOMASK 0xff
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#define MAPDEF_PCIMASK 0xf7
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#define MAPDEF_ORIONPCIMASK 0xd7
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/* Macro used to define one mvebu_mbus_mapping entry */
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#define MAPDEF(__n, __t, __a, __m) \
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{ .name = __n, .target = __t, .attr = __a, .attrmask = __m }
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struct mvebu_mbus_state;
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struct mvebu_mbus_soc_data {
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@ -133,7 +106,6 @@ struct mvebu_mbus_soc_data {
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void (*setup_cpu_target)(struct mvebu_mbus_state *s);
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int (*show_cpu_target)(struct mvebu_mbus_state *s,
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struct seq_file *seq, void *v);
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const struct mvebu_mbus_mapping *map;
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};
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struct mvebu_mbus_state {
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@ -430,8 +402,7 @@ static int mvebu_devs_debug_show(struct seq_file *seq, void *v)
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u64 wbase, wremap;
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u32 wsize;
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u8 wtarget, wattr;
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int enabled, i;
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const char *name;
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int enabled;
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mvebu_mbus_read_window(mbus, win,
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&enabled, &wbase, &wsize,
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@ -442,18 +413,9 @@ static int mvebu_devs_debug_show(struct seq_file *seq, void *v)
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continue;
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}
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for (i = 0; mbus->soc->map[i].name; i++)
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if (mbus->soc->map[i].target == wtarget &&
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mbus->soc->map[i].attr ==
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(wattr & mbus->soc->map[i].attrmask))
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break;
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name = mbus->soc->map[i].name ?: "unknown";
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seq_printf(seq, "[%02d] %016llx - %016llx : %s",
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seq_printf(seq, "[%02d] %016llx - %016llx : %04x:%04x",
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win, (unsigned long long)wbase,
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(unsigned long long)(wbase + wsize), name);
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(unsigned long long)(wbase + wsize), wtarget, wattr);
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if (win < mbus->soc->num_remappable_wins) {
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seq_printf(seq, " (remap %016llx)\n",
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@ -578,45 +540,12 @@ mvebu_mbus_dove_setup_cpu_target(struct mvebu_mbus_state *mbus)
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mvebu_mbus_dram_info.num_cs = cs;
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}
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static const struct mvebu_mbus_mapping armada_370_map[] = {
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MAPDEF("bootrom", 1, 0xe0, MAPDEF_NOMASK),
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MAPDEF("devbus-boot", 1, 0x2f, MAPDEF_NOMASK),
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MAPDEF("devbus-cs0", 1, 0x3e, MAPDEF_NOMASK),
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MAPDEF("devbus-cs1", 1, 0x3d, MAPDEF_NOMASK),
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MAPDEF("devbus-cs2", 1, 0x3b, MAPDEF_NOMASK),
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MAPDEF("devbus-cs3", 1, 0x37, MAPDEF_NOMASK),
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MAPDEF("pcie0.0", 4, 0xe0, MAPDEF_PCIMASK),
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MAPDEF("pcie1.0", 8, 0xe0, MAPDEF_PCIMASK),
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{},
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};
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static const struct mvebu_mbus_soc_data armada_370_mbus_data = {
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.num_wins = 20,
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.num_remappable_wins = 8,
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.win_cfg_offset = armada_370_xp_mbus_win_offset,
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.setup_cpu_target = mvebu_mbus_default_setup_cpu_target,
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.show_cpu_target = mvebu_sdram_debug_show_orion,
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.map = armada_370_map,
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};
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static const struct mvebu_mbus_mapping armada_xp_map[] = {
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MAPDEF("bootrom", 1, 0x1d, MAPDEF_NOMASK),
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MAPDEF("devbus-boot", 1, 0x2f, MAPDEF_NOMASK),
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MAPDEF("devbus-cs0", 1, 0x3e, MAPDEF_NOMASK),
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MAPDEF("devbus-cs1", 1, 0x3d, MAPDEF_NOMASK),
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MAPDEF("devbus-cs2", 1, 0x3b, MAPDEF_NOMASK),
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MAPDEF("devbus-cs3", 1, 0x37, MAPDEF_NOMASK),
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MAPDEF("pcie0.0", 4, 0xe0, MAPDEF_PCIMASK),
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MAPDEF("pcie0.1", 4, 0xd0, MAPDEF_PCIMASK),
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MAPDEF("pcie0.2", 4, 0xb0, MAPDEF_PCIMASK),
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MAPDEF("pcie0.3", 4, 0x70, MAPDEF_PCIMASK),
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MAPDEF("pcie1.0", 8, 0xe0, MAPDEF_PCIMASK),
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MAPDEF("pcie1.1", 8, 0xd0, MAPDEF_PCIMASK),
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MAPDEF("pcie1.2", 8, 0xb0, MAPDEF_PCIMASK),
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MAPDEF("pcie1.3", 8, 0x70, MAPDEF_PCIMASK),
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MAPDEF("pcie2.0", 4, 0xf0, MAPDEF_PCIMASK),
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MAPDEF("pcie3.0", 8, 0xf0, MAPDEF_PCIMASK),
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{},
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};
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static const struct mvebu_mbus_soc_data armada_xp_mbus_data = {
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@ -625,15 +554,6 @@ static const struct mvebu_mbus_soc_data armada_xp_mbus_data = {
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.win_cfg_offset = armada_370_xp_mbus_win_offset,
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.setup_cpu_target = mvebu_mbus_default_setup_cpu_target,
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.show_cpu_target = mvebu_sdram_debug_show_orion,
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.map = armada_xp_map,
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};
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static const struct mvebu_mbus_mapping kirkwood_map[] = {
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MAPDEF("pcie0.0", 4, 0xe0, MAPDEF_PCIMASK),
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MAPDEF("pcie1.0", 4, 0xd0, MAPDEF_PCIMASK),
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MAPDEF("sram", 3, 0x01, MAPDEF_NOMASK),
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MAPDEF("nand", 1, 0x2f, MAPDEF_NOMASK),
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{},
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};
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static const struct mvebu_mbus_soc_data kirkwood_mbus_data = {
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@ -642,16 +562,6 @@ static const struct mvebu_mbus_soc_data kirkwood_mbus_data = {
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.win_cfg_offset = orion_mbus_win_offset,
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.setup_cpu_target = mvebu_mbus_default_setup_cpu_target,
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.show_cpu_target = mvebu_sdram_debug_show_orion,
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.map = kirkwood_map,
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};
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static const struct mvebu_mbus_mapping dove_map[] = {
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MAPDEF("pcie0.0", 0x4, 0xe0, MAPDEF_PCIMASK),
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MAPDEF("pcie1.0", 0x8, 0xe0, MAPDEF_PCIMASK),
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MAPDEF("cesa", 0x3, 0x01, MAPDEF_NOMASK),
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MAPDEF("bootrom", 0x1, 0xfd, MAPDEF_NOMASK),
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MAPDEF("scratchpad", 0xd, 0x0, MAPDEF_NOMASK),
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{},
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};
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static const struct mvebu_mbus_soc_data dove_mbus_data = {
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@ -660,18 +570,6 @@ static const struct mvebu_mbus_soc_data dove_mbus_data = {
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.win_cfg_offset = orion_mbus_win_offset,
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.setup_cpu_target = mvebu_mbus_dove_setup_cpu_target,
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.show_cpu_target = mvebu_sdram_debug_show_dove,
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.map = dove_map,
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};
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static const struct mvebu_mbus_mapping orion5x_map[] = {
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MAPDEF("pcie0.0", 4, 0x51, MAPDEF_ORIONPCIMASK),
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MAPDEF("pci0.0", 3, 0x51, MAPDEF_ORIONPCIMASK),
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MAPDEF("devbus-boot", 1, 0x0f, MAPDEF_NOMASK),
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MAPDEF("devbus-cs0", 1, 0x1e, MAPDEF_NOMASK),
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MAPDEF("devbus-cs1", 1, 0x1d, MAPDEF_NOMASK),
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MAPDEF("devbus-cs2", 1, 0x1b, MAPDEF_NOMASK),
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MAPDEF("sram", 0, 0x00, MAPDEF_NOMASK),
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{},
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};
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/*
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@ -684,7 +582,6 @@ static const struct mvebu_mbus_soc_data orion5x_4win_mbus_data = {
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.win_cfg_offset = orion_mbus_win_offset,
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.setup_cpu_target = mvebu_mbus_default_setup_cpu_target,
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.show_cpu_target = mvebu_sdram_debug_show_orion,
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.map = orion5x_map,
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};
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static const struct mvebu_mbus_soc_data orion5x_2win_mbus_data = {
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@ -693,21 +590,6 @@ static const struct mvebu_mbus_soc_data orion5x_2win_mbus_data = {
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.win_cfg_offset = orion_mbus_win_offset,
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.setup_cpu_target = mvebu_mbus_default_setup_cpu_target,
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.show_cpu_target = mvebu_sdram_debug_show_orion,
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.map = orion5x_map,
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};
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static const struct mvebu_mbus_mapping mv78xx0_map[] = {
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MAPDEF("pcie0.0", 4, 0xe0, MAPDEF_PCIMASK),
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MAPDEF("pcie0.1", 4, 0xd0, MAPDEF_PCIMASK),
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MAPDEF("pcie0.2", 4, 0xb0, MAPDEF_PCIMASK),
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MAPDEF("pcie0.3", 4, 0x70, MAPDEF_PCIMASK),
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MAPDEF("pcie1.0", 8, 0xe0, MAPDEF_PCIMASK),
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MAPDEF("pcie1.1", 8, 0xd0, MAPDEF_PCIMASK),
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MAPDEF("pcie1.2", 8, 0xb0, MAPDEF_PCIMASK),
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MAPDEF("pcie1.3", 8, 0x70, MAPDEF_PCIMASK),
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MAPDEF("pcie2.0", 4, 0xf0, MAPDEF_PCIMASK),
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MAPDEF("pcie3.0", 8, 0xf0, MAPDEF_PCIMASK),
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{},
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};
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static const struct mvebu_mbus_soc_data mv78xx0_mbus_data = {
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@ -716,7 +598,6 @@ static const struct mvebu_mbus_soc_data mv78xx0_mbus_data = {
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.win_cfg_offset = mv78xx0_mbus_win_offset,
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.setup_cpu_target = mvebu_mbus_default_setup_cpu_target,
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.show_cpu_target = mvebu_sdram_debug_show_orion,
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.map = mv78xx0_map,
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};
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/*
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@ -895,33 +776,16 @@ static int __init mbus_dt_setup_win(struct mvebu_mbus_state *mbus,
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u32 base, u32 size,
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u8 target, u8 attr)
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{
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const struct mvebu_mbus_mapping *map = mbus->soc->map;
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const char *name;
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int i;
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/* Search for a suitable window in the existing mappings */
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for (i = 0; map[i].name; i++)
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if (map[i].target == target &&
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map[i].attr == (attr & map[i].attrmask))
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break;
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name = map[i].name;
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if (!name) {
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pr_err("window 0x%x:0x%x is unknown, skipping\n",
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target, attr);
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return -EINVAL;
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}
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if (!mvebu_mbus_window_conflicts(mbus, base, size, target, attr)) {
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pr_err("cannot add window '%s', conflicts with another window\n",
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name);
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pr_err("cannot add window '%04x:%04x', conflicts with another window\n",
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target, attr);
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return -EBUSY;
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}
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if (mvebu_mbus_alloc_window(mbus, base, size, MVEBU_MBUS_NO_REMAP,
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target, attr)) {
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pr_err("cannot add window '%s', too many windows\n",
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name);
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pr_err("cannot add window '%04x:%04x', too many windows\n",
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target, attr);
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return -ENOMEM;
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}
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return 0;
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