net: sgi: ioc3-eth: use dma-direct for dma allocations
Replace the homegrown DMA memory allocation, which only works on SGI-IP27 machines, with the generic dma allocations. Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Thomas Bogendoerfer
David S. Miller
Родитель
850d2fed5b
Коммит
ed870f6a7a
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@ -36,7 +36,6 @@
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#include <linux/ip.h>
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#include <linux/tcp.h>
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#include <linux/udp.h>
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#include <linux/dma-mapping.h>
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#include <linux/gfp.h>
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#ifdef CONFIG_SERIAL_8250
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@ -49,6 +48,8 @@
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#include <linux/etherdevice.h>
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#include <linux/ethtool.h>
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#include <linux/skbuff.h>
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#include <linux/dma-direct.h>
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#include <net/ip.h>
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#include <asm/byteorder.h>
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@ -64,10 +65,12 @@
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#define RX_BUFFS 64
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#define RX_RING_ENTRIES 512 /* fixed in hardware */
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#define RX_RING_MASK (RX_RING_ENTRIES - 1)
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#define RX_RING_SIZE (RX_RING_ENTRIES * sizeof(u64))
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/* 128 TX buffers (not tunable) */
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#define TX_RING_ENTRIES 128
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#define TX_RING_MASK (TX_RING_ENTRIES - 1)
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#define TX_RING_SIZE (TX_RING_ENTRIES * sizeof(struct ioc3_etxd))
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/* IOC3 does dma transfers in 128 byte blocks */
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#define IOC3_DMA_XFER_LEN 128UL
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@ -83,9 +86,12 @@
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struct ioc3_private {
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struct ioc3_ethregs *regs;
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struct ioc3 *all_regs;
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struct device *dma_dev;
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u32 *ssram;
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unsigned long *rxr; /* pointer to receiver ring */
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struct ioc3_etxd *txr;
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dma_addr_t rxr_dma;
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dma_addr_t txr_dma;
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struct sk_buff *rx_skbs[RX_RING_ENTRIES];
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struct sk_buff *tx_skbs[TX_RING_ENTRIES];
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int rx_ci; /* RX consumer index */
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@ -125,9 +131,11 @@ static inline unsigned long aligned_rx_skb_addr(unsigned long addr)
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return (~addr + 1) & (IOC3_DMA_XFER_LEN - 1UL);
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}
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static inline int ioc3_alloc_skb(struct sk_buff **skb, struct ioc3_erxbuf **rxb)
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static inline int ioc3_alloc_skb(struct ioc3_private *ip, struct sk_buff **skb,
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struct ioc3_erxbuf **rxb, dma_addr_t *rxb_dma)
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{
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struct sk_buff *new_skb;
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dma_addr_t d;
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int offset;
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new_skb = alloc_skb(RX_BUF_SIZE + IOC3_DMA_XFER_LEN - 1, GFP_ATOMIC);
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@ -139,6 +147,14 @@ static inline int ioc3_alloc_skb(struct sk_buff **skb, struct ioc3_erxbuf **rxb)
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if (offset)
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skb_reserve(new_skb, offset);
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d = dma_map_single(ip->dma_dev, new_skb->data,
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RX_BUF_SIZE, DMA_FROM_DEVICE);
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if (dma_mapping_error(ip->dma_dev, d)) {
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dev_kfree_skb_any(new_skb);
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return -ENOMEM;
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}
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*rxb_dma = d;
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*rxb = (struct ioc3_erxbuf *)new_skb->data;
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skb_reserve(new_skb, RX_OFFSET);
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*skb = new_skb;
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@ -146,17 +162,22 @@ static inline int ioc3_alloc_skb(struct sk_buff **skb, struct ioc3_erxbuf **rxb)
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return 0;
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}
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static inline unsigned long ioc3_map(void *ptr, unsigned long vdev)
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#ifdef CONFIG_PCI_XTALK_BRIDGE
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static inline unsigned long ioc3_map(dma_addr_t addr, unsigned long attr)
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{
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#ifdef CONFIG_SGI_IP27
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vdev <<= 57; /* Shift to PCI64_ATTR_VIRTUAL */
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return vdev | (0xaUL << PCI64_ATTR_TARG_SHFT) | PCI64_ATTR_PREF |
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((unsigned long)ptr & TO_PHYS_MASK);
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#else
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return virt_to_bus(ptr);
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#endif
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return (addr & ~PCI64_ATTR_BAR) | attr;
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}
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#define ERBAR_VAL (ERBAR_BARRIER_BIT << ERBAR_RXBARR_SHIFT)
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#else
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static inline unsigned long ioc3_map(dma_addr_t addr, unsigned long attr)
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{
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return addr;
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}
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#define ERBAR_VAL 0
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#endif
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#define IOC3_SIZE 0x100000
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static inline u32 mcr_pack(u32 pulse, u32 sample)
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@ -523,6 +544,7 @@ static inline void ioc3_rx(struct net_device *dev)
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int rx_entry, n_entry, len;
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struct ioc3_erxbuf *rxb;
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unsigned long *rxr;
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dma_addr_t d;
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u32 w0, err;
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rxr = ip->rxr; /* Ring base */
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@ -540,12 +562,13 @@ static inline void ioc3_rx(struct net_device *dev)
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skb_put(skb, len);
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skb->protocol = eth_type_trans(skb, dev);
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if (ioc3_alloc_skb(&new_skb, &rxb)) {
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if (ioc3_alloc_skb(ip, &new_skb, &rxb, &d)) {
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/* Ouch, drop packet and just recycle packet
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* to keep the ring filled.
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*/
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dev->stats.rx_dropped++;
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new_skb = skb;
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d = rxr[rx_entry];
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goto next;
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}
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@ -554,6 +577,9 @@ static inline void ioc3_rx(struct net_device *dev)
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w0 & ERXBUF_IPCKSUM_MASK,
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len);
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dma_unmap_single(ip->dma_dev, rxr[rx_entry],
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RX_BUF_SIZE, DMA_FROM_DEVICE);
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netif_rx(skb);
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ip->rx_skbs[rx_entry] = NULL; /* Poison */
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@ -566,15 +592,17 @@ static inline void ioc3_rx(struct net_device *dev)
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* recycle it.
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*/
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new_skb = skb;
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d = rxr[rx_entry];
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dev->stats.rx_errors++;
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}
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if (err & ERXBUF_CRCERR) /* Statistics */
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dev->stats.rx_crc_errors++;
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if (err & ERXBUF_FRAMERR)
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dev->stats.rx_frame_errors++;
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next:
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ip->rx_skbs[n_entry] = new_skb;
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rxr[n_entry] = cpu_to_be64(ioc3_map(rxb, 1));
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rxr[n_entry] = cpu_to_be64(ioc3_map(d, PCI64_ATTR_BAR));
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rxb->w0 = 0; /* Clear valid flag */
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n_entry = (n_entry + 1) & RX_RING_MASK; /* Update erpir */
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@ -767,6 +795,26 @@ static void ioc3_mii_start(struct ioc3_private *ip)
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add_timer(&ip->ioc3_timer);
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}
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static inline void ioc3_tx_unmap(struct ioc3_private *ip, int entry)
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{
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struct ioc3_etxd *desc;
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u32 cmd, bufcnt, len;
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desc = &ip->txr[entry];
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cmd = be32_to_cpu(desc->cmd);
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bufcnt = be32_to_cpu(desc->bufcnt);
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if (cmd & ETXD_B1V) {
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len = (bufcnt & ETXD_B1CNT_MASK) >> ETXD_B1CNT_SHIFT;
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dma_unmap_single(ip->dma_dev, be64_to_cpu(desc->p1),
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len, DMA_TO_DEVICE);
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}
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if (cmd & ETXD_B2V) {
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len = (bufcnt & ETXD_B2CNT_MASK) >> ETXD_B2CNT_SHIFT;
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dma_unmap_single(ip->dma_dev, be64_to_cpu(desc->p2),
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len, DMA_TO_DEVICE);
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}
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}
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static inline void ioc3_clean_tx_ring(struct ioc3_private *ip)
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{
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struct sk_buff *skb;
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@ -775,6 +823,7 @@ static inline void ioc3_clean_tx_ring(struct ioc3_private *ip)
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for (i = 0; i < TX_RING_ENTRIES; i++) {
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skb = ip->tx_skbs[i];
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if (skb) {
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ioc3_tx_unmap(ip, i);
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ip->tx_skbs[i] = NULL;
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dev_kfree_skb_any(skb);
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}
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@ -787,13 +836,19 @@ static inline void ioc3_clean_tx_ring(struct ioc3_private *ip)
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static void ioc3_free_rx_bufs(struct ioc3_private *ip)
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{
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int rx_entry, n_entry;
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struct sk_buff *skb;
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n_entry = ip->rx_ci;
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rx_entry = ip->rx_pi;
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while (n_entry != rx_entry) {
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dev_kfree_skb_any(ip->rx_skbs[n_entry]);
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skb = ip->rx_skbs[n_entry];
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if (skb) {
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dma_unmap_single(ip->dma_dev,
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be64_to_cpu(ip->rxr[n_entry]),
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RX_BUF_SIZE, DMA_FROM_DEVICE);
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dev_kfree_skb_any(skb);
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}
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n_entry = (n_entry + 1) & RX_RING_MASK;
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}
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}
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@ -802,6 +857,7 @@ static int ioc3_alloc_rx_bufs(struct net_device *dev)
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{
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struct ioc3_private *ip = netdev_priv(dev);
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struct ioc3_erxbuf *rxb;
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dma_addr_t d;
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int i;
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/* Now the rx buffers. The RX ring may be larger but
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@ -809,11 +865,11 @@ static int ioc3_alloc_rx_bufs(struct net_device *dev)
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* this for performance and memory later.
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*/
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for (i = 0; i < RX_BUFFS; i++) {
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if (ioc3_alloc_skb(&ip->rx_skbs[i], &rxb))
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if (ioc3_alloc_skb(ip, &ip->rx_skbs[i], &rxb, &d))
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return -ENOMEM;
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rxb->w0 = 0; /* Clear valid flag */
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ip->rxr[i] = cpu_to_be64(ioc3_map(rxb, 1));
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ip->rxr[i] = cpu_to_be64(ioc3_map(d, PCI64_ATTR_BAR));
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}
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ip->rx_ci = 0;
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ip->rx_pi = RX_BUFFS;
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@ -859,13 +915,7 @@ static void ioc3_init(struct net_device *dev)
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readl(®s->emcr);
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/* Misc registers */
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#ifdef CONFIG_SGI_IP27
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/* Barrier on last store */
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writel(PCI64_ATTR_BAR >> 32, ®s->erbar);
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#else
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/* Let PCI API get it right */
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writel(0, ®s->erbar);
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#endif
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writel(ERBAR_VAL, ®s->erbar);
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readl(®s->etcdc); /* Clear on read */
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writel(15, ®s->ercsr); /* RX low watermark */
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writel(0, ®s->ertr); /* Interrupt immediately */
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@ -881,13 +931,13 @@ static void ioc3_start(struct ioc3_private *ip)
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unsigned long ring;
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/* Now the rx ring base, consume & produce registers. */
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ring = ioc3_map(ip->rxr, 0);
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ring = ioc3_map(ip->rxr_dma, PCI64_ATTR_PREC);
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writel(ring >> 32, ®s->erbr_h);
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writel(ring & 0xffffffff, ®s->erbr_l);
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writel(ip->rx_ci << 3, ®s->ercir);
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writel((ip->rx_pi << 3) | ERPIR_ARM, ®s->erpir);
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ring = ioc3_map(ip->txr, 0);
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ring = ioc3_map(ip->txr_dma, PCI64_ATTR_PREC);
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ip->txqlen = 0; /* nothing queued */
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@ -1161,6 +1211,7 @@ static int ioc3_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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ip = netdev_priv(dev);
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ip->dev = dev;
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ip->dma_dev = &pdev->dev;
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dev->irq = pdev->irq;
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@ -1187,7 +1238,8 @@ static int ioc3_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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ioc3_stop(ip);
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/* Allocate rx ring. 4kb = 512 entries, must be 4kb aligned */
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ip->rxr = (unsigned long *)get_zeroed_page(GFP_KERNEL);
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ip->rxr = dma_direct_alloc_pages(ip->dma_dev, RX_RING_SIZE,
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&ip->rxr_dma, GFP_ATOMIC, 0);
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if (!ip->rxr) {
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pr_err("ioc3-eth: rx ring allocation failed\n");
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err = -ENOMEM;
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@ -1195,7 +1247,9 @@ static int ioc3_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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}
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/* Allocate tx rings. 16kb = 128 bufs, must be 16kb aligned */
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ip->txr = (struct ioc3_etxd *)__get_free_pages(GFP_KERNEL, 2);
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ip->txr = dma_direct_alloc_pages(ip->dma_dev, TX_RING_SIZE,
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&ip->txr_dma,
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GFP_KERNEL | __GFP_ZERO, 0);
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if (!ip->txr) {
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pr_err("ioc3-eth: tx ring allocation failed\n");
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err = -ENOMEM;
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@ -1255,9 +1309,11 @@ static int ioc3_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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out_stop:
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del_timer_sync(&ip->ioc3_timer);
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if (ip->rxr)
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free_page((unsigned long)ip->rxr);
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dma_direct_free_pages(ip->dma_dev, RX_RING_SIZE, ip->rxr,
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ip->rxr_dma, 0);
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if (ip->txr)
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free_pages((unsigned long)ip->txr, 2);
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dma_direct_free_pages(ip->dma_dev, TX_RING_SIZE, ip->txr,
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ip->txr_dma, 0);
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out_res:
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pci_release_regions(pdev);
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out_free:
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@ -1275,8 +1331,10 @@ static void ioc3_remove_one(struct pci_dev *pdev)
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struct net_device *dev = pci_get_drvdata(pdev);
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struct ioc3_private *ip = netdev_priv(dev);
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free_page((unsigned long)ip->rxr);
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free_pages((unsigned long)ip->txr, 2);
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dma_direct_free_pages(ip->dma_dev, RX_RING_SIZE, ip->rxr,
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ip->rxr_dma, 0);
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dma_direct_free_pages(ip->dma_dev, TX_RING_SIZE, ip->txr,
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ip->txr_dma, 0);
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unregister_netdev(dev);
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del_timer_sync(&ip->ioc3_timer);
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@ -1382,18 +1440,32 @@ static netdev_tx_t ioc3_start_xmit(struct sk_buff *skb, struct net_device *dev)
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unsigned long b2 = (data | 0x3fffUL) + 1UL;
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unsigned long s1 = b2 - data;
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unsigned long s2 = data + len - b2;
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dma_addr_t d1, d2;
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desc->cmd = cpu_to_be32(len | ETXD_INTWHENDONE |
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ETXD_B1V | ETXD_B2V | w0);
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desc->bufcnt = cpu_to_be32((s1 << ETXD_B1CNT_SHIFT) |
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(s2 << ETXD_B2CNT_SHIFT));
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desc->p1 = cpu_to_be64(ioc3_map(skb->data, 1));
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desc->p2 = cpu_to_be64(ioc3_map((void *)b2, 1));
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d1 = dma_map_single(ip->dma_dev, skb->data, s1, DMA_TO_DEVICE);
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if (dma_mapping_error(ip->dma_dev, d1))
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goto drop_packet;
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d2 = dma_map_single(ip->dma_dev, (void *)b2, s1, DMA_TO_DEVICE);
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if (dma_mapping_error(ip->dma_dev, d2)) {
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dma_unmap_single(ip->dma_dev, d1, len, DMA_TO_DEVICE);
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goto drop_packet;
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}
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desc->p1 = cpu_to_be64(ioc3_map(d1, PCI64_ATTR_PREF));
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desc->p2 = cpu_to_be64(ioc3_map(d2, PCI64_ATTR_PREF));
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} else {
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dma_addr_t d;
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/* Normal sized packet that doesn't cross a page boundary. */
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desc->cmd = cpu_to_be32(len | ETXD_INTWHENDONE | ETXD_B1V | w0);
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desc->bufcnt = cpu_to_be32(len << ETXD_B1CNT_SHIFT);
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desc->p1 = cpu_to_be64(ioc3_map(skb->data, 1));
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d = dma_map_single(ip->dma_dev, skb->data, len, DMA_TO_DEVICE);
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if (dma_mapping_error(ip->dma_dev, d))
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goto drop_packet;
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desc->p1 = cpu_to_be64(ioc3_map(d, PCI64_ATTR_PREF));
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}
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mb(); /* make sure all descriptor changes are visible */
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@ -1410,6 +1482,14 @@ static netdev_tx_t ioc3_start_xmit(struct sk_buff *skb, struct net_device *dev)
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spin_unlock_irq(&ip->ioc3_lock);
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return NETDEV_TX_OK;
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drop_packet:
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dev_kfree_skb_any(skb);
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dev->stats.tx_dropped++;
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spin_unlock_irq(&ip->ioc3_lock);
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return NETDEV_TX_OK;
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}
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