spi: img-spfi: Setup TRANSACTION register before CONTROL register
Setting the transfer length in the TRANSACTION register after the CONTROL register is programmed causes intermittent timeout issues in SPFI transfers when using the SPI framework to control the CS GPIO lines. To avoid this issue, set transfer length before programming the CONTROL register. Signed-off-by: Sifan Naeem <sifan.naeem@imgtec.com> Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -434,6 +434,9 @@ static void img_spfi_config(struct spi_master *master, struct spi_device *spi,
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val |= div << SPFI_DEVICE_PARAMETER_BITCLK_SHIFT;
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val |= div << SPFI_DEVICE_PARAMETER_BITCLK_SHIFT;
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spfi_writel(spfi, val, SPFI_DEVICE_PARAMETER(spi->chip_select));
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spfi_writel(spfi, val, SPFI_DEVICE_PARAMETER(spi->chip_select));
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spfi_writel(spfi, xfer->len << SPFI_TRANSACTION_TSIZE_SHIFT,
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SPFI_TRANSACTION);
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val = spfi_readl(spfi, SPFI_CONTROL);
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val = spfi_readl(spfi, SPFI_CONTROL);
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val &= ~(SPFI_CONTROL_SEND_DMA | SPFI_CONTROL_GET_DMA);
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val &= ~(SPFI_CONTROL_SEND_DMA | SPFI_CONTROL_GET_DMA);
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if (xfer->tx_buf)
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if (xfer->tx_buf)
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@ -452,8 +455,6 @@ static void img_spfi_config(struct spi_master *master, struct spi_device *spi,
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&master->cur_msg->transfers))
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&master->cur_msg->transfers))
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val |= SPFI_CONTROL_CONTINUE;
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val |= SPFI_CONTROL_CONTINUE;
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spfi_writel(spfi, val, SPFI_CONTROL);
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spfi_writel(spfi, val, SPFI_CONTROL);
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spfi_writel(spfi, xfer->len << SPFI_TRANSACTION_TSIZE_SHIFT,
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SPFI_TRANSACTION);
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}
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}
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static int img_spfi_transfer_one(struct spi_master *master,
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static int img_spfi_transfer_one(struct spi_master *master,
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