drm/amd/display: Changed pipe split policy to allow for multi-display pipe split
[WHY] Current implementation of pipe split policy prevents pipe split with multiple displays connected, which caused the MCLK speed to be stuck at max [HOW] Changed the pipe split policies so that pipe split is allowed for multi-display configurations Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1522 Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1709 Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1655 Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1403 Note this is a backport of this commit from amdgpu drm-next for 5.16. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Angus Wang <angus.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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@ -1069,7 +1069,7 @@ static const struct dc_debug_options debug_defaults_drv = {
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.timing_trace = false,
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.clock_trace = true,
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.disable_pplib_clock_request = true,
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.pipe_split_policy = MPC_SPLIT_AVOID_MULT_DISP,
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.pipe_split_policy = MPC_SPLIT_DYNAMIC,
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.force_single_disp_pipe_split = false,
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.disable_dcc = DCC_ENABLE,
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.vsr_support = true,
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@ -603,7 +603,7 @@ static const struct dc_debug_options debug_defaults_drv = {
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.timing_trace = false,
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.clock_trace = true,
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.disable_pplib_clock_request = true,
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.pipe_split_policy = MPC_SPLIT_AVOID,
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.pipe_split_policy = MPC_SPLIT_DYNAMIC,
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.force_single_disp_pipe_split = false,
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.disable_dcc = DCC_ENABLE,
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.vsr_support = true,
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@ -874,7 +874,7 @@ static const struct dc_debug_options debug_defaults_drv = {
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.clock_trace = true,
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.disable_pplib_clock_request = true,
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.min_disp_clk_khz = 100000,
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.pipe_split_policy = MPC_SPLIT_AVOID_MULT_DISP,
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.pipe_split_policy = MPC_SPLIT_DYNAMIC,
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.force_single_disp_pipe_split = false,
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.disable_dcc = DCC_ENABLE,
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.vsr_support = true,
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@ -840,7 +840,7 @@ static const struct dc_debug_options debug_defaults_drv = {
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.timing_trace = false,
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.clock_trace = true,
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.disable_pplib_clock_request = true,
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.pipe_split_policy = MPC_SPLIT_AVOID_MULT_DISP,
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.pipe_split_policy = MPC_SPLIT_DYNAMIC,
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.force_single_disp_pipe_split = false,
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.disable_dcc = DCC_ENABLE,
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.vsr_support = true,
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@ -686,7 +686,7 @@ static const struct dc_debug_options debug_defaults_drv = {
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.disable_clock_gate = true,
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.disable_pplib_clock_request = true,
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.disable_pplib_wm_range = true,
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.pipe_split_policy = MPC_SPLIT_AVOID_MULT_DISP,
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.pipe_split_policy = MPC_SPLIT_DYNAMIC,
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.force_single_disp_pipe_split = false,
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.disable_dcc = DCC_ENABLE,
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.vsr_support = true,
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@ -211,7 +211,7 @@ static const struct dc_debug_options debug_defaults_drv = {
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.timing_trace = false,
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.clock_trace = true,
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.disable_pplib_clock_request = true,
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.pipe_split_policy = MPC_SPLIT_AVOID_MULT_DISP,
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.pipe_split_policy = MPC_SPLIT_DYNAMIC,
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.force_single_disp_pipe_split = false,
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.disable_dcc = DCC_ENABLE,
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.vsr_support = true,
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@ -193,7 +193,7 @@ static const struct dc_debug_options debug_defaults_drv = {
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.timing_trace = false,
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.clock_trace = true,
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.disable_pplib_clock_request = true,
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.pipe_split_policy = MPC_SPLIT_AVOID_MULT_DISP,
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.pipe_split_policy = MPC_SPLIT_DYNAMIC,
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.force_single_disp_pipe_split = false,
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.disable_dcc = DCC_ENABLE,
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.vsr_support = true,
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@ -1002,7 +1002,7 @@ static const struct dc_debug_options debug_defaults_drv = {
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.timing_trace = false,
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.clock_trace = true,
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.disable_pplib_clock_request = false,
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.pipe_split_policy = MPC_SPLIT_AVOID,
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.pipe_split_policy = MPC_SPLIT_DYNAMIC,
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.force_single_disp_pipe_split = false,
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.disable_dcc = DCC_ENABLE,
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.vsr_support = true,
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