sparc: Use asm-generic/pci-dma-compat
This converts SPARC to use asm-generic/pci-dma-compat instead of the homegrown mechnism. SPARC32 has two dma_map_ops structures for pci and sbus (removing arch/sparc/kernel/dma.c, PCI and SBUS DMA accessor). The global 'dma_ops' is set to sbus_dma_ops and get_dma_ops() returns pci32_dma_ops for pci devices so we can use the appropriate dma mapping operations. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Tested-by: Robert Reif <reif@earthlink.net> Acked-by: David S. Miller <davem@davemloft.net> Cc: tony.luck@intel.com Cc: fenghua.yu@intel.com LKML-Reference: <1249872797-1314-8-git-send-email-fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
FUJITA Tomonori
Ingo Molnar
Родитель
c2c07dbd87
Коммит
ee664a9252
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@ -14,10 +14,15 @@ extern int dma_set_mask(struct device *dev, u64 dma_mask);
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#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
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#define dma_is_consistent(d, h) (1)
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extern struct dma_map_ops *dma_ops;
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extern struct dma_map_ops *dma_ops, pci32_dma_ops;
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extern struct bus_type pci_bus_type;
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static inline struct dma_map_ops *get_dma_ops(struct device *dev)
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{
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#if defined(CONFIG_SPARC32) && defined(CONFIG_PCI)
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if (dev->bus == &pci_bus_type)
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return &pci32_dma_ops;
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#endif
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return dma_ops;
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}
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@ -5,4 +5,7 @@
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#else
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#include <asm/pci_32.h>
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#endif
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#include <asm-generic/pci-dma-compat.h>
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#endif
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@ -31,42 +31,8 @@ static inline void pcibios_penalize_isa_irq(int irq, int active)
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*/
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#define PCI_DMA_BUS_IS_PHYS (0)
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#include <asm/scatterlist.h>
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struct pci_dev;
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/* Allocate and map kernel buffer using consistent mode DMA for a device.
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* hwdev should be valid struct pci_dev pointer for PCI devices.
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*/
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extern void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size, dma_addr_t *dma_handle);
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/* Free and unmap a consistent DMA buffer.
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* cpu_addr is what was returned from pci_alloc_consistent,
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* size must be the same as what as passed into pci_alloc_consistent,
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* and likewise dma_addr must be the same as what *dma_addrp was set to.
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*
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* References to the memory and mappings assosciated with cpu_addr/dma_addr
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* past this call are illegal.
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*/
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extern void pci_free_consistent(struct pci_dev *hwdev, size_t size, void *vaddr, dma_addr_t dma_handle);
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/* Map a single buffer of the indicated size for DMA in streaming mode.
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* The 32-bit bus address to use is returned.
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*
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* Once the device is given the dma address, the device owns this memory
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* until either pci_unmap_single or pci_dma_sync_single_for_cpu is performed.
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*/
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extern dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr, size_t size, int direction);
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/* Unmap a single streaming mode DMA translation. The dma_addr and size
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* must match what was provided for in a previous pci_map_single call. All
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* other usages are undefined.
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*
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* After this call, reads by the cpu to the buffer are guaranteed to see
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* whatever the device wrote there.
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*/
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extern void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr, size_t size, int direction);
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/* pci_unmap_{single,page} is not a nop, thus... */
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#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
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dma_addr_t ADDR_NAME;
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@ -81,69 +47,6 @@ extern void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr, size_t
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#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
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(((PTR)->LEN_NAME) = (VAL))
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/*
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* Same as above, only with pages instead of mapped addresses.
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*/
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extern dma_addr_t pci_map_page(struct pci_dev *hwdev, struct page *page,
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unsigned long offset, size_t size, int direction);
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extern void pci_unmap_page(struct pci_dev *hwdev,
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dma_addr_t dma_address, size_t size, int direction);
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/* Map a set of buffers described by scatterlist in streaming
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* mode for DMA. This is the scather-gather version of the
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* above pci_map_single interface. Here the scatter gather list
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* elements are each tagged with the appropriate dma address
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* and length. They are obtained via sg_dma_{address,length}(SG).
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*
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* NOTE: An implementation may be able to use a smaller number of
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* DMA address/length pairs than there are SG table elements.
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* (for example via virtual mapping capabilities)
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* The routine returns the number of addr/length pairs actually
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* used, at most nents.
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*
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* Device ownership issues as mentioned above for pci_map_single are
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* the same here.
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*/
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extern int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nents, int direction);
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/* Unmap a set of streaming mode DMA translations.
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* Again, cpu read rules concerning calls here are the same as for
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* pci_unmap_single() above.
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*/
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extern void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nhwents, int direction);
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/* Make physical memory consistent for a single
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* streaming mode DMA translation after a transfer.
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*
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* If you perform a pci_map_single() but wish to interrogate the
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* buffer using the cpu, yet do not wish to teardown the PCI dma
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* mapping, you must call this function before doing so. At the
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* next point you give the PCI dma address back to the card, you
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* must first perform a pci_dma_sync_for_device, and then the device
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* again owns the buffer.
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*/
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extern void pci_dma_sync_single_for_cpu(struct pci_dev *hwdev, dma_addr_t dma_handle, size_t size, int direction);
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extern void pci_dma_sync_single_for_device(struct pci_dev *hwdev, dma_addr_t dma_handle, size_t size, int direction);
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/* Make physical memory consistent for a set of streaming
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* mode DMA translations after a transfer.
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*
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* The same as pci_dma_sync_single_* but for a scatter-gather list,
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* same rules and usage.
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*/
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extern void pci_dma_sync_sg_for_cpu(struct pci_dev *hwdev, struct scatterlist *sg, int nelems, int direction);
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extern void pci_dma_sync_sg_for_device(struct pci_dev *hwdev, struct scatterlist *sg, int nelems, int direction);
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/* Return whether the given PCI device DMA address mask can
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* be supported properly. For example, if your device can
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* only drive the low 24-bits during PCI bus mastering, then
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* you would pass 0x00ffffff as the mask to this function.
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*/
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static inline int pci_dma_supported(struct pci_dev *hwdev, u64 mask)
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{
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return 1;
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}
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#ifdef CONFIG_PCI
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static inline void pci_dma_burst_advice(struct pci_dev *pdev,
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enum pci_dma_burst_strategy *strat,
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@ -154,14 +57,6 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
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}
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#endif
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#define PCI_DMA_ERROR_CODE (~(dma_addr_t)0x0)
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static inline int pci_dma_mapping_error(struct pci_dev *pdev,
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dma_addr_t dma_addr)
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{
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return (dma_addr == PCI_DMA_ERROR_CODE);
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}
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struct device_node;
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extern struct device_node *pci_device_to_OF_node(struct pci_dev *pdev);
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@ -35,37 +35,6 @@ static inline void pcibios_penalize_isa_irq(int irq, int active)
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*/
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#define PCI_DMA_BUS_IS_PHYS (0)
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static inline void *pci_alloc_consistent(struct pci_dev *pdev, size_t size,
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dma_addr_t *dma_handle)
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{
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return dma_alloc_coherent(&pdev->dev, size, dma_handle, GFP_ATOMIC);
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}
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static inline void pci_free_consistent(struct pci_dev *pdev, size_t size,
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void *vaddr, dma_addr_t dma_handle)
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{
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return dma_free_coherent(&pdev->dev, size, vaddr, dma_handle);
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}
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static inline dma_addr_t pci_map_single(struct pci_dev *pdev, void *ptr,
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size_t size, int direction)
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{
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return dma_map_single(&pdev->dev, ptr, size,
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(enum dma_data_direction) direction);
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}
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static inline void pci_unmap_single(struct pci_dev *pdev, dma_addr_t dma_addr,
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size_t size, int direction)
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{
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dma_unmap_single(&pdev->dev, dma_addr, size,
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(enum dma_data_direction) direction);
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}
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#define pci_map_page(dev, page, off, size, dir) \
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pci_map_single(dev, (page_address(page) + (off)), size, dir)
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#define pci_unmap_page(dev,addr,sz,dir) \
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pci_unmap_single(dev,addr,sz,dir)
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/* pci_unmap_{single,page} is not a nop, thus... */
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#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
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dma_addr_t ADDR_NAME;
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@ -80,57 +49,6 @@ static inline void pci_unmap_single(struct pci_dev *pdev, dma_addr_t dma_addr,
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#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
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(((PTR)->LEN_NAME) = (VAL))
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static inline int pci_map_sg(struct pci_dev *pdev, struct scatterlist *sg,
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int nents, int direction)
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{
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return dma_map_sg(&pdev->dev, sg, nents,
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(enum dma_data_direction) direction);
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}
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static inline void pci_unmap_sg(struct pci_dev *pdev, struct scatterlist *sg,
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int nents, int direction)
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{
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dma_unmap_sg(&pdev->dev, sg, nents,
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(enum dma_data_direction) direction);
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}
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static inline void pci_dma_sync_single_for_cpu(struct pci_dev *pdev,
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dma_addr_t dma_handle,
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size_t size, int direction)
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{
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dma_sync_single_for_cpu(&pdev->dev, dma_handle, size,
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(enum dma_data_direction) direction);
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}
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static inline void pci_dma_sync_single_for_device(struct pci_dev *pdev,
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dma_addr_t dma_handle,
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size_t size, int direction)
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{
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/* No flushing needed to sync cpu writes to the device. */
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}
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static inline void pci_dma_sync_sg_for_cpu(struct pci_dev *pdev,
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struct scatterlist *sg,
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int nents, int direction)
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{
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dma_sync_sg_for_cpu(&pdev->dev, sg, nents,
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(enum dma_data_direction) direction);
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}
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static inline void pci_dma_sync_sg_for_device(struct pci_dev *pdev,
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struct scatterlist *sg,
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int nelems, int direction)
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{
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/* No flushing needed to sync cpu writes to the device. */
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}
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/* Return whether the given PCI device DMA address mask can
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* be supported properly. For example, if your device can
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* only drive the low 24-bits during PCI bus mastering, then
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* you would pass 0x00ffffff as the mask to this function.
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*/
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extern int pci_dma_supported(struct pci_dev *hwdev, u64 mask);
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/* PCI IOMMU mapping bypass support. */
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/* PCI 64-bit addressing works for all slots on all controller
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@ -140,12 +58,6 @@ extern int pci_dma_supported(struct pci_dev *hwdev, u64 mask);
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#define PCI64_REQUIRED_MASK (~(dma64_addr_t)0)
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#define PCI64_ADDR_BASE 0xfffc000000000000UL
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static inline int pci_dma_mapping_error(struct pci_dev *pdev,
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dma_addr_t dma_addr)
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{
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return dma_mapping_error(&pdev->dev, dma_addr);
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}
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#ifdef CONFIG_PCI
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static inline void pci_dma_burst_advice(struct pci_dev *pdev,
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enum pci_dma_burst_strategy *strat,
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@ -13,13 +13,17 @@
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#include <linux/pci.h>
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#endif
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#include "dma.h"
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/*
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* Return whether the given PCI device DMA address mask can be
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* supported properly. For example, if your device can only drive the
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* low 24-bits during PCI bus mastering, then you would pass
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* 0x00ffffff as the mask to this function.
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*/
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int dma_supported(struct device *dev, u64 mask)
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{
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#ifdef CONFIG_PCI
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if (dev->bus == &pci_bus_type)
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return pci_dma_supported(to_pci_dev(dev), mask);
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return 1;
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#endif
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return 0;
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}
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@ -34,148 +38,3 @@ int dma_set_mask(struct device *dev, u64 dma_mask)
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return -EOPNOTSUPP;
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}
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EXPORT_SYMBOL(dma_set_mask);
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static void *dma32_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t flag)
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{
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#ifdef CONFIG_PCI
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if (dev->bus == &pci_bus_type)
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return pci_alloc_consistent(to_pci_dev(dev), size, dma_handle);
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#endif
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return sbus_alloc_consistent(dev, size, dma_handle);
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}
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static void dma32_free_coherent(struct device *dev, size_t size,
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void *cpu_addr, dma_addr_t dma_handle)
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{
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#ifdef CONFIG_PCI
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if (dev->bus == &pci_bus_type) {
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pci_free_consistent(to_pci_dev(dev), size,
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cpu_addr, dma_handle);
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return;
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}
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#endif
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sbus_free_consistent(dev, size, cpu_addr, dma_handle);
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}
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static dma_addr_t dma32_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size,
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enum dma_data_direction direction,
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struct dma_attrs *attrs)
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{
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#ifdef CONFIG_PCI
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if (dev->bus == &pci_bus_type)
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return pci_map_page(to_pci_dev(dev), page, offset,
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size, (int)direction);
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#endif
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return sbus_map_page(dev, page, offset, size, (int)direction);
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}
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static void dma32_unmap_page(struct device *dev, dma_addr_t dma_address,
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size_t size, enum dma_data_direction direction,
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struct dma_attrs *attrs)
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{
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#ifdef CONFIG_PCI
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if (dev->bus == &pci_bus_type) {
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pci_unmap_page(to_pci_dev(dev), dma_address,
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size, (int)direction);
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return;
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}
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#endif
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sbus_unmap_page(dev, dma_address, size, (int)direction);
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}
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static int dma32_map_sg(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction direction,
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struct dma_attrs *attrs)
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{
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#ifdef CONFIG_PCI
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if (dev->bus == &pci_bus_type)
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return pci_map_sg(to_pci_dev(dev), sg, nents, (int)direction);
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#endif
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return sbus_map_sg(dev, sg, nents, direction);
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}
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void dma32_unmap_sg(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction direction,
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struct dma_attrs *attrs)
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{
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#ifdef CONFIG_PCI
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if (dev->bus == &pci_bus_type) {
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pci_unmap_sg(to_pci_dev(dev), sg, nents, (int)direction);
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return;
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}
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#endif
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sbus_unmap_sg(dev, sg, nents, (int)direction);
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}
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static void dma32_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
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size_t size,
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enum dma_data_direction direction)
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{
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#ifdef CONFIG_PCI
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if (dev->bus == &pci_bus_type) {
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pci_dma_sync_single_for_cpu(to_pci_dev(dev), dma_handle,
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size, (int)direction);
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return;
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}
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#endif
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sbus_dma_sync_single_for_cpu(dev, dma_handle, size, (int) direction);
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}
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static void dma32_sync_single_for_device(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction direction)
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{
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#ifdef CONFIG_PCI
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if (dev->bus == &pci_bus_type) {
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pci_dma_sync_single_for_device(to_pci_dev(dev), dma_handle,
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size, (int)direction);
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return;
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}
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#endif
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sbus_dma_sync_single_for_device(dev, dma_handle, size, (int) direction);
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}
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static void dma32_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
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int nelems, enum dma_data_direction direction)
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{
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#ifdef CONFIG_PCI
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if (dev->bus == &pci_bus_type) {
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pci_dma_sync_sg_for_cpu(to_pci_dev(dev), sg,
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nelems, (int)direction);
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return;
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}
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#endif
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BUG();
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}
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static void dma32_sync_sg_for_device(struct device *dev,
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struct scatterlist *sg, int nelems,
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enum dma_data_direction direction)
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{
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#ifdef CONFIG_PCI
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if (dev->bus == &pci_bus_type) {
|
||||
pci_dma_sync_sg_for_device(to_pci_dev(dev), sg,
|
||||
nelems, (int)direction);
|
||||
return;
|
||||
}
|
||||
#endif
|
||||
BUG();
|
||||
}
|
||||
|
||||
static struct dma_map_ops dma32_dma_ops = {
|
||||
.alloc_coherent = dma32_alloc_coherent,
|
||||
.free_coherent = dma32_free_coherent,
|
||||
.map_page = dma32_map_page,
|
||||
.unmap_page = dma32_unmap_page,
|
||||
.map_sg = dma32_map_sg,
|
||||
.unmap_sg = dma32_unmap_sg,
|
||||
.sync_single_for_cpu = dma32_sync_single_for_cpu,
|
||||
.sync_single_for_device = dma32_sync_single_for_device,
|
||||
.sync_sg_for_cpu = dma32_sync_sg_for_cpu,
|
||||
.sync_sg_for_device = dma32_sync_sg_for_device,
|
||||
};
|
||||
|
||||
struct dma_map_ops *dma_ops = &dma32_dma_ops;
|
||||
EXPORT_SYMBOL(dma_ops);
|
||||
|
|
|
|||
|
|
@ -1,14 +0,0 @@
|
|||
void *sbus_alloc_consistent(struct device *dev, long len, u32 *dma_addrp);
|
||||
void sbus_free_consistent(struct device *dev, long n, void *p, u32 ba);
|
||||
dma_addr_t sbus_map_page(struct device *dev, struct page *page,
|
||||
unsigned long offset, size_t len, int direction);
|
||||
void sbus_unmap_page(struct device *dev, dma_addr_t ba,
|
||||
size_t n, int direction);
|
||||
int sbus_map_sg(struct device *dev, struct scatterlist *sg,
|
||||
int n, int direction);
|
||||
void sbus_unmap_sg(struct device *dev, struct scatterlist *sg,
|
||||
int n, int direction);
|
||||
void sbus_dma_sync_single_for_cpu(struct device *dev, dma_addr_t ba,
|
||||
size_t size, int direction);
|
||||
void sbus_dma_sync_single_for_device(struct device *dev, dma_addr_t ba,
|
||||
size_t size, int direction);
|
||||
|
|
@ -840,6 +840,8 @@ static struct dma_map_ops sun4u_dma_ops = {
|
|||
struct dma_map_ops *dma_ops = &sun4u_dma_ops;
|
||||
EXPORT_SYMBOL(dma_ops);
|
||||
|
||||
extern int pci64_dma_supported(struct pci_dev *pdev, u64 device_mask);
|
||||
|
||||
int dma_supported(struct device *dev, u64 device_mask)
|
||||
{
|
||||
struct iommu *iommu = dev->archdata.iommu;
|
||||
|
|
@ -853,7 +855,7 @@ int dma_supported(struct device *dev, u64 device_mask)
|
|||
|
||||
#ifdef CONFIG_PCI
|
||||
if (dev->bus == &pci_bus_type)
|
||||
return pci_dma_supported(to_pci_dev(dev), device_mask);
|
||||
return pci64_dma_supported(to_pci_dev(dev), device_mask);
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
|
|
|
|||
|
|
@ -48,8 +48,6 @@
|
|||
#include <asm/iommu.h>
|
||||
#include <asm/io-unit.h>
|
||||
|
||||
#include "dma.h"
|
||||
|
||||
#define mmu_inval_dma_area(p, l) /* Anton pulled it out for 2.4.0-xx */
|
||||
|
||||
static struct resource *_sparc_find_resource(struct resource *r,
|
||||
|
|
@ -246,7 +244,8 @@ EXPORT_SYMBOL(sbus_set_sbus64);
|
|||
* Typically devices use them for control blocks.
|
||||
* CPU may access them without any explicit flushing.
|
||||
*/
|
||||
void *sbus_alloc_consistent(struct device *dev, long len, u32 *dma_addrp)
|
||||
static void *sbus_alloc_coherent(struct device *dev, size_t len,
|
||||
dma_addr_t *dma_addrp, gfp_t gfp)
|
||||
{
|
||||
struct of_device *op = to_of_device(dev);
|
||||
unsigned long len_total = (len + PAGE_SIZE-1) & PAGE_MASK;
|
||||
|
|
@ -299,7 +298,8 @@ err_nopages:
|
|||
return NULL;
|
||||
}
|
||||
|
||||
void sbus_free_consistent(struct device *dev, long n, void *p, u32 ba)
|
||||
static void sbus_free_coherent(struct device *dev, size_t n, void *p,
|
||||
dma_addr_t ba)
|
||||
{
|
||||
struct resource *res;
|
||||
struct page *pgv;
|
||||
|
|
@ -317,7 +317,7 @@ void sbus_free_consistent(struct device *dev, long n, void *p, u32 ba)
|
|||
|
||||
n = (n + PAGE_SIZE-1) & PAGE_MASK;
|
||||
if ((res->end-res->start)+1 != n) {
|
||||
printk("sbus_free_consistent: region 0x%lx asked 0x%lx\n",
|
||||
printk("sbus_free_consistent: region 0x%lx asked 0x%zx\n",
|
||||
(long)((res->end-res->start)+1), n);
|
||||
return;
|
||||
}
|
||||
|
|
@ -337,8 +337,10 @@ void sbus_free_consistent(struct device *dev, long n, void *p, u32 ba)
|
|||
* CPU view of this memory may be inconsistent with
|
||||
* a device view and explicit flushing is necessary.
|
||||
*/
|
||||
dma_addr_t sbus_map_page(struct device *dev, struct page *page,
|
||||
unsigned long offset, size_t len, int direction)
|
||||
static dma_addr_t sbus_map_page(struct device *dev, struct page *page,
|
||||
unsigned long offset, size_t len,
|
||||
enum dma_data_direction dir,
|
||||
struct dma_attrs *attrs)
|
||||
{
|
||||
void *va = page_address(page) + offset;
|
||||
|
||||
|
|
@ -353,12 +355,14 @@ dma_addr_t sbus_map_page(struct device *dev, struct page *page,
|
|||
return mmu_get_scsi_one(dev, va, len);
|
||||
}
|
||||
|
||||
void sbus_unmap_page(struct device *dev, dma_addr_t ba, size_t n, int direction)
|
||||
static void sbus_unmap_page(struct device *dev, dma_addr_t ba, size_t n,
|
||||
enum dma_data_direction dir, struct dma_attrs *attrs)
|
||||
{
|
||||
mmu_release_scsi_one(dev, ba, n);
|
||||
}
|
||||
|
||||
int sbus_map_sg(struct device *dev, struct scatterlist *sg, int n, int direction)
|
||||
static int sbus_map_sg(struct device *dev, struct scatterlist *sg, int n,
|
||||
enum dma_data_direction dir, struct dma_attrs *attrs)
|
||||
{
|
||||
mmu_get_scsi_sgl(dev, sg, n);
|
||||
|
||||
|
|
@ -369,19 +373,38 @@ int sbus_map_sg(struct device *dev, struct scatterlist *sg, int n, int direction
|
|||
return n;
|
||||
}
|
||||
|
||||
void sbus_unmap_sg(struct device *dev, struct scatterlist *sg, int n, int direction)
|
||||
static void sbus_unmap_sg(struct device *dev, struct scatterlist *sg, int n,
|
||||
enum dma_data_direction dir, struct dma_attrs *attrs)
|
||||
{
|
||||
mmu_release_scsi_sgl(dev, sg, n);
|
||||
}
|
||||
|
||||
void sbus_dma_sync_single_for_cpu(struct device *dev, dma_addr_t ba, size_t size, int direction)
|
||||
static void sbus_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
|
||||
int n, enum dma_data_direction dir)
|
||||
{
|
||||
BUG();
|
||||
}
|
||||
|
||||
void sbus_dma_sync_single_for_device(struct device *dev, dma_addr_t ba, size_t size, int direction)
|
||||
static void sbus_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
|
||||
int n, enum dma_data_direction dir)
|
||||
{
|
||||
BUG();
|
||||
}
|
||||
|
||||
struct dma_map_ops sbus_dma_ops = {
|
||||
.alloc_coherent = sbus_alloc_coherent,
|
||||
.free_coherent = sbus_free_coherent,
|
||||
.map_page = sbus_map_page,
|
||||
.unmap_page = sbus_unmap_page,
|
||||
.map_sg = sbus_map_sg,
|
||||
.unmap_sg = sbus_unmap_sg,
|
||||
.sync_sg_for_cpu = sbus_sync_sg_for_cpu,
|
||||
.sync_sg_for_device = sbus_sync_sg_for_device,
|
||||
};
|
||||
|
||||
struct dma_map_ops *dma_ops = &sbus_dma_ops;
|
||||
EXPORT_SYMBOL(dma_ops);
|
||||
|
||||
static int __init sparc_register_ioport(void)
|
||||
{
|
||||
register_proc_sparc_ioport();
|
||||
|
|
@ -398,7 +421,8 @@ arch_initcall(sparc_register_ioport);
|
|||
/* Allocate and map kernel buffer using consistent mode DMA for a device.
|
||||
* hwdev should be valid struct pci_dev pointer for PCI devices.
|
||||
*/
|
||||
void *pci_alloc_consistent(struct pci_dev *pdev, size_t len, dma_addr_t *pba)
|
||||
static void *pci32_alloc_coherent(struct device *dev, size_t len,
|
||||
dma_addr_t *pba, gfp_t gfp)
|
||||
{
|
||||
unsigned long len_total = (len + PAGE_SIZE-1) & PAGE_MASK;
|
||||
unsigned long va;
|
||||
|
|
@ -442,7 +466,6 @@ void *pci_alloc_consistent(struct pci_dev *pdev, size_t len, dma_addr_t *pba)
|
|||
*pba = virt_to_phys(va); /* equals virt_to_bus (R.I.P.) for us. */
|
||||
return (void *) res->start;
|
||||
}
|
||||
EXPORT_SYMBOL(pci_alloc_consistent);
|
||||
|
||||
/* Free and unmap a consistent DMA buffer.
|
||||
* cpu_addr is what was returned from pci_alloc_consistent,
|
||||
|
|
@ -452,7 +475,8 @@ EXPORT_SYMBOL(pci_alloc_consistent);
|
|||
* References to the memory and mappings associated with cpu_addr/dma_addr
|
||||
* past this call are illegal.
|
||||
*/
|
||||
void pci_free_consistent(struct pci_dev *pdev, size_t n, void *p, dma_addr_t ba)
|
||||
static void pci32_free_coherent(struct device *dev, size_t n, void *p,
|
||||
dma_addr_t ba)
|
||||
{
|
||||
struct resource *res;
|
||||
unsigned long pgp;
|
||||
|
|
@ -484,60 +508,18 @@ void pci_free_consistent(struct pci_dev *pdev, size_t n, void *p, dma_addr_t ba)
|
|||
|
||||
free_pages(pgp, get_order(n));
|
||||
}
|
||||
EXPORT_SYMBOL(pci_free_consistent);
|
||||
|
||||
/* Map a single buffer of the indicated size for DMA in streaming mode.
|
||||
* The 32-bit bus address to use is returned.
|
||||
*
|
||||
* Once the device is given the dma address, the device owns this memory
|
||||
* until either pci_unmap_single or pci_dma_sync_single_* is performed.
|
||||
*/
|
||||
dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr, size_t size,
|
||||
int direction)
|
||||
{
|
||||
BUG_ON(direction == PCI_DMA_NONE);
|
||||
/* IIep is write-through, not flushing. */
|
||||
return virt_to_phys(ptr);
|
||||
}
|
||||
EXPORT_SYMBOL(pci_map_single);
|
||||
|
||||
/* Unmap a single streaming mode DMA translation. The dma_addr and size
|
||||
* must match what was provided for in a previous pci_map_single call. All
|
||||
* other usages are undefined.
|
||||
*
|
||||
* After this call, reads by the cpu to the buffer are guaranteed to see
|
||||
* whatever the device wrote there.
|
||||
*/
|
||||
void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t ba, size_t size,
|
||||
int direction)
|
||||
{
|
||||
BUG_ON(direction == PCI_DMA_NONE);
|
||||
if (direction != PCI_DMA_TODEVICE) {
|
||||
mmu_inval_dma_area((unsigned long)phys_to_virt(ba),
|
||||
(size + PAGE_SIZE-1) & PAGE_MASK);
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL(pci_unmap_single);
|
||||
|
||||
/*
|
||||
* Same as pci_map_single, but with pages.
|
||||
*/
|
||||
dma_addr_t pci_map_page(struct pci_dev *hwdev, struct page *page,
|
||||
unsigned long offset, size_t size, int direction)
|
||||
static dma_addr_t pci32_map_page(struct device *dev, struct page *page,
|
||||
unsigned long offset, size_t size,
|
||||
enum dma_data_direction dir,
|
||||
struct dma_attrs *attrs)
|
||||
{
|
||||
BUG_ON(direction == PCI_DMA_NONE);
|
||||
/* IIep is write-through, not flushing. */
|
||||
return page_to_phys(page) + offset;
|
||||
}
|
||||
EXPORT_SYMBOL(pci_map_page);
|
||||
|
||||
void pci_unmap_page(struct pci_dev *hwdev,
|
||||
dma_addr_t dma_address, size_t size, int direction)
|
||||
{
|
||||
BUG_ON(direction == PCI_DMA_NONE);
|
||||
/* mmu_inval_dma_area XXX */
|
||||
}
|
||||
EXPORT_SYMBOL(pci_unmap_page);
|
||||
|
||||
/* Map a set of buffers described by scatterlist in streaming
|
||||
* mode for DMA. This is the scather-gather version of the
|
||||
|
|
@ -554,13 +536,13 @@ EXPORT_SYMBOL(pci_unmap_page);
|
|||
* Device ownership issues as mentioned above for pci_map_single are
|
||||
* the same here.
|
||||
*/
|
||||
int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sgl, int nents,
|
||||
int direction)
|
||||
static int pci32_map_sg(struct device *device, struct scatterlist *sgl,
|
||||
int nents, enum dma_data_direction dir,
|
||||
struct dma_attrs *attrs)
|
||||
{
|
||||
struct scatterlist *sg;
|
||||
int n;
|
||||
|
||||
BUG_ON(direction == PCI_DMA_NONE);
|
||||
/* IIep is write-through, not flushing. */
|
||||
for_each_sg(sgl, sg, nents, n) {
|
||||
BUG_ON(page_address(sg_page(sg)) == NULL);
|
||||
|
|
@ -569,20 +551,19 @@ int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sgl, int nents,
|
|||
}
|
||||
return nents;
|
||||
}
|
||||
EXPORT_SYMBOL(pci_map_sg);
|
||||
|
||||
/* Unmap a set of streaming mode DMA translations.
|
||||
* Again, cpu read rules concerning calls here are the same as for
|
||||
* pci_unmap_single() above.
|
||||
*/
|
||||
void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sgl, int nents,
|
||||
int direction)
|
||||
static void pci32_unmap_sg(struct device *dev, struct scatterlist *sgl,
|
||||
int nents, enum dma_data_direction dir,
|
||||
struct dma_attrs *attrs)
|
||||
{
|
||||
struct scatterlist *sg;
|
||||
int n;
|
||||
|
||||
BUG_ON(direction == PCI_DMA_NONE);
|
||||
if (direction != PCI_DMA_TODEVICE) {
|
||||
if (dir != PCI_DMA_TODEVICE) {
|
||||
for_each_sg(sgl, sg, nents, n) {
|
||||
BUG_ON(page_address(sg_page(sg)) == NULL);
|
||||
mmu_inval_dma_area(
|
||||
|
|
@ -591,7 +572,6 @@ void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sgl, int nents,
|
|||
}
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL(pci_unmap_sg);
|
||||
|
||||
/* Make physical memory consistent for a single
|
||||
* streaming mode DMA translation before or after a transfer.
|
||||
|
|
@ -603,25 +583,23 @@ EXPORT_SYMBOL(pci_unmap_sg);
|
|||
* must first perform a pci_dma_sync_for_device, and then the
|
||||
* device again owns the buffer.
|
||||
*/
|
||||
void pci_dma_sync_single_for_cpu(struct pci_dev *hwdev, dma_addr_t ba, size_t size, int direction)
|
||||
static void pci32_sync_single_for_cpu(struct device *dev, dma_addr_t ba,
|
||||
size_t size, enum dma_data_direction dir)
|
||||
{
|
||||
BUG_ON(direction == PCI_DMA_NONE);
|
||||
if (direction != PCI_DMA_TODEVICE) {
|
||||
if (dir != PCI_DMA_TODEVICE) {
|
||||
mmu_inval_dma_area((unsigned long)phys_to_virt(ba),
|
||||
(size + PAGE_SIZE-1) & PAGE_MASK);
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL(pci_dma_sync_single_for_cpu);
|
||||
|
||||
void pci_dma_sync_single_for_device(struct pci_dev *hwdev, dma_addr_t ba, size_t size, int direction)
|
||||
static void pci32_sync_single_for_device(struct device *dev, dma_addr_t ba,
|
||||
size_t size, enum dma_data_direction dir)
|
||||
{
|
||||
BUG_ON(direction == PCI_DMA_NONE);
|
||||
if (direction != PCI_DMA_TODEVICE) {
|
||||
if (dir != PCI_DMA_TODEVICE) {
|
||||
mmu_inval_dma_area((unsigned long)phys_to_virt(ba),
|
||||
(size + PAGE_SIZE-1) & PAGE_MASK);
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL(pci_dma_sync_single_for_device);
|
||||
|
||||
/* Make physical memory consistent for a set of streaming
|
||||
* mode DMA translations after a transfer.
|
||||
|
|
@ -629,13 +607,13 @@ EXPORT_SYMBOL(pci_dma_sync_single_for_device);
|
|||
* The same as pci_dma_sync_single_* but for a scatter-gather list,
|
||||
* same rules and usage.
|
||||
*/
|
||||
void pci_dma_sync_sg_for_cpu(struct pci_dev *hwdev, struct scatterlist *sgl, int nents, int direction)
|
||||
static void pci32_sync_sg_for_cpu(struct device *dev, struct scatterlist *sgl,
|
||||
int nents, enum dma_data_direction dir)
|
||||
{
|
||||
struct scatterlist *sg;
|
||||
int n;
|
||||
|
||||
BUG_ON(direction == PCI_DMA_NONE);
|
||||
if (direction != PCI_DMA_TODEVICE) {
|
||||
if (dir != PCI_DMA_TODEVICE) {
|
||||
for_each_sg(sgl, sg, nents, n) {
|
||||
BUG_ON(page_address(sg_page(sg)) == NULL);
|
||||
mmu_inval_dma_area(
|
||||
|
|
@ -644,15 +622,14 @@ void pci_dma_sync_sg_for_cpu(struct pci_dev *hwdev, struct scatterlist *sgl, int
|
|||
}
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL(pci_dma_sync_sg_for_cpu);
|
||||
|
||||
void pci_dma_sync_sg_for_device(struct pci_dev *hwdev, struct scatterlist *sgl, int nents, int direction)
|
||||
static void pci32_sync_sg_for_device(struct device *device, struct scatterlist *sgl,
|
||||
int nents, enum dma_data_direction dir)
|
||||
{
|
||||
struct scatterlist *sg;
|
||||
int n;
|
||||
|
||||
BUG_ON(direction == PCI_DMA_NONE);
|
||||
if (direction != PCI_DMA_TODEVICE) {
|
||||
if (dir != PCI_DMA_TODEVICE) {
|
||||
for_each_sg(sgl, sg, nents, n) {
|
||||
BUG_ON(page_address(sg_page(sg)) == NULL);
|
||||
mmu_inval_dma_area(
|
||||
|
|
@ -661,7 +638,20 @@ void pci_dma_sync_sg_for_device(struct pci_dev *hwdev, struct scatterlist *sgl,
|
|||
}
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL(pci_dma_sync_sg_for_device);
|
||||
|
||||
struct dma_map_ops pci32_dma_ops = {
|
||||
.alloc_coherent = pci32_alloc_coherent,
|
||||
.free_coherent = pci32_free_coherent,
|
||||
.map_page = pci32_map_page,
|
||||
.map_sg = pci32_map_sg,
|
||||
.unmap_sg = pci32_unmap_sg,
|
||||
.sync_single_for_cpu = pci32_sync_single_for_cpu,
|
||||
.sync_single_for_device = pci32_sync_single_for_device,
|
||||
.sync_sg_for_cpu = pci32_sync_sg_for_cpu,
|
||||
.sync_sg_for_device = pci32_sync_sg_for_device,
|
||||
};
|
||||
EXPORT_SYMBOL(pci32_dma_ops);
|
||||
|
||||
#endif /* CONFIG_PCI */
|
||||
|
||||
#ifdef CONFIG_PROC_FS
|
||||
|
|
|
|||
|
|
@ -1039,7 +1039,7 @@ static void ali_sound_dma_hack(struct pci_dev *pdev, int set_bit)
|
|||
pci_dev_put(ali_isa_bridge);
|
||||
}
|
||||
|
||||
int pci_dma_supported(struct pci_dev *pdev, u64 device_mask)
|
||||
int pci64_dma_supported(struct pci_dev *pdev, u64 device_mask)
|
||||
{
|
||||
u64 dma_addr_mask;
|
||||
|
||||
|
|
|
|||
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