drm: Use pr_cont where appropriate
Using 'printk("\n")' is not preferred anymore and
using printk to continue logging messages now produces
multiple line logging output unless the continuations
use KERN_CONT.
Convert these uses to appropriately use pr_cont or a
single printk where possible.
Miscellanea:
o Use a temporary const char * instead of multiple printks
o Remove trailing space from logging by using a leading space instead
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Joe Perches
Alex Deucher
Родитель
9dc5a91e4d
Коммит
eeca232490
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@ -31,86 +31,88 @@
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void amdgpu_dpm_print_class_info(u32 class, u32 class2)
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{
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printk("\tui class: ");
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const char *s;
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switch (class & ATOM_PPLIB_CLASSIFICATION_UI_MASK) {
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case ATOM_PPLIB_CLASSIFICATION_UI_NONE:
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default:
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printk("none\n");
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s = "none";
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break;
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case ATOM_PPLIB_CLASSIFICATION_UI_BATTERY:
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printk("battery\n");
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s = "battery";
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break;
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case ATOM_PPLIB_CLASSIFICATION_UI_BALANCED:
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printk("balanced\n");
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s = "balanced";
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break;
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case ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE:
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printk("performance\n");
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s = "performance";
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break;
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}
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printk("\tinternal class: ");
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printk("\tui class: %s\n", s);
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printk("\tinternal class:");
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if (((class & ~ATOM_PPLIB_CLASSIFICATION_UI_MASK) == 0) &&
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(class2 == 0))
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printk("none");
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pr_cont(" none");
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else {
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if (class & ATOM_PPLIB_CLASSIFICATION_BOOT)
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printk("boot ");
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pr_cont(" boot");
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if (class & ATOM_PPLIB_CLASSIFICATION_THERMAL)
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printk("thermal ");
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pr_cont(" thermal");
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if (class & ATOM_PPLIB_CLASSIFICATION_LIMITEDPOWERSOURCE)
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printk("limited_pwr ");
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pr_cont(" limited_pwr");
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if (class & ATOM_PPLIB_CLASSIFICATION_REST)
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printk("rest ");
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pr_cont(" rest");
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if (class & ATOM_PPLIB_CLASSIFICATION_FORCED)
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printk("forced ");
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pr_cont(" forced");
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if (class & ATOM_PPLIB_CLASSIFICATION_3DPERFORMANCE)
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printk("3d_perf ");
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pr_cont(" 3d_perf");
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if (class & ATOM_PPLIB_CLASSIFICATION_OVERDRIVETEMPLATE)
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printk("ovrdrv ");
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pr_cont(" ovrdrv");
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if (class & ATOM_PPLIB_CLASSIFICATION_UVDSTATE)
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printk("uvd ");
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pr_cont(" uvd");
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if (class & ATOM_PPLIB_CLASSIFICATION_3DLOW)
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printk("3d_low ");
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pr_cont(" 3d_low");
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if (class & ATOM_PPLIB_CLASSIFICATION_ACPI)
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printk("acpi ");
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pr_cont(" acpi");
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if (class & ATOM_PPLIB_CLASSIFICATION_HD2STATE)
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printk("uvd_hd2 ");
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pr_cont(" uvd_hd2");
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if (class & ATOM_PPLIB_CLASSIFICATION_HDSTATE)
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printk("uvd_hd ");
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pr_cont(" uvd_hd");
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if (class & ATOM_PPLIB_CLASSIFICATION_SDSTATE)
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printk("uvd_sd ");
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pr_cont(" uvd_sd");
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if (class2 & ATOM_PPLIB_CLASSIFICATION2_LIMITEDPOWERSOURCE_2)
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printk("limited_pwr2 ");
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pr_cont(" limited_pwr2");
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if (class2 & ATOM_PPLIB_CLASSIFICATION2_ULV)
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printk("ulv ");
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pr_cont(" ulv");
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if (class2 & ATOM_PPLIB_CLASSIFICATION2_MVC)
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printk("uvd_mvc ");
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pr_cont(" uvd_mvc");
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}
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printk("\n");
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pr_cont("\n");
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}
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void amdgpu_dpm_print_cap_info(u32 caps)
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{
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printk("\tcaps: ");
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printk("\tcaps:");
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if (caps & ATOM_PPLIB_SINGLE_DISPLAY_ONLY)
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printk("single_disp ");
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pr_cont(" single_disp");
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if (caps & ATOM_PPLIB_SUPPORTS_VIDEO_PLAYBACK)
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printk("video ");
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pr_cont(" video");
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if (caps & ATOM_PPLIB_DISALLOW_ON_DC)
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printk("no_dc ");
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printk("\n");
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pr_cont(" no_dc");
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pr_cont("\n");
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}
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void amdgpu_dpm_print_ps_status(struct amdgpu_device *adev,
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struct amdgpu_ps *rps)
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{
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printk("\tstatus: ");
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printk("\tstatus:");
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if (rps == adev->pm.dpm.current_ps)
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printk("c ");
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pr_cont(" c");
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if (rps == adev->pm.dpm.requested_ps)
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printk("r ");
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pr_cont(" r");
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if (rps == adev->pm.dpm.boot_ps)
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printk("b ");
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printk("\n");
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pr_cont(" b");
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pr_cont("\n");
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}
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@ -69,86 +69,89 @@ const u32 r600_dtc[R600_PM_NUMBER_OF_TC] =
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void r600_dpm_print_class_info(u32 class, u32 class2)
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{
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printk("\tui class: ");
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const char *s;
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switch (class & ATOM_PPLIB_CLASSIFICATION_UI_MASK) {
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case ATOM_PPLIB_CLASSIFICATION_UI_NONE:
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default:
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printk("none\n");
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s = "none";
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break;
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case ATOM_PPLIB_CLASSIFICATION_UI_BATTERY:
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printk("battery\n");
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s = "battery";
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break;
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case ATOM_PPLIB_CLASSIFICATION_UI_BALANCED:
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printk("balanced\n");
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s = "balanced";
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break;
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case ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE:
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printk("performance\n");
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s = "performance";
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break;
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}
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printk("\tinternal class: ");
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printk("\tui class: %s\n", s);
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printk("\tinternal class:");
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if (((class & ~ATOM_PPLIB_CLASSIFICATION_UI_MASK) == 0) &&
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(class2 == 0))
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printk("none");
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pr_cont(" none");
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else {
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if (class & ATOM_PPLIB_CLASSIFICATION_BOOT)
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printk("boot ");
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pr_cont(" boot");
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if (class & ATOM_PPLIB_CLASSIFICATION_THERMAL)
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printk("thermal ");
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pr_cont(" thermal");
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if (class & ATOM_PPLIB_CLASSIFICATION_LIMITEDPOWERSOURCE)
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printk("limited_pwr ");
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pr_cont(" limited_pwr");
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if (class & ATOM_PPLIB_CLASSIFICATION_REST)
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printk("rest ");
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pr_cont(" rest");
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if (class & ATOM_PPLIB_CLASSIFICATION_FORCED)
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printk("forced ");
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pr_cont(" forced");
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if (class & ATOM_PPLIB_CLASSIFICATION_3DPERFORMANCE)
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printk("3d_perf ");
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pr_cont(" 3d_perf");
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if (class & ATOM_PPLIB_CLASSIFICATION_OVERDRIVETEMPLATE)
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printk("ovrdrv ");
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pr_cont(" ovrdrv");
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if (class & ATOM_PPLIB_CLASSIFICATION_UVDSTATE)
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printk("uvd ");
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pr_cont(" uvd");
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if (class & ATOM_PPLIB_CLASSIFICATION_3DLOW)
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printk("3d_low ");
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pr_cont(" 3d_low");
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if (class & ATOM_PPLIB_CLASSIFICATION_ACPI)
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printk("acpi ");
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pr_cont(" acpi");
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if (class & ATOM_PPLIB_CLASSIFICATION_HD2STATE)
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printk("uvd_hd2 ");
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pr_cont(" uvd_hd2");
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if (class & ATOM_PPLIB_CLASSIFICATION_HDSTATE)
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printk("uvd_hd ");
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pr_cont(" uvd_hd");
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if (class & ATOM_PPLIB_CLASSIFICATION_SDSTATE)
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printk("uvd_sd ");
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pr_cont(" uvd_sd");
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if (class2 & ATOM_PPLIB_CLASSIFICATION2_LIMITEDPOWERSOURCE_2)
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printk("limited_pwr2 ");
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pr_cont(" limited_pwr2");
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if (class2 & ATOM_PPLIB_CLASSIFICATION2_ULV)
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printk("ulv ");
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pr_cont(" ulv");
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if (class2 & ATOM_PPLIB_CLASSIFICATION2_MVC)
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printk("uvd_mvc ");
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pr_cont(" uvd_mvc");
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}
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printk("\n");
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pr_cont("\n");
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}
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void r600_dpm_print_cap_info(u32 caps)
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{
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printk("\tcaps: ");
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printk("\tcaps:");
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if (caps & ATOM_PPLIB_SINGLE_DISPLAY_ONLY)
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printk("single_disp ");
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pr_cont(" single_disp");
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if (caps & ATOM_PPLIB_SUPPORTS_VIDEO_PLAYBACK)
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printk("video ");
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pr_cont(" video");
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if (caps & ATOM_PPLIB_DISALLOW_ON_DC)
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printk("no_dc ");
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printk("\n");
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pr_cont(" no_dc");
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pr_cont("\n");
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}
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void r600_dpm_print_ps_status(struct radeon_device *rdev,
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struct radeon_ps *rps)
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{
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printk("\tstatus: ");
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printk("\tstatus:");
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if (rps == rdev->pm.dpm.current_ps)
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printk("c ");
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pr_cont(" c");
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if (rps == rdev->pm.dpm.requested_ps)
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printk("r ");
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pr_cont(" r");
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if (rps == rdev->pm.dpm.boot_ps)
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printk("b ");
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printk("\n");
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pr_cont(" b");
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pr_cont("\n");
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}
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u32 r600_dpm_get_vblank_time(struct radeon_device *rdev)
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