powerpc/eeh: Cleanup unnecessary eeh_pe_state_mark_with_cfg()
The function eeh_pe_state_mark_with_cfg() just performs the work of eeh_pe_state_mark() and then, conditionally, the work of eeh_pe_state_clear(). However it is only ever called with a constant state such that the condition is always true, so replace it by direct calls. Signed-off-by: Sam Bobroff <sbobroff@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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54644927a0
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eed4bdbeec
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@ -830,7 +830,8 @@ int pcibios_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state stat
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eeh_pe_state_clear(pe, EEH_PE_ISOLATED);
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eeh_pe_state_clear(pe, EEH_PE_ISOLATED);
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break;
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break;
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case pcie_hot_reset:
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case pcie_hot_reset:
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eeh_pe_state_mark_with_cfg(pe, EEH_PE_ISOLATED);
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eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
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eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED);
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eeh_ops->set_option(pe, EEH_OPT_FREEZE_PE);
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eeh_ops->set_option(pe, EEH_OPT_FREEZE_PE);
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eeh_pe_dev_traverse(pe, eeh_disable_and_save_dev_state, dev);
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eeh_pe_dev_traverse(pe, eeh_disable_and_save_dev_state, dev);
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if (!(pe->type & EEH_PE_VF))
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if (!(pe->type & EEH_PE_VF))
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@ -838,7 +839,8 @@ int pcibios_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state stat
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eeh_ops->reset(pe, EEH_RESET_HOT);
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eeh_ops->reset(pe, EEH_RESET_HOT);
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break;
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break;
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case pcie_warm_reset:
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case pcie_warm_reset:
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eeh_pe_state_mark_with_cfg(pe, EEH_PE_ISOLATED);
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eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
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eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED);
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eeh_ops->set_option(pe, EEH_OPT_FREEZE_PE);
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eeh_ops->set_option(pe, EEH_OPT_FREEZE_PE);
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eeh_pe_dev_traverse(pe, eeh_disable_and_save_dev_state, dev);
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eeh_pe_dev_traverse(pe, eeh_disable_and_save_dev_state, dev);
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if (!(pe->type & EEH_PE_VF))
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if (!(pe->type & EEH_PE_VF))
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@ -670,28 +670,6 @@ void eeh_pe_state_clear(struct eeh_pe *pe, int state)
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eeh_pe_traverse(pe, __eeh_pe_state_clear, &state);
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eeh_pe_traverse(pe, __eeh_pe_state_clear, &state);
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}
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}
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/**
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* eeh_pe_state_mark_with_cfg - Mark PE state with unblocked config space
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* @pe: PE
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* @state: PE state to be set
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*
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* Set specified flag to PE and its child PEs. The PCI config space
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* of some PEs is blocked automatically when EEH_PE_ISOLATED is set,
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* which isn't needed in some situations. The function allows to set
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* the specified flag to indicated PEs without blocking their PCI
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* config space.
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*/
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void eeh_pe_state_mark_with_cfg(struct eeh_pe *pe, int state)
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{
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eeh_pe_traverse(pe, __eeh_pe_state_mark, &state);
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if (!(state & EEH_PE_ISOLATED))
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return;
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/* Clear EEH_PE_CFG_BLOCKED, which might be set just now */
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state = EEH_PE_CFG_BLOCKED;
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eeh_pe_traverse(pe, __eeh_pe_state_clear, &state);
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}
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/*
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/*
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* Some PCI bridges (e.g. PLX bridges) have primary/secondary
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* Some PCI bridges (e.g. PLX bridges) have primary/secondary
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* buses assigned explicitly by firmware, and we probably have
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* buses assigned explicitly by firmware, and we probably have
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