PCI/DPC: Enable DPC only if AER is available
The "Determination of DPC Control" implementation note in PCIe r4.0, sec 6.1.10, recommends the operating system always link DPC control to the control of AER, as the two functionalities are strongly connected. To avoid conflicts over whether platform firmware or the OS controls DPC, enable DPC only if AER is enabled in the OS, and the device's error handling does not have firmware-first AER handling. Signed-off-by: Keith Busch <keith.busch@intel.com> Signed-off-by: Bjorn Helgaas <helgaas@kernel.org>
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@ -92,7 +92,7 @@ config PCIE_PME
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config PCIE_DPC
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bool "PCIe Downstream Port Containment support"
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depends on PCIEPORTBUS
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depends on PCIEPORTBUS && PCIEAER
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default n
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help
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This enables PCI Express Downstream Port Containment (DPC)
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@ -15,6 +15,7 @@
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#include <linux/pci.h>
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#include <linux/pcieport_if.h>
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#include "../pci.h"
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#include "aer/aerdrv.h"
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struct rp_pio_header_log_regs {
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u32 dw0;
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@ -309,6 +310,9 @@ static int dpc_probe(struct pcie_device *dev)
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int status;
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u16 ctl, cap;
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if (pcie_aer_get_firmware_first(pdev))
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return -ENOTSUPP;
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dpc = devm_kzalloc(device, sizeof(*dpc), GFP_KERNEL);
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if (!dpc)
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return -ENOMEM;
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@ -216,9 +216,9 @@ static int get_port_device_capability(struct pci_dev *dev)
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return 0;
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cap_mask = PCIE_PORT_SERVICE_PME | PCIE_PORT_SERVICE_HP
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| PCIE_PORT_SERVICE_VC | PCIE_PORT_SERVICE_DPC;
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| PCIE_PORT_SERVICE_VC;
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if (pci_aer_available())
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cap_mask |= PCIE_PORT_SERVICE_AER;
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cap_mask |= PCIE_PORT_SERVICE_AER | PCIE_PORT_SERVICE_DPC;
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if (pcie_ports_auto)
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pcie_port_platform_notify(dev, &cap_mask);
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