Merge branch 'irq/wire-msi-bridge' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core
Pull the MSI wire bridge implementation from Marc Zyngier along with the first user of it. This is infrastructure to support a wired interrupt to MSI interrupt brigde. The first user is mbigen found in Hisilicon ARM SoCs.
This commit is contained in:
Thomas Gleixner
Коммит
ef0bf620e9
|
|
@ -587,7 +587,7 @@ used to control it:
|
|||
|
||||
modprobe ipmi_watchdog timeout=<t> pretimeout=<t> action=<action type>
|
||||
preaction=<preaction type> preop=<preop type> start_now=x
|
||||
nowayout=x ifnum_to_use=n
|
||||
nowayout=x ifnum_to_use=n panic_wdt_timeout=<t>
|
||||
|
||||
ifnum_to_use specifies which interface the watchdog timer should use.
|
||||
The default is -1, which means to pick the first one registered.
|
||||
|
|
@ -597,7 +597,9 @@ is the amount of seconds before the reset that the pre-timeout panic will
|
|||
occur (if pretimeout is zero, then pretimeout will not be enabled). Note
|
||||
that the pretimeout is the time before the final timeout. So if the
|
||||
timeout is 50 seconds and the pretimeout is 10 seconds, then the pretimeout
|
||||
will occur in 40 second (10 seconds before the timeout).
|
||||
will occur in 40 second (10 seconds before the timeout). The panic_wdt_timeout
|
||||
is the value of timeout which is set on kernel panic, in order to let actions
|
||||
such as kdump to occur during panic.
|
||||
|
||||
The action may be "reset", "power_cycle", or "power_off", and
|
||||
specifies what to do when the timer times out, and defaults to
|
||||
|
|
@ -634,6 +636,7 @@ for configuring the watchdog:
|
|||
ipmi_watchdog.preop=<preop type>
|
||||
ipmi_watchdog.start_now=x
|
||||
ipmi_watchdog.nowayout=x
|
||||
ipmi_watchdog.panic_wdt_timeout=<t>
|
||||
|
||||
The options are the same as the module parameter options.
|
||||
|
||||
|
|
|
|||
|
|
@ -49,24 +49,6 @@ specified through DTS. Following are the DTS used:-
|
|||
The device tree documentation for the keystone machines are located at
|
||||
Documentation/devicetree/bindings/arm/keystone/keystone.txt
|
||||
|
||||
Known issues & workaround
|
||||
-------------------------
|
||||
|
||||
Some of the device drivers used on keystone are re-used from that from
|
||||
DaVinci and other TI SoCs. These device drivers may use clock APIs directly.
|
||||
Some of the keystone specific drivers such as netcp uses run time power
|
||||
management API instead to enable clock. As this API has limitations on
|
||||
keystone, following workaround is needed to boot Linux.
|
||||
|
||||
Add 'clk_ignore_unused' to the bootargs env variable in u-boot. Otherwise
|
||||
clock frameworks will try to disable clocks that are unused and disable
|
||||
the hardware. This is because netcp related power domain and clock
|
||||
domains are enabled in u-boot as run time power management API currently
|
||||
doesn't enable clocks for netcp due to a limitation. This workaround is
|
||||
expected to be removed in the future when proper API support becomes
|
||||
available. Until then, this work around is needed.
|
||||
|
||||
|
||||
Document Author
|
||||
---------------
|
||||
Murali Karicheri <m-karicheri2@ti.com>
|
||||
|
|
|
|||
|
|
@ -70,3 +70,6 @@ use_per_node_hctx=[0/1]: Default: 0
|
|||
parameter.
|
||||
1: The multi-queue block layer is instantiated with a hardware dispatch
|
||||
queue for each CPU node in the system.
|
||||
|
||||
use_lightnvm=[0/1]: Default: 0
|
||||
Register device with LightNVM. Requires blk-mq to be used.
|
||||
|
|
|
|||
|
|
@ -11,6 +11,10 @@ Required properties:
|
|||
0 = active high
|
||||
1 = active low
|
||||
|
||||
Optional properties:
|
||||
- little-endian : GPIO registers are used as little endian. If not
|
||||
present registers are used as big endian by default.
|
||||
|
||||
Example:
|
||||
|
||||
gpio0: gpio@1100 {
|
||||
|
|
|
|||
|
|
@ -0,0 +1,74 @@
|
|||
Hisilicon mbigen device tree bindings.
|
||||
=======================================
|
||||
|
||||
Mbigen means: message based interrupt generator.
|
||||
|
||||
MBI is kind of msi interrupt only used on Non-PCI devices.
|
||||
|
||||
To reduce the wired interrupt number connected to GIC,
|
||||
Hisilicon designed mbigen to collect and generate interrupt.
|
||||
|
||||
|
||||
Non-pci devices can connect to mbigen and generate the
|
||||
interrupt by writing ITS register.
|
||||
|
||||
The mbigen chip and devices connect to mbigen have the following properties:
|
||||
|
||||
Mbigen main node required properties:
|
||||
-------------------------------------------
|
||||
- compatible: Should be "hisilicon,mbigen-v2"
|
||||
|
||||
- reg: Specifies the base physical address and size of the Mbigen
|
||||
registers.
|
||||
|
||||
- interrupt controller: Identifies the node as an interrupt controller
|
||||
|
||||
- msi-parent: Specifies the MSI controller this mbigen use.
|
||||
For more detail information,please refer to the generic msi-parent binding in
|
||||
Documentation/devicetree/bindings/interrupt-controller/msi.txt.
|
||||
|
||||
- num-pins: the total number of pins implemented in this Mbigen
|
||||
instance.
|
||||
|
||||
- #interrupt-cells : Specifies the number of cells needed to encode an
|
||||
interrupt source. The value must be 2.
|
||||
|
||||
The 1st cell is hardware pin number of the interrupt.This number is local to
|
||||
each mbigen chip and in the range from 0 to the maximum interrupts number
|
||||
of the mbigen.
|
||||
|
||||
The 2nd cell is the interrupt trigger type.
|
||||
The value of this cell should be:
|
||||
1: rising edge triggered
|
||||
or
|
||||
4: high level triggered
|
||||
|
||||
Examples:
|
||||
|
||||
mbigen_device_gmac:intc {
|
||||
compatible = "hisilicon,mbigen-v2";
|
||||
reg = <0x0 0xc0080000 0x0 0x10000>;
|
||||
interrupt-controller;
|
||||
msi-parent = <&its_dsa 0x40b1c>;
|
||||
num-pins = <9>;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
Devices connect to mbigen required properties:
|
||||
----------------------------------------------------
|
||||
-interrupt-parent: Specifies the mbigen device node which device connected.
|
||||
|
||||
-interrupts:Specifies the interrupt source.
|
||||
For the specific information of each cell in this property,please refer to
|
||||
the "interrupt-cells" description mentioned above.
|
||||
|
||||
Examples:
|
||||
gmac0: ethernet@c2080000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0 0xc2080000 0 0x20000>,
|
||||
<0 0xc0000000 0 0x1000>;
|
||||
interrupt-parent = <&mbigen_device_gmac>;
|
||||
interrupts = <656 1>,
|
||||
<657 1>;
|
||||
};
|
||||
|
|
@ -8,6 +8,11 @@ Required properties:
|
|||
- phy-mode: See ethernet.txt file in the same directory
|
||||
- clocks: a pointer to the reference clock for this device.
|
||||
|
||||
Optional properties:
|
||||
- tx-csum-limit: maximum mtu supported by port that allow TX checksum.
|
||||
Value is presented in bytes. If not used, by default 1600B is set for
|
||||
"marvell,armada-370-neta" and 9800B for others.
|
||||
|
||||
Example:
|
||||
|
||||
ethernet@d0070000 {
|
||||
|
|
@ -15,6 +20,7 @@ ethernet@d0070000 {
|
|||
reg = <0xd0070000 0x2500>;
|
||||
interrupts = <8>;
|
||||
clocks = <&gate_clk 4>;
|
||||
tx-csum-limit = <9800>
|
||||
status = "okay";
|
||||
phy = <&phy0>;
|
||||
phy-mode = "rgmii-id";
|
||||
|
|
|
|||
|
|
@ -1,7 +1,9 @@
|
|||
* Temperature Sensor ADC (TSADC) on rockchip SoCs
|
||||
|
||||
Required properties:
|
||||
- compatible : "rockchip,rk3288-tsadc"
|
||||
- compatible : should be "rockchip,<name>-tsadc"
|
||||
"rockchip,rk3288-tsadc": found on RK3288 SoCs
|
||||
"rockchip,rk3368-tsadc": found on RK3368 SoCs
|
||||
- reg : physical base address of the controller and length of memory mapped
|
||||
region.
|
||||
- interrupts : The interrupt number to the cpu. The interrupt specifier format
|
||||
|
|
|
|||
|
|
@ -32,6 +32,7 @@ Supported adapters:
|
|||
* Intel Sunrise Point-LP (PCH)
|
||||
* Intel DNV (SOC)
|
||||
* Intel Broxton (SOC)
|
||||
* Intel Lewisburg (PCH)
|
||||
Datasheets: Publicly available at the Intel website
|
||||
|
||||
On Intel Patsburg and later chipsets, both the normal host SMBus controller
|
||||
|
|
|
|||
|
|
@ -1583,9 +1583,6 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
|||
hwp_only
|
||||
Only load intel_pstate on systems which support
|
||||
hardware P state control (HWP) if available.
|
||||
no_acpi
|
||||
Don't use ACPI processor performance control objects
|
||||
_PSS and _PPC specified limits.
|
||||
|
||||
intremap= [X86-64, Intel-IOMMU]
|
||||
on enable Interrupt Remapping (default)
|
||||
|
|
|
|||
61
MAINTAINERS
61
MAINTAINERS
|
|
@ -318,7 +318,7 @@ M: Zhang Rui <rui.zhang@intel.com>
|
|||
L: linux-acpi@vger.kernel.org
|
||||
W: https://01.org/linux-acpi
|
||||
S: Supported
|
||||
F: drivers/acpi/video.c
|
||||
F: drivers/acpi/acpi_video.c
|
||||
|
||||
ACPI WMI DRIVER
|
||||
L: platform-driver-x86@vger.kernel.org
|
||||
|
|
@ -1847,7 +1847,7 @@ S: Supported
|
|||
F: drivers/net/wireless/ath/ath6kl/
|
||||
|
||||
WILOCITY WIL6210 WIRELESS DRIVER
|
||||
M: Vladimir Kondratiev <qca_vkondrat@qca.qualcomm.com>
|
||||
M: Maya Erez <qca_merez@qca.qualcomm.com>
|
||||
L: linux-wireless@vger.kernel.org
|
||||
L: wil6210@qca.qualcomm.com
|
||||
S: Supported
|
||||
|
|
@ -1931,7 +1931,7 @@ S: Supported
|
|||
F: drivers/i2c/busses/i2c-at91.c
|
||||
|
||||
ATMEL ISI DRIVER
|
||||
M: Josh Wu <josh.wu@atmel.com>
|
||||
M: Ludovic Desroches <ludovic.desroches@atmel.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
S: Supported
|
||||
F: drivers/media/platform/soc_camera/atmel-isi.c
|
||||
|
|
@ -1950,7 +1950,8 @@ S: Supported
|
|||
F: drivers/net/ethernet/cadence/
|
||||
|
||||
ATMEL NAND DRIVER
|
||||
M: Josh Wu <josh.wu@atmel.com>
|
||||
M: Wenyou Yang <wenyou.yang@atmel.com>
|
||||
M: Josh Wu <rainyfeeling@outlook.com>
|
||||
L: linux-mtd@lists.infradead.org
|
||||
S: Supported
|
||||
F: drivers/mtd/nand/atmel_nand*
|
||||
|
|
@ -2449,7 +2450,9 @@ F: drivers/firmware/broadcom/*
|
|||
|
||||
BROADCOM STB NAND FLASH DRIVER
|
||||
M: Brian Norris <computersforpeace@gmail.com>
|
||||
M: Kamal Dasu <kdasu.kdev@gmail.com>
|
||||
L: linux-mtd@lists.infradead.org
|
||||
L: bcm-kernel-feedback-list@broadcom.com
|
||||
S: Maintained
|
||||
F: drivers/mtd/nand/brcmnand/
|
||||
|
||||
|
|
@ -2546,7 +2549,7 @@ F: arch/c6x/
|
|||
|
||||
CACHEFILES: FS-CACHE BACKEND FOR CACHING ON MOUNTED FILESYSTEMS
|
||||
M: David Howells <dhowells@redhat.com>
|
||||
L: linux-cachefs@redhat.com
|
||||
L: linux-cachefs@redhat.com (moderated for non-subscribers)
|
||||
S: Supported
|
||||
F: Documentation/filesystems/caching/cachefiles.txt
|
||||
F: fs/cachefiles/
|
||||
|
|
@ -2929,10 +2932,9 @@ S: Maintained
|
|||
F: drivers/platform/x86/compal-laptop.c
|
||||
|
||||
CONEXANT ACCESSRUNNER USB DRIVER
|
||||
M: Simon Arlott <cxacru@fire.lp0.eu>
|
||||
L: accessrunner-general@lists.sourceforge.net
|
||||
W: http://accessrunner.sourceforge.net/
|
||||
S: Maintained
|
||||
S: Orphan
|
||||
F: drivers/usb/atm/cxacru.c
|
||||
|
||||
CONFIGFS
|
||||
|
|
@ -2973,6 +2975,7 @@ F: kernel/cpuset.c
|
|||
CONTROL GROUP - MEMORY RESOURCE CONTROLLER (MEMCG)
|
||||
M: Johannes Weiner <hannes@cmpxchg.org>
|
||||
M: Michal Hocko <mhocko@kernel.org>
|
||||
M: Vladimir Davydov <vdavydov@virtuozzo.com>
|
||||
L: cgroups@vger.kernel.org
|
||||
L: linux-mm@kvack.org
|
||||
S: Maintained
|
||||
|
|
@ -4409,6 +4412,7 @@ K: fmc_d.*register
|
|||
|
||||
FPGA MANAGER FRAMEWORK
|
||||
M: Alan Tull <atull@opensource.altera.com>
|
||||
R: Moritz Fischer <moritz.fischer@ettus.com>
|
||||
S: Maintained
|
||||
F: drivers/fpga/
|
||||
F: include/linux/fpga/fpga-mgr.h
|
||||
|
|
@ -4559,7 +4563,7 @@ F: include/linux/frontswap.h
|
|||
|
||||
FS-CACHE: LOCAL CACHING FOR NETWORK FILESYSTEMS
|
||||
M: David Howells <dhowells@redhat.com>
|
||||
L: linux-cachefs@redhat.com
|
||||
L: linux-cachefs@redhat.com (moderated for non-subscribers)
|
||||
S: Supported
|
||||
F: Documentation/filesystems/caching/
|
||||
F: fs/fscache/
|
||||
|
|
@ -5711,13 +5715,6 @@ M: Juanjo Ciarlante <jjciarla@raiz.uncu.edu.ar>
|
|||
S: Maintained
|
||||
F: net/ipv4/netfilter/ipt_MASQUERADE.c
|
||||
|
||||
IP1000A 10/100/1000 GIGABIT ETHERNET DRIVER
|
||||
M: Francois Romieu <romieu@fr.zoreil.com>
|
||||
M: Sorbica Shieh <sorbica@icplus.com.tw>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/net/ethernet/icplus/ipg.*
|
||||
|
||||
IPATH DRIVER
|
||||
M: Mike Marciniszyn <infinipath@intel.com>
|
||||
L: linux-rdma@vger.kernel.org
|
||||
|
|
@ -6371,6 +6368,7 @@ F: arch/*/include/asm/pmem.h
|
|||
LIGHTNVM PLATFORM SUPPORT
|
||||
M: Matias Bjorling <mb@lightnvm.io>
|
||||
W: http://github/OpenChannelSSD
|
||||
L: linux-block@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/lightnvm/
|
||||
F: include/linux/lightnvm.h
|
||||
|
|
@ -6923,13 +6921,21 @@ F: drivers/scsi/megaraid.*
|
|||
F: drivers/scsi/megaraid/
|
||||
|
||||
MELLANOX ETHERNET DRIVER (mlx4_en)
|
||||
M: Amir Vadai <amirv@mellanox.com>
|
||||
M: Eugenia Emantayev <eugenia@mellanox.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
W: http://www.mellanox.com
|
||||
Q: http://patchwork.ozlabs.org/project/netdev/list/
|
||||
F: drivers/net/ethernet/mellanox/mlx4/en_*
|
||||
|
||||
MELLANOX ETHERNET DRIVER (mlx5e)
|
||||
M: Saeed Mahameed <saeedm@mellanox.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
W: http://www.mellanox.com
|
||||
Q: http://patchwork.ozlabs.org/project/netdev/list/
|
||||
F: drivers/net/ethernet/mellanox/mlx5/core/en_*
|
||||
|
||||
MELLANOX ETHERNET SWITCH DRIVERS
|
||||
M: Jiri Pirko <jiri@mellanox.com>
|
||||
M: Ido Schimmel <idosch@mellanox.com>
|
||||
|
|
@ -7901,6 +7907,18 @@ S: Maintained
|
|||
F: net/openvswitch/
|
||||
F: include/uapi/linux/openvswitch.h
|
||||
|
||||
OPERATING PERFORMANCE POINTS (OPP)
|
||||
M: Viresh Kumar <vireshk@kernel.org>
|
||||
M: Nishanth Menon <nm@ti.com>
|
||||
M: Stephen Boyd <sboyd@codeaurora.org>
|
||||
L: linux-pm@vger.kernel.org
|
||||
S: Maintained
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm.git
|
||||
F: drivers/base/power/opp/
|
||||
F: include/linux/pm_opp.h
|
||||
F: Documentation/power/opp.txt
|
||||
F: Documentation/devicetree/bindings/opp/
|
||||
|
||||
OPL4 DRIVER
|
||||
M: Clemens Ladisch <clemens@ladisch.de>
|
||||
L: alsa-devel@alsa-project.org (moderated for non-subscribers)
|
||||
|
|
@ -8269,7 +8287,7 @@ F: include/linux/delayacct.h
|
|||
F: kernel/delayacct.c
|
||||
|
||||
PERFORMANCE EVENTS SUBSYSTEM
|
||||
M: Peter Zijlstra <a.p.zijlstra@chello.nl>
|
||||
M: Peter Zijlstra <peterz@infradead.org>
|
||||
M: Ingo Molnar <mingo@redhat.com>
|
||||
M: Arnaldo Carvalho de Melo <acme@kernel.org>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
|
|
@ -9314,7 +9332,6 @@ F: drivers/i2c/busses/i2c-designware-*
|
|||
F: include/linux/platform_data/i2c-designware.h
|
||||
|
||||
SYNOPSYS DESIGNWARE MMC/SD/SDIO DRIVER
|
||||
M: Seungwon Jeon <tgih.jun@samsung.com>
|
||||
M: Jaehoon Chung <jh80.chung@samsung.com>
|
||||
L: linux-mmc@vger.kernel.org
|
||||
S: Maintained
|
||||
|
|
@ -9411,8 +9428,10 @@ F: include/scsi/sg.h
|
|||
|
||||
SCSI SUBSYSTEM
|
||||
M: "James E.J. Bottomley" <JBottomley@odin.com>
|
||||
L: linux-scsi@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi.git
|
||||
M: "Martin K. Petersen" <martin.petersen@oracle.com>
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/mkp/scsi.git
|
||||
L: linux-scsi@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/scsi/
|
||||
F: include/scsi/
|
||||
|
|
@ -10887,9 +10906,9 @@ S: Maintained
|
|||
F: drivers/media/tuners/tua9001*
|
||||
|
||||
TULIP NETWORK DRIVERS
|
||||
M: Grant Grundler <grundler@parisc-linux.org>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
L: linux-parisc@vger.kernel.org
|
||||
S: Orphan
|
||||
F: drivers/net/ethernet/dec/tulip/
|
||||
|
||||
TUN/TAP driver
|
||||
|
|
|
|||
2
Makefile
2
Makefile
|
|
@ -1,7 +1,7 @@
|
|||
VERSION = 4
|
||||
PATCHLEVEL = 4
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc1
|
||||
EXTRAVERSION = -rc5
|
||||
NAME = Blurry Fish Butt
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
CONFIG_CROSS_COMPILE="arc-linux-uclibc-"
|
||||
CONFIG_CROSS_COMPILE="arc-linux-"
|
||||
CONFIG_DEFAULT_HOSTNAME="ARCLinux"
|
||||
# CONFIG_SWAP is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
CONFIG_CROSS_COMPILE="arc-linux-uclibc-"
|
||||
CONFIG_CROSS_COMPILE="arc-linux-"
|
||||
CONFIG_DEFAULT_HOSTNAME="ARCLinux"
|
||||
# CONFIG_SWAP is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
CONFIG_CROSS_COMPILE="arc-linux-uclibc-"
|
||||
CONFIG_CROSS_COMPILE="arc-linux-"
|
||||
CONFIG_DEFAULT_HOSTNAME="ARCLinux"
|
||||
# CONFIG_SWAP is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
CONFIG_CROSS_COMPILE="arc-linux-uclibc-"
|
||||
CONFIG_CROSS_COMPILE="arc-linux-"
|
||||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
CONFIG_DEFAULT_HOSTNAME="ARCLinux"
|
||||
# CONFIG_SWAP is not set
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
CONFIG_CROSS_COMPILE="arc-linux-uclibc-"
|
||||
CONFIG_CROSS_COMPILE="arc-linux-"
|
||||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
CONFIG_DEFAULT_HOSTNAME="ARCLinux"
|
||||
# CONFIG_SWAP is not set
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
CONFIG_CROSS_COMPILE="arc-linux-uclibc-"
|
||||
CONFIG_CROSS_COMPILE="arc-linux-"
|
||||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
CONFIG_DEFAULT_HOSTNAME="ARCLinux"
|
||||
# CONFIG_SWAP is not set
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
CONFIG_CROSS_COMPILE="arc-linux-uclibc-"
|
||||
CONFIG_CROSS_COMPILE="arc-linux-"
|
||||
CONFIG_DEFAULT_HOSTNAME="ARCLinux"
|
||||
# CONFIG_SWAP is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
CONFIG_CROSS_COMPILE="arc-linux-uclibc-"
|
||||
CONFIG_CROSS_COMPILE="arc-linux-"
|
||||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
CONFIG_DEFAULT_HOSTNAME="ARCLinux"
|
||||
# CONFIG_CROSS_MEMORY_ATTACH is not set
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
CONFIG_CROSS_COMPILE="arc-linux-uclibc-"
|
||||
CONFIG_CROSS_COMPILE="arc-linux-"
|
||||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
CONFIG_DEFAULT_HOSTNAME="ARCLinux"
|
||||
# CONFIG_CROSS_MEMORY_ATTACH is not set
|
||||
|
|
|
|||
|
|
@ -37,6 +37,9 @@
|
|||
#define ISA_INIT_STATUS_BITS (STATUS_IE_MASK | STATUS_AD_MASK | \
|
||||
(ARCV2_IRQ_DEF_PRIO << 1))
|
||||
|
||||
/* SLEEP needs default irq priority (<=) which can interrupt the doze */
|
||||
#define ISA_SLEEP_ARG (0x10 | ARCV2_IRQ_DEF_PRIO)
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -43,6 +43,8 @@
|
|||
|
||||
#define ISA_INIT_STATUS_BITS STATUS_IE_MASK
|
||||
|
||||
#define ISA_SLEEP_ARG 0x3
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
/******************************************************************
|
||||
|
|
|
|||
|
|
@ -58,8 +58,6 @@ __switch_to(struct task_struct *prev_task, struct task_struct *next_task)
|
|||
"st sp, [r24] \n\t"
|
||||
#endif
|
||||
|
||||
"sync \n\t"
|
||||
|
||||
/*
|
||||
* setup _current_task with incoming tsk.
|
||||
* optionally, set r25 to that as well
|
||||
|
|
|
|||
|
|
@ -44,9 +44,6 @@ __switch_to:
|
|||
* don't need to do anything special to return it
|
||||
*/
|
||||
|
||||
/* hardware memory barrier */
|
||||
sync
|
||||
|
||||
/*
|
||||
* switch to new task, contained in r1
|
||||
* Temp reg r3 is required to get the ptr to store val
|
||||
|
|
|
|||
|
|
@ -44,11 +44,10 @@ SYSCALL_DEFINE0(arc_gettls)
|
|||
void arch_cpu_idle(void)
|
||||
{
|
||||
/* sleep, but enable all interrupts before committing */
|
||||
if (is_isa_arcompact()) {
|
||||
__asm__("sleep 0x3");
|
||||
} else {
|
||||
__asm__("sleep 0x10");
|
||||
}
|
||||
__asm__ __volatile__(
|
||||
"sleep %0 \n"
|
||||
:
|
||||
:"I"(ISA_SLEEP_ARG)); /* can't be "r" has to be embedded const */
|
||||
}
|
||||
|
||||
asmlinkage void ret_from_fork(void);
|
||||
|
|
|
|||
|
|
@ -986,42 +986,13 @@ int arc_unwind(struct unwind_frame_info *frame)
|
|||
(const u8 *)(fde +
|
||||
1) +
|
||||
*fde, ptrType);
|
||||
if (pc >= endLoc)
|
||||
if (pc >= endLoc) {
|
||||
fde = NULL;
|
||||
} else
|
||||
fde = NULL;
|
||||
}
|
||||
if (fde == NULL) {
|
||||
for (fde = table->address, tableSize = table->size;
|
||||
cie = NULL, tableSize > sizeof(*fde)
|
||||
&& tableSize - sizeof(*fde) >= *fde;
|
||||
tableSize -= sizeof(*fde) + *fde,
|
||||
fde += 1 + *fde / sizeof(*fde)) {
|
||||
cie = cie_for_fde(fde, table);
|
||||
if (cie == &bad_cie) {
|
||||
cie = NULL;
|
||||
break;
|
||||
}
|
||||
if (cie == NULL
|
||||
|| cie == ¬_fde
|
||||
|| (ptrType = fde_pointer_type(cie)) < 0)
|
||||
continue;
|
||||
ptr = (const u8 *)(fde + 2);
|
||||
startLoc = read_pointer(&ptr,
|
||||
(const u8 *)(fde + 1) +
|
||||
*fde, ptrType);
|
||||
if (!startLoc)
|
||||
continue;
|
||||
if (!(ptrType & DW_EH_PE_indirect))
|
||||
ptrType &=
|
||||
DW_EH_PE_FORM | DW_EH_PE_signed;
|
||||
endLoc =
|
||||
startLoc + read_pointer(&ptr,
|
||||
(const u8 *)(fde +
|
||||
1) +
|
||||
*fde, ptrType);
|
||||
if (pc >= startLoc && pc < endLoc)
|
||||
break;
|
||||
} else {
|
||||
fde = NULL;
|
||||
cie = NULL;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -619,10 +619,10 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long vaddr_unaligned,
|
|||
|
||||
int dirty = !test_and_set_bit(PG_dc_clean, &page->flags);
|
||||
if (dirty) {
|
||||
/* wback + inv dcache lines */
|
||||
/* wback + inv dcache lines (K-mapping) */
|
||||
__flush_dcache_page(paddr, paddr);
|
||||
|
||||
/* invalidate any existing icache lines */
|
||||
/* invalidate any existing icache lines (U-mapping) */
|
||||
if (vma->vm_flags & VM_EXEC)
|
||||
__inv_icache_page(paddr, vaddr);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -76,6 +76,8 @@ config ARM
|
|||
select IRQ_FORCED_THREADING
|
||||
select MODULES_USE_ELF_REL
|
||||
select NO_BOOTMEM
|
||||
select OF_EARLY_FLATTREE if OF
|
||||
select OF_RESERVED_MEM if OF
|
||||
select OLD_SIGACTION
|
||||
select OLD_SIGSUSPEND3
|
||||
select PERF_USE_VMALLOC
|
||||
|
|
@ -1822,8 +1824,6 @@ config USE_OF
|
|||
bool "Flattened Device Tree support"
|
||||
select IRQ_DOMAIN
|
||||
select OF
|
||||
select OF_EARLY_FLATTREE
|
||||
select OF_RESERVED_MEM
|
||||
help
|
||||
Include support for flattened device tree machine descriptions.
|
||||
|
||||
|
|
|
|||
|
|
@ -74,7 +74,7 @@
|
|||
reg = <0x48240200 0x100>;
|
||||
interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-parent = <&gic>;
|
||||
clocks = <&dpll_mpu_m2_ck>;
|
||||
clocks = <&mpu_periphclk>;
|
||||
};
|
||||
|
||||
local_timer: timer@48240600 {
|
||||
|
|
@ -82,7 +82,7 @@
|
|||
reg = <0x48240600 0x100>;
|
||||
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-parent = <&gic>;
|
||||
clocks = <&dpll_mpu_m2_ck>;
|
||||
clocks = <&mpu_periphclk>;
|
||||
};
|
||||
|
||||
l2-cache-controller@48242000 {
|
||||
|
|
|
|||
|
|
@ -259,6 +259,14 @@
|
|||
ti,invert-autoidle-bit;
|
||||
};
|
||||
|
||||
mpu_periphclk: mpu_periphclk {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-factor-clock";
|
||||
clocks = <&dpll_mpu_m2_ck>;
|
||||
clock-mult = <1>;
|
||||
clock-div = <2>;
|
||||
};
|
||||
|
||||
dpll_ddr_ck: dpll_ddr_ck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,am3-dpll-clock";
|
||||
|
|
|
|||
|
|
@ -604,6 +604,7 @@
|
|||
reg = <0x6f>;
|
||||
interrupts-extended = <&crossbar_mpu GIC_SPI 2 IRQ_TYPE_EDGE_RISING>,
|
||||
<&dra7_pmx_core 0x424>;
|
||||
interrupt-names = "irq", "wakeup";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mcp79410_pins_default>;
|
||||
|
|
|
|||
|
|
@ -155,21 +155,21 @@
|
|||
label = "keyswitch_in";
|
||||
gpios = <&pioB 1 GPIO_ACTIVE_HIGH>;
|
||||
linux,code = <28>;
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
|
||||
error_in {
|
||||
label = "error_in";
|
||||
gpios = <&pioB 2 GPIO_ACTIVE_HIGH>;
|
||||
linux,code = <29>;
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
|
||||
btn {
|
||||
label = "btn";
|
||||
gpios = <&pioC 23 GPIO_ACTIVE_HIGH>;
|
||||
linux,code = <31>;
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -498,6 +498,7 @@
|
|||
reg = <0x70000 0x4000>;
|
||||
interrupts-extended = <&mpic 8>;
|
||||
clocks = <&gateclk 4>;
|
||||
tx-csum-limit = <9800>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -159,7 +159,7 @@
|
|||
label = "Button";
|
||||
gpios = <&pioC 4 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <0x103>;
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -24,15 +24,6 @@
|
|||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
main_clock: clock@0 {
|
||||
compatible = "atmel,osc", "fixed-clock";
|
||||
clock-frequency = <18432000>;
|
||||
};
|
||||
|
||||
main_xtal {
|
||||
clock-frequency = <18432000>;
|
||||
};
|
||||
|
|
@ -94,14 +85,14 @@
|
|||
label = "PB_RST";
|
||||
gpios = <&pioB 30 GPIO_ACTIVE_HIGH>;
|
||||
linux,code = <0x100>;
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
|
||||
user {
|
||||
label = "PB_USER";
|
||||
gpios = <&pioB 31 GPIO_ACTIVE_HIGH>;
|
||||
linux,code = <0x101>;
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -171,21 +171,21 @@
|
|||
label = "PB_PROG";
|
||||
gpios = <&pioE 27 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <0x102>;
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
|
||||
reset {
|
||||
label = "PB_RST";
|
||||
gpios = <&pioE 29 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <0x100>;
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
|
||||
user {
|
||||
label = "PB_USER";
|
||||
gpios = <&pioE 31 GPIO_ACTIVE_HIGH>;
|
||||
linux,code = <0x101>;
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -98,14 +98,14 @@
|
|||
label = "PB_PROG";
|
||||
gpios = <&pioC 17 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <0x102>;
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
|
||||
reset {
|
||||
label = "PB_RST";
|
||||
gpios = <&pioC 16 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <0x100>;
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -183,7 +183,7 @@
|
|||
label = "user_pb";
|
||||
gpios = <&pioB 10 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <28>;
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -45,6 +45,7 @@
|
|||
/dts-v1/;
|
||||
#include "sama5d2.dtsi"
|
||||
#include "sama5d2-pinfunc.h"
|
||||
#include <dt-bindings/mfd/atmel-flexcom.h>
|
||||
|
||||
/ {
|
||||
model = "Atmel SAMA5D2 Xplained";
|
||||
|
|
@ -59,15 +60,6 @@
|
|||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
main_clock: clock@0 {
|
||||
compatible = "atmel,osc", "fixed-clock";
|
||||
clock-frequency = <12000000>;
|
||||
};
|
||||
|
||||
slow_xtal {
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
|
|
@ -91,6 +83,22 @@
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
sdmmc0: sdio-host@a0000000 {
|
||||
bus-width = <8>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_sdmmc0_default>;
|
||||
non-removable;
|
||||
mmc-ddr-1_8v;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
sdmmc1: sdio-host@b0000000 {
|
||||
bus-width = <4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_sdmmc1_default>;
|
||||
status = "okay"; /* conflict with qspi0 */
|
||||
};
|
||||
|
||||
apb {
|
||||
spi0: spi@f8000000 {
|
||||
pinctrl-names = "default";
|
||||
|
|
@ -176,17 +184,55 @@
|
|||
regulator-name = "VDD_SDHC_1V8";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
flx0: flexcom@f8034000 {
|
||||
atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
|
||||
status = "disabled"; /* conflict with ISC_D2 & ISC_D3 data pins */
|
||||
|
||||
uart5: serial@200 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0x200 0x200>;
|
||||
interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
clocks = <&flx0_clk>;
|
||||
clock-names = "usart";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_flx0_default>;
|
||||
atmel,fifo-size = <32>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
uart3: serial@fc008000 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart3_default>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
flx4: flexcom@fc018000 {
|
||||
atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
|
||||
status = "okay";
|
||||
|
||||
i2c2: i2c@600 {
|
||||
compatible = "atmel,sama5d2-i2c";
|
||||
reg = <0x600 0x200>;
|
||||
interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
dmas = <0>, <0>;
|
||||
dma-names = "tx", "rx";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&flx4_clk>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_flx4_default>;
|
||||
atmel,fifo-size = <16>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
i2c1: i2c@fc028000 {
|
||||
dmas = <0>, <0>;
|
||||
pinctrl-names = "default";
|
||||
|
|
@ -201,6 +247,18 @@
|
|||
};
|
||||
|
||||
pinctrl@fc038000 {
|
||||
pinctrl_flx0_default: flx0_default {
|
||||
pinmux = <PIN_PB28__FLEXCOM0_IO0>,
|
||||
<PIN_PB29__FLEXCOM0_IO1>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
pinctrl_flx4_default: flx4_default {
|
||||
pinmux = <PIN_PD12__FLEXCOM4_IO0>,
|
||||
<PIN_PD13__FLEXCOM4_IO1>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
pinctrl_i2c0_default: i2c0_default {
|
||||
pinmux = <PIN_PD21__TWD0>,
|
||||
<PIN_PD22__TWCK0>;
|
||||
|
|
@ -227,6 +285,46 @@
|
|||
bias-disable;
|
||||
};
|
||||
|
||||
pinctrl_sdmmc0_default: sdmmc0_default {
|
||||
cmd_data {
|
||||
pinmux = <PIN_PA1__SDMMC0_CMD>,
|
||||
<PIN_PA2__SDMMC0_DAT0>,
|
||||
<PIN_PA3__SDMMC0_DAT1>,
|
||||
<PIN_PA4__SDMMC0_DAT2>,
|
||||
<PIN_PA5__SDMMC0_DAT3>,
|
||||
<PIN_PA6__SDMMC0_DAT4>,
|
||||
<PIN_PA7__SDMMC0_DAT5>,
|
||||
<PIN_PA8__SDMMC0_DAT6>,
|
||||
<PIN_PA9__SDMMC0_DAT7>;
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
ck_cd_rstn_vddsel {
|
||||
pinmux = <PIN_PA0__SDMMC0_CK>,
|
||||
<PIN_PA10__SDMMC0_RSTN>,
|
||||
<PIN_PA11__SDMMC0_VDDSEL>,
|
||||
<PIN_PA13__SDMMC0_CD>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl_sdmmc1_default: sdmmc1_default {
|
||||
cmd_data {
|
||||
pinmux = <PIN_PA28__SDMMC1_CMD>,
|
||||
<PIN_PA18__SDMMC1_DAT0>,
|
||||
<PIN_PA19__SDMMC1_DAT1>,
|
||||
<PIN_PA20__SDMMC1_DAT2>,
|
||||
<PIN_PA21__SDMMC1_DAT3>;
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
conf-ck_cd {
|
||||
pinmux = <PIN_PA22__SDMMC1_CK>,
|
||||
<PIN_PA30__SDMMC1_CD>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl_spi0_default: spi0_default {
|
||||
pinmux = <PIN_PA14__SPI0_SPCK>,
|
||||
<PIN_PA15__SPI0_MOSI>,
|
||||
|
|
|
|||
|
|
@ -315,7 +315,7 @@
|
|||
label = "PB_USER";
|
||||
gpios = <&pioE 29 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <0x104>;
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -50,7 +50,6 @@
|
|||
compatible = "atmel,sama5d4-xplained", "atmel,sama5d4", "atmel,sama5";
|
||||
|
||||
chosen {
|
||||
bootargs = "ignore_loglevel earlyprintk";
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
|
|
@ -59,15 +58,6 @@
|
|||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
main_clock: clock@0 {
|
||||
compatible = "atmel,osc", "fixed-clock";
|
||||
clock-frequency = <12000000>;
|
||||
};
|
||||
|
||||
slow_xtal {
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
|
|
@ -235,7 +225,7 @@
|
|||
label = "pb_user1";
|
||||
gpios = <&pioE 8 GPIO_ACTIVE_HIGH>;
|
||||
linux,code = <0x100>;
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -50,7 +50,6 @@
|
|||
compatible = "atmel,sama5d4ek", "atmel,sama5d4", "atmel,sama5";
|
||||
|
||||
chosen {
|
||||
bootargs = "ignore_loglevel earlyprintk";
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
|
|
@ -59,15 +58,6 @@
|
|||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
main_clock: clock@0 {
|
||||
compatible = "atmel,osc", "fixed-clock";
|
||||
clock-frequency = <12000000>;
|
||||
};
|
||||
|
||||
slow_xtal {
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
|
|
@ -304,7 +294,7 @@
|
|||
label = "pb_user1";
|
||||
gpios = <&pioE 13 GPIO_ACTIVE_HIGH>;
|
||||
linux,code = <0x100>;
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -21,15 +21,6 @@
|
|||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
main_clock: clock@0 {
|
||||
compatible = "atmel,osc", "fixed-clock";
|
||||
clock-frequency = <18432000>;
|
||||
};
|
||||
|
||||
slow_xtal {
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -22,15 +22,6 @@
|
|||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
main_clock: clock@0 {
|
||||
compatible = "atmel,osc", "fixed-clock";
|
||||
clock-frequency = <18432000>;
|
||||
};
|
||||
|
||||
slow_xtal {
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
|
|
@ -149,7 +140,7 @@
|
|||
ti,debounce-tol = /bits/ 16 <65535>;
|
||||
ti,debounce-max = /bits/ 16 <1>;
|
||||
|
||||
linux,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -193,28 +184,28 @@
|
|||
label = "button_0";
|
||||
gpios = <&pioA 27 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <256>;
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
|
||||
button_1 {
|
||||
label = "button_1";
|
||||
gpios = <&pioA 26 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <257>;
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
|
||||
button_2 {
|
||||
label = "button_2";
|
||||
gpios = <&pioA 25 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <258>;
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
|
||||
button_3 {
|
||||
label = "button_3";
|
||||
gpios = <&pioA 24 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <259>;
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -22,15 +22,6 @@
|
|||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
main_clock: clock@0 {
|
||||
compatible = "atmel,osc", "fixed-clock";
|
||||
clock-frequency = <16367660>;
|
||||
};
|
||||
|
||||
slow_xtal {
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
|
|
@ -213,14 +204,14 @@
|
|||
label = "left_click";
|
||||
gpios = <&pioC 5 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <272>;
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
|
||||
right_click {
|
||||
label = "right_click";
|
||||
gpios = <&pioC 4 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <273>;
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -19,15 +19,6 @@
|
|||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
main_clock: clock@0 {
|
||||
compatible = "atmel,osc", "fixed-clock";
|
||||
clock-frequency = <18432000>;
|
||||
};
|
||||
|
||||
slow_xtal {
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
|
|
@ -206,14 +197,14 @@
|
|||
label = "Button 3";
|
||||
gpios = <&pioA 30 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <0x103>;
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
|
||||
btn4 {
|
||||
label = "Button 4";
|
||||
gpios = <&pioA 31 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <0x104>;
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -24,15 +24,6 @@
|
|||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
main_clock: clock@0 {
|
||||
compatible = "atmel,osc", "fixed-clock";
|
||||
clock-frequency = <12000000>;
|
||||
};
|
||||
|
||||
slow_xtal {
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
|
|
@ -323,14 +314,14 @@
|
|||
label = "left_click";
|
||||
gpios = <&pioB 6 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <272>;
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
|
||||
right_click {
|
||||
label = "right_click";
|
||||
gpios = <&pioB 7 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <273>;
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
|
||||
left {
|
||||
|
|
|
|||
|
|
@ -23,15 +23,6 @@
|
|||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
main_clock: clock@0 {
|
||||
compatible = "atmel,osc", "fixed-clock";
|
||||
clock-frequency = <16000000>;
|
||||
};
|
||||
|
||||
slow_xtal {
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
|
|
@ -219,7 +210,7 @@
|
|||
label = "Enter";
|
||||
gpios = <&pioB 3 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <28>;
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -22,15 +22,6 @@
|
|||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
main_clock: clock {
|
||||
compatible = "atmel,osc", "fixed-clock";
|
||||
clock-frequency = <12000000>;
|
||||
};
|
||||
|
||||
slow_xtal {
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
|
|
@ -225,14 +216,14 @@
|
|||
label = "right_click";
|
||||
gpios = <&pioB 0 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <273>;
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
|
||||
left_click {
|
||||
label = "left_click";
|
||||
gpios = <&pioB 1 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <272>;
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -12,17 +12,6 @@
|
|||
reg = <0x20000000 0x8000000>;
|
||||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
main_clock: clock@0 {
|
||||
compatible = "atmel,osc", "fixed-clock";
|
||||
clock-frequency = <12000000>;
|
||||
};
|
||||
};
|
||||
|
||||
clocks {
|
||||
slow_xtal {
|
||||
clock-frequency = <32768>;
|
||||
|
|
|
|||
|
|
@ -118,7 +118,8 @@
|
|||
sdhci0: sdhci@ab0000 {
|
||||
compatible = "mrvl,pxav3-mmc";
|
||||
reg = <0xab0000 0x200>;
|
||||
clocks = <&chip_clk CLKID_SDIO1XIN>;
|
||||
clocks = <&chip_clk CLKID_SDIO1XIN>, <&chip_clk CLKID_SDIO>;
|
||||
clock-names = "io", "core";
|
||||
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -126,7 +127,8 @@
|
|||
sdhci1: sdhci@ab0800 {
|
||||
compatible = "mrvl,pxav3-mmc";
|
||||
reg = <0xab0800 0x200>;
|
||||
clocks = <&chip_clk CLKID_SDIO1XIN>;
|
||||
clocks = <&chip_clk CLKID_SDIO1XIN>, <&chip_clk CLKID_SDIO>;
|
||||
clock-names = "io", "core";
|
||||
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -135,7 +137,7 @@
|
|||
compatible = "mrvl,pxav3-mmc";
|
||||
reg = <0xab1000 0x200>;
|
||||
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&chip_clk CLKID_NFC_ECC>, <&chip_clk CLKID_NFC>;
|
||||
clocks = <&chip_clk CLKID_NFC_ECC>, <&chip_clk CLKID_SDIO>;
|
||||
clock-names = "io", "core";
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -218,6 +218,7 @@
|
|||
reg = <0x480c8000 0x2000>;
|
||||
interrupts = <77>;
|
||||
ti,hwmods = "mailbox";
|
||||
#mbox-cells = <1>;
|
||||
ti,mbox-num-users = <4>;
|
||||
ti,mbox-num-fifos = <12>;
|
||||
mbox_dsp: mbox_dsp {
|
||||
|
|
@ -279,8 +280,11 @@
|
|||
ti,spi-num-cs = <4>;
|
||||
ti,hwmods = "mcspi1";
|
||||
dmas = <&edma 16 &edma 17
|
||||
&edma 18 &edma 19>;
|
||||
dma-names = "tx0", "rx0", "tx1", "rx1";
|
||||
&edma 18 &edma 19
|
||||
&edma 20 &edma 21
|
||||
&edma 22 &edma 23>;
|
||||
dma-names = "tx0", "rx0", "tx1", "rx1",
|
||||
"tx2", "rx2", "tx3", "rx3";
|
||||
};
|
||||
|
||||
mmc1: mmc@48060000 {
|
||||
|
|
|
|||
|
|
@ -1459,8 +1459,8 @@
|
|||
interrupt-names = "tx", "rx";
|
||||
dmas = <&sdma_xbar 133>, <&sdma_xbar 132>;
|
||||
dma-names = "tx", "rx";
|
||||
clocks = <&mcasp3_ahclkx_mux>;
|
||||
clock-names = "fck";
|
||||
clocks = <&mcasp3_aux_gfclk_mux>, <&mcasp3_ahclkx_mux>;
|
||||
clock-names = "fck", "ahclkx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -486,7 +486,10 @@
|
|||
compatible = "fsl,imx27-usb";
|
||||
reg = <0x10024000 0x200>;
|
||||
interrupts = <56>;
|
||||
clocks = <&clks IMX27_CLK_USB_IPG_GATE>;
|
||||
clocks = <&clks IMX27_CLK_USB_IPG_GATE>,
|
||||
<&clks IMX27_CLK_USB_AHB_GATE>,
|
||||
<&clks IMX27_CLK_USB_DIV>;
|
||||
clock-names = "ipg", "ahb", "per";
|
||||
fsl,usbmisc = <&usbmisc 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -495,7 +498,10 @@
|
|||
compatible = "fsl,imx27-usb";
|
||||
reg = <0x10024200 0x200>;
|
||||
interrupts = <54>;
|
||||
clocks = <&clks IMX27_CLK_USB_IPG_GATE>;
|
||||
clocks = <&clks IMX27_CLK_USB_IPG_GATE>,
|
||||
<&clks IMX27_CLK_USB_AHB_GATE>,
|
||||
<&clks IMX27_CLK_USB_DIV>;
|
||||
clock-names = "ipg", "ahb", "per";
|
||||
fsl,usbmisc = <&usbmisc 1>;
|
||||
dr_mode = "host";
|
||||
status = "disabled";
|
||||
|
|
@ -505,7 +511,10 @@
|
|||
compatible = "fsl,imx27-usb";
|
||||
reg = <0x10024400 0x200>;
|
||||
interrupts = <55>;
|
||||
clocks = <&clks IMX27_CLK_USB_IPG_GATE>;
|
||||
clocks = <&clks IMX27_CLK_USB_IPG_GATE>,
|
||||
<&clks IMX27_CLK_USB_AHB_GATE>,
|
||||
<&clks IMX27_CLK_USB_DIV>;
|
||||
clock-names = "ipg", "ahb", "per";
|
||||
fsl,usbmisc = <&usbmisc 2>;
|
||||
dr_mode = "host";
|
||||
status = "disabled";
|
||||
|
|
@ -515,7 +524,6 @@
|
|||
#index-cells = <1>;
|
||||
compatible = "fsl,imx27-usbmisc";
|
||||
reg = <0x10024600 0x200>;
|
||||
clocks = <&clks IMX27_CLK_USB_AHB_GATE>;
|
||||
};
|
||||
|
||||
sahara2: sahara@10025000 {
|
||||
|
|
|
|||
|
|
@ -137,7 +137,7 @@ netcp: netcp@26000000 {
|
|||
/* NetCP address range */
|
||||
ranges = <0 0x26000000 0x1000000>;
|
||||
|
||||
clocks = <&papllclk>, <&clkcpgmac>, <&chipclk12>;
|
||||
clocks = <&clkosr>, <&papllclk>, <&clkcpgmac>, <&chipclk12>;
|
||||
dma-coherent;
|
||||
|
||||
ti,navigator-dmas = <&dma_gbe 0>,
|
||||
|
|
|
|||
|
|
@ -40,7 +40,7 @@
|
|||
};
|
||||
poweroff@12100 {
|
||||
compatible = "qnap,power-off";
|
||||
reg = <0x12000 0x100>;
|
||||
reg = <0x12100 0x100>;
|
||||
clocks = <&gate_clk 7>;
|
||||
};
|
||||
spi@10600 {
|
||||
|
|
|
|||
|
|
@ -86,6 +86,10 @@
|
|||
};
|
||||
};
|
||||
|
||||
&emmc {
|
||||
/delete-property/mmc-hs200-1_8v;
|
||||
};
|
||||
|
||||
&gpio_keys {
|
||||
pinctrl-0 = <&pwr_key_l &ap_lid_int_l &volum_down_l &volum_up_l>;
|
||||
|
||||
|
|
|
|||
|
|
@ -452,8 +452,10 @@
|
|||
clock-names = "tsadc", "apb_pclk";
|
||||
resets = <&cru SRST_TSADC>;
|
||||
reset-names = "tsadc-apb";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&otp_out>;
|
||||
pinctrl-names = "init", "default", "sleep";
|
||||
pinctrl-0 = <&otp_gpio>;
|
||||
pinctrl-1 = <&otp_out>;
|
||||
pinctrl-2 = <&otp_gpio>;
|
||||
#thermal-sensor-cells = <1>;
|
||||
rockchip,hw-tshut-temp = <95000>;
|
||||
status = "disabled";
|
||||
|
|
@ -1395,6 +1397,10 @@
|
|||
};
|
||||
|
||||
tsadc {
|
||||
otp_gpio: otp-gpio {
|
||||
rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
otp_out: otp-out {
|
||||
rockchip,pins = <0 10 RK_FUNC_1 &pcfg_pull_none>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -49,7 +49,7 @@
|
|||
label = "pb_user1";
|
||||
gpios = <&pioE 27 GPIO_ACTIVE_HIGH>;
|
||||
linux,code = <0x100>;
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -1300,7 +1300,7 @@
|
|||
};
|
||||
|
||||
watchdog@fc068640 {
|
||||
compatible = "atmel,at91sam9260-wdt";
|
||||
compatible = "atmel,sama5d4-wdt";
|
||||
reg = <0xfc068640 0x10>;
|
||||
clocks = <&clk32k>;
|
||||
status = "disabled";
|
||||
|
|
|
|||
|
|
@ -115,7 +115,7 @@
|
|||
label = "user_pb";
|
||||
gpios = <&pioB 10 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <28>;
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -143,7 +143,7 @@
|
|||
label = "user_pb";
|
||||
gpios = <&pioB 10 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <28>;
|
||||
gpio-key,wakeup;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -18,8 +18,3 @@
|
|||
reg = <0x80000000 0x10000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&L2 {
|
||||
arm,data-latency = <2 1 2>;
|
||||
arm,tag-latency = <3 2 3>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -19,7 +19,7 @@
|
|||
reg = <0x40006000 0x1000>;
|
||||
cache-unified;
|
||||
cache-level = <2>;
|
||||
arm,data-latency = <1 1 1>;
|
||||
arm,data-latency = <3 3 3>;
|
||||
arm,tag-latency = <2 2 2>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -158,7 +158,7 @@
|
|||
interrupts = <67 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_DSPI0>;
|
||||
clock-names = "dspi";
|
||||
spi-num-chipselects = <5>;
|
||||
spi-num-chipselects = <6>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -170,7 +170,7 @@
|
|||
interrupts = <68 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_DSPI1>;
|
||||
clock-names = "dspi";
|
||||
spi-num-chipselects = <5>;
|
||||
spi-num-chipselects = <4>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -178,8 +178,10 @@
|
|||
compatible = "fsl,vf610-sai";
|
||||
reg = <0x40031000 0x1000>;
|
||||
interrupts = <86 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks VF610_CLK_SAI2>;
|
||||
clock-names = "sai";
|
||||
clocks = <&clks VF610_CLK_SAI2>,
|
||||
<&clks VF610_CLK_SAI2_DIV>,
|
||||
<&clks 0>, <&clks 0>;
|
||||
clock-names = "bus", "mclk1", "mclk2", "mclk3";
|
||||
dma-names = "tx", "rx";
|
||||
dmas = <&edma0 0 21>,
|
||||
<&edma0 0 20>;
|
||||
|
|
@ -461,6 +463,8 @@
|
|||
clock-names = "adc";
|
||||
#io-channel-cells = <1>;
|
||||
status = "disabled";
|
||||
fsl,adck-max-frequency = <30000000>, <40000000>,
|
||||
<20000000>;
|
||||
};
|
||||
|
||||
esdhc0: esdhc@400b1000 {
|
||||
|
|
@ -472,8 +476,6 @@
|
|||
<&clks VF610_CLK_ESDHC0>;
|
||||
clock-names = "ipg", "ahb", "per";
|
||||
status = "disabled";
|
||||
fsl,adck-max-frequency = <30000000>, <40000000>,
|
||||
<20000000>;
|
||||
};
|
||||
|
||||
esdhc1: esdhc@400b2000 {
|
||||
|
|
|
|||
|
|
@ -125,7 +125,6 @@ CONFIG_POWER_RESET=y
|
|||
# CONFIG_HWMON is not set
|
||||
CONFIG_WATCHDOG=y
|
||||
CONFIG_AT91SAM9X_WATCHDOG=y
|
||||
CONFIG_SSB=m
|
||||
CONFIG_MFD_ATMEL_HLCDC=y
|
||||
CONFIG_REGULATOR=y
|
||||
CONFIG_REGULATOR_FIXED_VOLTAGE=y
|
||||
|
|
|
|||
|
|
@ -129,7 +129,6 @@ CONFIG_GPIO_SYSFS=y
|
|||
CONFIG_POWER_SUPPLY=y
|
||||
CONFIG_POWER_RESET=y
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_SSB=m
|
||||
CONFIG_MFD_ATMEL_FLEXCOM=y
|
||||
CONFIG_REGULATOR=y
|
||||
CONFIG_REGULATOR_FIXED_VOLTAGE=y
|
||||
|
|
|
|||
|
|
@ -21,6 +21,7 @@
|
|||
#ifndef __ASSEMBLY__
|
||||
|
||||
#include <linux/io.h>
|
||||
#include <asm/barrier.h>
|
||||
|
||||
#define __ACCESS_CP15(CRn, Op1, CRm, Op2) p15, Op1, %0, CRn, CRm, Op2
|
||||
#define __ACCESS_CP15_64(Op1, CRm) p15, Op1, %Q0, %R0, CRm
|
||||
|
|
|
|||
|
|
@ -40,6 +40,11 @@ extern void arch_trigger_all_cpu_backtrace(bool);
|
|||
#define arch_trigger_all_cpu_backtrace(x) arch_trigger_all_cpu_backtrace(x)
|
||||
#endif
|
||||
|
||||
static inline int nr_legacy_irqs(void)
|
||||
{
|
||||
return NR_IRQS_LEGACY;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -28,6 +28,18 @@
|
|||
unsigned long *vcpu_reg(struct kvm_vcpu *vcpu, u8 reg_num);
|
||||
unsigned long *vcpu_spsr(struct kvm_vcpu *vcpu);
|
||||
|
||||
static inline unsigned long vcpu_get_reg(struct kvm_vcpu *vcpu,
|
||||
u8 reg_num)
|
||||
{
|
||||
return *vcpu_reg(vcpu, reg_num);
|
||||
}
|
||||
|
||||
static inline void vcpu_set_reg(struct kvm_vcpu *vcpu, u8 reg_num,
|
||||
unsigned long val)
|
||||
{
|
||||
*vcpu_reg(vcpu, reg_num) = val;
|
||||
}
|
||||
|
||||
bool kvm_condition_valid(struct kvm_vcpu *vcpu);
|
||||
void kvm_skip_instr(struct kvm_vcpu *vcpu, bool is_wide_instr);
|
||||
void kvm_inject_undefined(struct kvm_vcpu *vcpu);
|
||||
|
|
|
|||
|
|
@ -416,6 +416,7 @@
|
|||
#define __NR_execveat (__NR_SYSCALL_BASE+387)
|
||||
#define __NR_userfaultfd (__NR_SYSCALL_BASE+388)
|
||||
#define __NR_membarrier (__NR_SYSCALL_BASE+389)
|
||||
#define __NR_mlock2 (__NR_SYSCALL_BASE+390)
|
||||
|
||||
/*
|
||||
* The following SWIs are ARM private.
|
||||
|
|
|
|||
|
|
@ -17,11 +17,6 @@
|
|||
#include <asm/mach/pci.h>
|
||||
|
||||
static int debug_pci;
|
||||
static resource_size_t (*align_resource)(struct pci_dev *dev,
|
||||
const struct resource *res,
|
||||
resource_size_t start,
|
||||
resource_size_t size,
|
||||
resource_size_t align) = NULL;
|
||||
|
||||
/*
|
||||
* We can't use pci_get_device() here since we are
|
||||
|
|
@ -461,7 +456,6 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw,
|
|||
sys->busnr = busnr;
|
||||
sys->swizzle = hw->swizzle;
|
||||
sys->map_irq = hw->map_irq;
|
||||
align_resource = hw->align_resource;
|
||||
INIT_LIST_HEAD(&sys->resources);
|
||||
|
||||
if (hw->private_data)
|
||||
|
|
@ -470,6 +464,8 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw,
|
|||
ret = hw->setup(nr, sys);
|
||||
|
||||
if (ret > 0) {
|
||||
struct pci_host_bridge *host_bridge;
|
||||
|
||||
ret = pcibios_init_resources(nr, sys);
|
||||
if (ret) {
|
||||
kfree(sys);
|
||||
|
|
@ -491,6 +487,9 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw,
|
|||
busnr = sys->bus->busn_res.end + 1;
|
||||
|
||||
list_add(&sys->node, head);
|
||||
|
||||
host_bridge = pci_find_host_bridge(sys->bus);
|
||||
host_bridge->align_resource = hw->align_resource;
|
||||
} else {
|
||||
kfree(sys);
|
||||
if (ret < 0)
|
||||
|
|
@ -578,14 +577,18 @@ resource_size_t pcibios_align_resource(void *data, const struct resource *res,
|
|||
{
|
||||
struct pci_dev *dev = data;
|
||||
resource_size_t start = res->start;
|
||||
struct pci_host_bridge *host_bridge;
|
||||
|
||||
if (res->flags & IORESOURCE_IO && start & 0x300)
|
||||
start = (start + 0x3ff) & ~0x3ff;
|
||||
|
||||
start = (start + align - 1) & ~(align - 1);
|
||||
|
||||
if (align_resource)
|
||||
return align_resource(dev, res, start, size, align);
|
||||
host_bridge = pci_find_host_bridge(dev->bus);
|
||||
|
||||
if (host_bridge->align_resource)
|
||||
return host_bridge->align_resource(dev, res,
|
||||
start, size, align);
|
||||
|
||||
return start;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -399,6 +399,7 @@
|
|||
CALL(sys_execveat)
|
||||
CALL(sys_userfaultfd)
|
||||
CALL(sys_membarrier)
|
||||
CALL(sys_mlock2)
|
||||
#ifndef syscalls_counted
|
||||
.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
|
||||
#define syscalls_counted
|
||||
|
|
|
|||
|
|
@ -563,18 +563,13 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)
|
|||
if (vcpu->arch.power_off || vcpu->arch.pause)
|
||||
vcpu_sleep(vcpu);
|
||||
|
||||
/*
|
||||
* Disarming the background timer must be done in a
|
||||
* preemptible context, as this call may sleep.
|
||||
*/
|
||||
kvm_timer_flush_hwstate(vcpu);
|
||||
|
||||
/*
|
||||
* Preparing the interrupts to be injected also
|
||||
* involves poking the GIC, which must be done in a
|
||||
* non-preemptible context.
|
||||
*/
|
||||
preempt_disable();
|
||||
kvm_timer_flush_hwstate(vcpu);
|
||||
kvm_vgic_flush_hwstate(vcpu);
|
||||
|
||||
local_irq_disable();
|
||||
|
|
|
|||
|
|
@ -115,7 +115,7 @@ int kvm_handle_mmio_return(struct kvm_vcpu *vcpu, struct kvm_run *run)
|
|||
trace_kvm_mmio(KVM_TRACE_MMIO_READ, len, run->mmio.phys_addr,
|
||||
data);
|
||||
data = vcpu_data_host_to_guest(vcpu, data, len);
|
||||
*vcpu_reg(vcpu, vcpu->arch.mmio_decode.rt) = data;
|
||||
vcpu_set_reg(vcpu, vcpu->arch.mmio_decode.rt, data);
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
|
@ -186,7 +186,8 @@ int io_mem_abort(struct kvm_vcpu *vcpu, struct kvm_run *run,
|
|||
rt = vcpu->arch.mmio_decode.rt;
|
||||
|
||||
if (is_write) {
|
||||
data = vcpu_data_guest_to_host(vcpu, *vcpu_reg(vcpu, rt), len);
|
||||
data = vcpu_data_guest_to_host(vcpu, vcpu_get_reg(vcpu, rt),
|
||||
len);
|
||||
|
||||
trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, len, fault_ipa, data);
|
||||
mmio_write_buf(data_buf, len, data);
|
||||
|
|
|
|||
|
|
@ -98,6 +98,11 @@ static void kvm_flush_dcache_pud(pud_t pud)
|
|||
__kvm_flush_dcache_pud(pud);
|
||||
}
|
||||
|
||||
static bool kvm_is_device_pfn(unsigned long pfn)
|
||||
{
|
||||
return !pfn_valid(pfn);
|
||||
}
|
||||
|
||||
/**
|
||||
* stage2_dissolve_pmd() - clear and flush huge PMD entry
|
||||
* @kvm: pointer to kvm structure.
|
||||
|
|
@ -213,7 +218,7 @@ static void unmap_ptes(struct kvm *kvm, pmd_t *pmd,
|
|||
kvm_tlb_flush_vmid_ipa(kvm, addr);
|
||||
|
||||
/* No need to invalidate the cache for device mappings */
|
||||
if ((pte_val(old_pte) & PAGE_S2_DEVICE) != PAGE_S2_DEVICE)
|
||||
if (!kvm_is_device_pfn(pte_pfn(old_pte)))
|
||||
kvm_flush_dcache_pte(old_pte);
|
||||
|
||||
put_page(virt_to_page(pte));
|
||||
|
|
@ -305,8 +310,7 @@ static void stage2_flush_ptes(struct kvm *kvm, pmd_t *pmd,
|
|||
|
||||
pte = pte_offset_kernel(pmd, addr);
|
||||
do {
|
||||
if (!pte_none(*pte) &&
|
||||
(pte_val(*pte) & PAGE_S2_DEVICE) != PAGE_S2_DEVICE)
|
||||
if (!pte_none(*pte) && !kvm_is_device_pfn(pte_pfn(*pte)))
|
||||
kvm_flush_dcache_pte(*pte);
|
||||
} while (pte++, addr += PAGE_SIZE, addr != end);
|
||||
}
|
||||
|
|
@ -1037,11 +1041,6 @@ static bool kvm_is_write_fault(struct kvm_vcpu *vcpu)
|
|||
return kvm_vcpu_dabt_iswrite(vcpu);
|
||||
}
|
||||
|
||||
static bool kvm_is_device_pfn(unsigned long pfn)
|
||||
{
|
||||
return !pfn_valid(pfn);
|
||||
}
|
||||
|
||||
/**
|
||||
* stage2_wp_ptes - write protect PMD range
|
||||
* @pmd: pointer to pmd entry
|
||||
|
|
|
|||
|
|
@ -75,7 +75,7 @@ static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
|
|||
unsigned long context_id;
|
||||
phys_addr_t target_pc;
|
||||
|
||||
cpu_id = *vcpu_reg(source_vcpu, 1) & MPIDR_HWID_BITMASK;
|
||||
cpu_id = vcpu_get_reg(source_vcpu, 1) & MPIDR_HWID_BITMASK;
|
||||
if (vcpu_mode_is_32bit(source_vcpu))
|
||||
cpu_id &= ~((u32) 0);
|
||||
|
||||
|
|
@ -94,8 +94,8 @@ static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
|
|||
return PSCI_RET_INVALID_PARAMS;
|
||||
}
|
||||
|
||||
target_pc = *vcpu_reg(source_vcpu, 2);
|
||||
context_id = *vcpu_reg(source_vcpu, 3);
|
||||
target_pc = vcpu_get_reg(source_vcpu, 2);
|
||||
context_id = vcpu_get_reg(source_vcpu, 3);
|
||||
|
||||
kvm_reset_vcpu(vcpu);
|
||||
|
||||
|
|
@ -114,7 +114,7 @@ static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
|
|||
* NOTE: We always update r0 (or x0) because for PSCI v0.1
|
||||
* the general puspose registers are undefined upon CPU_ON.
|
||||
*/
|
||||
*vcpu_reg(vcpu, 0) = context_id;
|
||||
vcpu_set_reg(vcpu, 0, context_id);
|
||||
vcpu->arch.power_off = false;
|
||||
smp_mb(); /* Make sure the above is visible */
|
||||
|
||||
|
|
@ -134,8 +134,8 @@ static unsigned long kvm_psci_vcpu_affinity_info(struct kvm_vcpu *vcpu)
|
|||
struct kvm *kvm = vcpu->kvm;
|
||||
struct kvm_vcpu *tmp;
|
||||
|
||||
target_affinity = *vcpu_reg(vcpu, 1);
|
||||
lowest_affinity_level = *vcpu_reg(vcpu, 2);
|
||||
target_affinity = vcpu_get_reg(vcpu, 1);
|
||||
lowest_affinity_level = vcpu_get_reg(vcpu, 2);
|
||||
|
||||
/* Determine target affinity mask */
|
||||
target_affinity_mask = psci_affinity_mask(lowest_affinity_level);
|
||||
|
|
@ -209,7 +209,7 @@ int kvm_psci_version(struct kvm_vcpu *vcpu)
|
|||
static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
int ret = 1;
|
||||
unsigned long psci_fn = *vcpu_reg(vcpu, 0) & ~((u32) 0);
|
||||
unsigned long psci_fn = vcpu_get_reg(vcpu, 0) & ~((u32) 0);
|
||||
unsigned long val;
|
||||
|
||||
switch (psci_fn) {
|
||||
|
|
@ -273,13 +273,13 @@ static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
|
|||
break;
|
||||
}
|
||||
|
||||
*vcpu_reg(vcpu, 0) = val;
|
||||
vcpu_set_reg(vcpu, 0, val);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int kvm_psci_0_1_call(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
unsigned long psci_fn = *vcpu_reg(vcpu, 0) & ~((u32) 0);
|
||||
unsigned long psci_fn = vcpu_get_reg(vcpu, 0) & ~((u32) 0);
|
||||
unsigned long val;
|
||||
|
||||
switch (psci_fn) {
|
||||
|
|
@ -295,7 +295,7 @@ static int kvm_psci_0_1_call(struct kvm_vcpu *vcpu)
|
|||
break;
|
||||
}
|
||||
|
||||
*vcpu_reg(vcpu, 0) = val;
|
||||
vcpu_set_reg(vcpu, 0, val);
|
||||
return 1;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -4,7 +4,6 @@ menuconfig ARCH_AT91
|
|||
select ARCH_REQUIRE_GPIOLIB
|
||||
select COMMON_CLK_AT91
|
||||
select PINCTRL
|
||||
select PINCTRL_AT91
|
||||
select SOC_BUS
|
||||
|
||||
if ARCH_AT91
|
||||
|
|
@ -17,6 +16,7 @@ config SOC_SAMA5D2
|
|||
select HAVE_AT91_USB_CLK
|
||||
select HAVE_AT91_H32MX
|
||||
select HAVE_AT91_GENERATED_CLK
|
||||
select PINCTRL_AT91PIO4
|
||||
help
|
||||
Select this if ou are using one of Atmel's SAMA5D2 family SoC.
|
||||
|
||||
|
|
@ -27,6 +27,7 @@ config SOC_SAMA5D3
|
|||
select HAVE_AT91_UTMI
|
||||
select HAVE_AT91_SMD
|
||||
select HAVE_AT91_USB_CLK
|
||||
select PINCTRL_AT91
|
||||
help
|
||||
Select this if you are using one of Atmel's SAMA5D3 family SoC.
|
||||
This support covers SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36.
|
||||
|
|
@ -40,6 +41,7 @@ config SOC_SAMA5D4
|
|||
select HAVE_AT91_SMD
|
||||
select HAVE_AT91_USB_CLK
|
||||
select HAVE_AT91_H32MX
|
||||
select PINCTRL_AT91
|
||||
help
|
||||
Select this if you are using one of Atmel's SAMA5D4 family SoC.
|
||||
|
||||
|
|
@ -50,6 +52,7 @@ config SOC_AT91RM9200
|
|||
select CPU_ARM920T
|
||||
select HAVE_AT91_USB_CLK
|
||||
select MIGHT_HAVE_PCI
|
||||
select PINCTRL_AT91
|
||||
select SOC_SAM_V4_V5
|
||||
select SRAM if PM
|
||||
help
|
||||
|
|
@ -65,6 +68,7 @@ config SOC_AT91SAM9
|
|||
select HAVE_AT91_UTMI
|
||||
select HAVE_FB_ATMEL
|
||||
select MEMORY
|
||||
select PINCTRL_AT91
|
||||
select SOC_SAM_V4_V5
|
||||
select SRAM if PM
|
||||
help
|
||||
|
|
|
|||
|
|
@ -41,8 +41,10 @@
|
|||
* implementation should be moved down into the pinctrl driver and get
|
||||
* called as part of the generic suspend/resume path.
|
||||
*/
|
||||
#ifdef CONFIG_PINCTRL_AT91
|
||||
extern void at91_pinctrl_gpio_suspend(void);
|
||||
extern void at91_pinctrl_gpio_resume(void);
|
||||
#endif
|
||||
|
||||
static struct {
|
||||
unsigned long uhp_udp_mask;
|
||||
|
|
@ -151,8 +153,9 @@ static void at91_pm_suspend(suspend_state_t state)
|
|||
|
||||
static int at91_pm_enter(suspend_state_t state)
|
||||
{
|
||||
#ifdef CONFIG_PINCTRL_AT91
|
||||
at91_pinctrl_gpio_suspend();
|
||||
|
||||
#endif
|
||||
switch (state) {
|
||||
/*
|
||||
* Suspend-to-RAM is like STANDBY plus slow clock mode, so
|
||||
|
|
@ -192,7 +195,9 @@ static int at91_pm_enter(suspend_state_t state)
|
|||
error:
|
||||
target_state = PM_SUSPEND_ON;
|
||||
|
||||
#ifdef CONFIG_PINCTRL_AT91
|
||||
at91_pinctrl_gpio_resume();
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -18,13 +18,13 @@
|
|||
@ check low interrupts
|
||||
ldr \irqstat, [\base, #IRQ_CAUSE_LOW_OFF]
|
||||
ldr \tmp, [\base, #IRQ_MASK_LOW_OFF]
|
||||
mov \irqnr, #31
|
||||
mov \irqnr, #32
|
||||
ands \irqstat, \irqstat, \tmp
|
||||
|
||||
@ if no low interrupts set, check high interrupts
|
||||
ldreq \irqstat, [\base, #IRQ_CAUSE_HIGH_OFF]
|
||||
ldreq \tmp, [\base, #IRQ_MASK_HIGH_OFF]
|
||||
moveq \irqnr, #63
|
||||
moveq \irqnr, #64
|
||||
andeqs \irqstat, \irqstat, \tmp
|
||||
|
||||
@ find first active interrupt source
|
||||
|
|
|
|||
|
|
@ -748,8 +748,12 @@ static void exynos5_powerdown_conf(enum sys_powerdown mode)
|
|||
void exynos_sys_powerdown_conf(enum sys_powerdown mode)
|
||||
{
|
||||
unsigned int i;
|
||||
const struct exynos_pmu_data *pmu_data;
|
||||
|
||||
const struct exynos_pmu_data *pmu_data = pmu_context->pmu_data;
|
||||
if (!pmu_context)
|
||||
return;
|
||||
|
||||
pmu_data = pmu_context->pmu_data;
|
||||
|
||||
if (pmu_data->powerdown_conf)
|
||||
pmu_data->powerdown_conf(mode);
|
||||
|
|
|
|||
|
|
@ -177,6 +177,7 @@ static struct irq_chip imx_gpc_chip = {
|
|||
.irq_unmask = imx_gpc_irq_unmask,
|
||||
.irq_retrigger = irq_chip_retrigger_hierarchy,
|
||||
.irq_set_wake = imx_gpc_irq_set_wake,
|
||||
.irq_set_type = irq_chip_set_type_parent,
|
||||
#ifdef CONFIG_SMP
|
||||
.irq_set_affinity = irq_chip_set_affinity_parent,
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -143,7 +143,7 @@ static inline void __indirect_writesl(volatile void __iomem *bus_addr,
|
|||
writel(*vaddr++, bus_addr);
|
||||
}
|
||||
|
||||
static inline unsigned char __indirect_readb(const volatile void __iomem *p)
|
||||
static inline u8 __indirect_readb(const volatile void __iomem *p)
|
||||
{
|
||||
u32 addr = (u32)p;
|
||||
u32 n, byte_enables, data;
|
||||
|
|
@ -166,7 +166,7 @@ static inline void __indirect_readsb(const volatile void __iomem *bus_addr,
|
|||
*vaddr++ = readb(bus_addr);
|
||||
}
|
||||
|
||||
static inline unsigned short __indirect_readw(const volatile void __iomem *p)
|
||||
static inline u16 __indirect_readw(const volatile void __iomem *p)
|
||||
{
|
||||
u32 addr = (u32)p;
|
||||
u32 n, byte_enables, data;
|
||||
|
|
@ -189,7 +189,7 @@ static inline void __indirect_readsw(const volatile void __iomem *bus_addr,
|
|||
*vaddr++ = readw(bus_addr);
|
||||
}
|
||||
|
||||
static inline unsigned long __indirect_readl(const volatile void __iomem *p)
|
||||
static inline u32 __indirect_readl(const volatile void __iomem *p)
|
||||
{
|
||||
u32 addr = (__force u32)p;
|
||||
u32 data;
|
||||
|
|
@ -350,7 +350,7 @@ static inline void insl(u32 io_addr, void *p, u32 count)
|
|||
((unsigned long)p <= (PIO_MASK + PIO_OFFSET)))
|
||||
|
||||
#define ioread8(p) ioread8(p)
|
||||
static inline unsigned int ioread8(const void __iomem *addr)
|
||||
static inline u8 ioread8(const void __iomem *addr)
|
||||
{
|
||||
unsigned long port = (unsigned long __force)addr;
|
||||
if (__is_io_address(port))
|
||||
|
|
@ -378,7 +378,7 @@ static inline void ioread8_rep(const void __iomem *addr, void *vaddr, u32 count)
|
|||
}
|
||||
|
||||
#define ioread16(p) ioread16(p)
|
||||
static inline unsigned int ioread16(const void __iomem *addr)
|
||||
static inline u16 ioread16(const void __iomem *addr)
|
||||
{
|
||||
unsigned long port = (unsigned long __force)addr;
|
||||
if (__is_io_address(port))
|
||||
|
|
@ -407,7 +407,7 @@ static inline void ioread16_rep(const void __iomem *addr, void *vaddr,
|
|||
}
|
||||
|
||||
#define ioread32(p) ioread32(p)
|
||||
static inline unsigned int ioread32(const void __iomem *addr)
|
||||
static inline u32 ioread32(const void __iomem *addr)
|
||||
{
|
||||
unsigned long port = (unsigned long __force)addr;
|
||||
if (__is_io_address(port))
|
||||
|
|
|
|||
|
|
@ -121,6 +121,7 @@ config ARCH_OMAP2PLUS_TYPICAL
|
|||
select NEON if CPU_V7
|
||||
select PM
|
||||
select REGULATOR
|
||||
select REGULATOR_FIXED_VOLTAGE
|
||||
select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4
|
||||
select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4
|
||||
select VFP
|
||||
|
|
@ -201,7 +202,6 @@ config MACH_OMAP3_PANDORA
|
|||
depends on ARCH_OMAP3
|
||||
default y
|
||||
select OMAP_PACKAGE_CBB
|
||||
select REGULATOR_FIXED_VOLTAGE if REGULATOR
|
||||
|
||||
config MACH_NOKIA_N810
|
||||
bool
|
||||
|
|
|
|||
|
|
@ -143,9 +143,9 @@ static int omap4_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
|||
* Ensure that CPU power state is set to ON to avoid CPU
|
||||
* powerdomain transition on wfi
|
||||
*/
|
||||
clkdm_wakeup(cpu1_clkdm);
|
||||
omap_set_pwrdm_state(cpu1_pwrdm, PWRDM_POWER_ON);
|
||||
clkdm_allow_idle(cpu1_clkdm);
|
||||
clkdm_wakeup_nolock(cpu1_clkdm);
|
||||
pwrdm_set_next_pwrst(cpu1_pwrdm, PWRDM_POWER_ON);
|
||||
clkdm_allow_idle_nolock(cpu1_clkdm);
|
||||
|
||||
if (IS_PM44XX_ERRATUM(PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD)) {
|
||||
while (gic_dist_disabled()) {
|
||||
|
|
|
|||
|
|
@ -890,6 +890,36 @@ static int _init_opt_clks(struct omap_hwmod *oh)
|
|||
return ret;
|
||||
}
|
||||
|
||||
static void _enable_optional_clocks(struct omap_hwmod *oh)
|
||||
{
|
||||
struct omap_hwmod_opt_clk *oc;
|
||||
int i;
|
||||
|
||||
pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
|
||||
|
||||
for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
|
||||
if (oc->_clk) {
|
||||
pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
|
||||
__clk_get_name(oc->_clk));
|
||||
clk_enable(oc->_clk);
|
||||
}
|
||||
}
|
||||
|
||||
static void _disable_optional_clocks(struct omap_hwmod *oh)
|
||||
{
|
||||
struct omap_hwmod_opt_clk *oc;
|
||||
int i;
|
||||
|
||||
pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
|
||||
|
||||
for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
|
||||
if (oc->_clk) {
|
||||
pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
|
||||
__clk_get_name(oc->_clk));
|
||||
clk_disable(oc->_clk);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* _enable_clocks - enable hwmod main clock and interface clocks
|
||||
* @oh: struct omap_hwmod *
|
||||
|
|
@ -917,6 +947,9 @@ static int _enable_clocks(struct omap_hwmod *oh)
|
|||
clk_enable(os->_clk);
|
||||
}
|
||||
|
||||
if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
|
||||
_enable_optional_clocks(oh);
|
||||
|
||||
/* The opt clocks are controlled by the device driver. */
|
||||
|
||||
return 0;
|
||||
|
|
@ -948,41 +981,14 @@ static int _disable_clocks(struct omap_hwmod *oh)
|
|||
clk_disable(os->_clk);
|
||||
}
|
||||
|
||||
if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
|
||||
_disable_optional_clocks(oh);
|
||||
|
||||
/* The opt clocks are controlled by the device driver. */
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void _enable_optional_clocks(struct omap_hwmod *oh)
|
||||
{
|
||||
struct omap_hwmod_opt_clk *oc;
|
||||
int i;
|
||||
|
||||
pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
|
||||
|
||||
for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
|
||||
if (oc->_clk) {
|
||||
pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
|
||||
__clk_get_name(oc->_clk));
|
||||
clk_enable(oc->_clk);
|
||||
}
|
||||
}
|
||||
|
||||
static void _disable_optional_clocks(struct omap_hwmod *oh)
|
||||
{
|
||||
struct omap_hwmod_opt_clk *oc;
|
||||
int i;
|
||||
|
||||
pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
|
||||
|
||||
for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
|
||||
if (oc->_clk) {
|
||||
pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
|
||||
__clk_get_name(oc->_clk));
|
||||
clk_disable(oc->_clk);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
|
||||
* @oh: struct omap_hwmod *
|
||||
|
|
|
|||
|
|
@ -523,6 +523,8 @@ struct omap_hwmod_omap4_prcm {
|
|||
* HWMOD_RECONFIG_IO_CHAIN: omap_hwmod code needs to reconfigure wake-up
|
||||
* events by calling _reconfigure_io_chain() when a device is enabled
|
||||
* or idled.
|
||||
* HWMOD_OPT_CLKS_NEEDED: The optional clocks are needed for the module to
|
||||
* operate and they need to be handled at the same time as the main_clk.
|
||||
*/
|
||||
#define HWMOD_SWSUP_SIDLE (1 << 0)
|
||||
#define HWMOD_SWSUP_MSTANDBY (1 << 1)
|
||||
|
|
@ -538,6 +540,7 @@ struct omap_hwmod_omap4_prcm {
|
|||
#define HWMOD_FORCE_MSTANDBY (1 << 11)
|
||||
#define HWMOD_SWSUP_SIDLE_ACT (1 << 12)
|
||||
#define HWMOD_RECONFIG_IO_CHAIN (1 << 13)
|
||||
#define HWMOD_OPT_CLKS_NEEDED (1 << 14)
|
||||
|
||||
/*
|
||||
* omap_hwmod._int_flags definitions
|
||||
|
|
|
|||
|
|
@ -1297,6 +1297,44 @@ static struct omap_hwmod dra7xx_mcspi4_hwmod = {
|
|||
.dev_attr = &mcspi4_dev_attr,
|
||||
};
|
||||
|
||||
/*
|
||||
* 'mcasp' class
|
||||
*
|
||||
*/
|
||||
static struct omap_hwmod_class_sysconfig dra7xx_mcasp_sysc = {
|
||||
.sysc_offs = 0x0004,
|
||||
.sysc_flags = SYSC_HAS_SIDLEMODE,
|
||||
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
|
||||
.sysc_fields = &omap_hwmod_sysc_type3,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_class dra7xx_mcasp_hwmod_class = {
|
||||
.name = "mcasp",
|
||||
.sysc = &dra7xx_mcasp_sysc,
|
||||
};
|
||||
|
||||
/* mcasp3 */
|
||||
static struct omap_hwmod_opt_clk mcasp3_opt_clks[] = {
|
||||
{ .role = "ahclkx", .clk = "mcasp3_ahclkx_mux" },
|
||||
};
|
||||
|
||||
static struct omap_hwmod dra7xx_mcasp3_hwmod = {
|
||||
.name = "mcasp3",
|
||||
.class = &dra7xx_mcasp_hwmod_class,
|
||||
.clkdm_name = "l4per2_clkdm",
|
||||
.main_clk = "mcasp3_aux_gfclk_mux",
|
||||
.flags = HWMOD_OPT_CLKS_NEEDED,
|
||||
.prcm = {
|
||||
.omap4 = {
|
||||
.clkctrl_offs = DRA7XX_CM_L4PER2_MCASP3_CLKCTRL_OFFSET,
|
||||
.context_offs = DRA7XX_RM_L4PER2_MCASP3_CONTEXT_OFFSET,
|
||||
.modulemode = MODULEMODE_SWCTRL,
|
||||
},
|
||||
},
|
||||
.opt_clks = mcasp3_opt_clks,
|
||||
.opt_clks_cnt = ARRAY_SIZE(mcasp3_opt_clks),
|
||||
};
|
||||
|
||||
/*
|
||||
* 'mmc' class
|
||||
*
|
||||
|
|
@ -2566,6 +2604,22 @@ static struct omap_hwmod_ocp_if dra7xx_l3_main_1__hdmi = {
|
|||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
/* l4_per2 -> mcasp3 */
|
||||
static struct omap_hwmod_ocp_if dra7xx_l4_per2__mcasp3 = {
|
||||
.master = &dra7xx_l4_per2_hwmod,
|
||||
.slave = &dra7xx_mcasp3_hwmod,
|
||||
.clk = "l4_root_clk_div",
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
/* l3_main_1 -> mcasp3 */
|
||||
static struct omap_hwmod_ocp_if dra7xx_l3_main_1__mcasp3 = {
|
||||
.master = &dra7xx_l3_main_1_hwmod,
|
||||
.slave = &dra7xx_mcasp3_hwmod,
|
||||
.clk = "l3_iclk_div",
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
/* l4_per1 -> elm */
|
||||
static struct omap_hwmod_ocp_if dra7xx_l4_per1__elm = {
|
||||
.master = &dra7xx_l4_per1_hwmod,
|
||||
|
|
@ -3308,6 +3362,8 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
|
|||
&dra7xx_l4_wkup__dcan1,
|
||||
&dra7xx_l4_per2__dcan2,
|
||||
&dra7xx_l4_per2__cpgmac0,
|
||||
&dra7xx_l4_per2__mcasp3,
|
||||
&dra7xx_l3_main_1__mcasp3,
|
||||
&dra7xx_gmac__mdio,
|
||||
&dra7xx_l4_cfg__dma_system,
|
||||
&dra7xx_l3_main_1__dss,
|
||||
|
|
|
|||
|
|
@ -144,6 +144,7 @@ static struct omap_hwmod dm81xx_l4_ls_hwmod = {
|
|||
.name = "l4_ls",
|
||||
.clkdm_name = "alwon_l3s_clkdm",
|
||||
.class = &l4_hwmod_class,
|
||||
.flags = HWMOD_NO_IDLEST,
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
@ -155,6 +156,7 @@ static struct omap_hwmod dm81xx_l4_hs_hwmod = {
|
|||
.name = "l4_hs",
|
||||
.clkdm_name = "alwon_l3_med_clkdm",
|
||||
.class = &l4_hwmod_class,
|
||||
.flags = HWMOD_NO_IDLEST,
|
||||
};
|
||||
|
||||
/* L3 slow -> L4 ls peripheral interface running at 125MHz */
|
||||
|
|
@ -850,6 +852,7 @@ static struct omap_hwmod dm816x_emac0_hwmod = {
|
|||
.name = "emac0",
|
||||
.clkdm_name = "alwon_ethernet_clkdm",
|
||||
.class = &dm816x_emac_hwmod_class,
|
||||
.flags = HWMOD_NO_IDLEST,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if dm81xx_l4_hs__emac0 = {
|
||||
|
|
|
|||
|
|
@ -24,9 +24,6 @@
|
|||
#include <linux/platform_data/iommu-omap.h>
|
||||
#include <linux/platform_data/wkup_m3.h>
|
||||
|
||||
#include <asm/siginfo.h>
|
||||
#include <asm/signal.h>
|
||||
|
||||
#include "common.h"
|
||||
#include "common-board-devices.h"
|
||||
#include "dss-common.h"
|
||||
|
|
@ -385,29 +382,6 @@ static void __init omap3_pandora_legacy_init(void)
|
|||
}
|
||||
#endif /* CONFIG_ARCH_OMAP3 */
|
||||
|
||||
#ifdef CONFIG_SOC_TI81XX
|
||||
static int fault_fixed_up;
|
||||
|
||||
static int t410_abort_handler(unsigned long addr, unsigned int fsr,
|
||||
struct pt_regs *regs)
|
||||
{
|
||||
if ((fsr == 0x406 || fsr == 0xc06) && !fault_fixed_up) {
|
||||
pr_warn("External imprecise Data abort at addr=%#lx, fsr=%#x ignored.\n",
|
||||
addr, fsr);
|
||||
fault_fixed_up = 1;
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
static void __init t410_abort_init(void)
|
||||
{
|
||||
hook_fault_code(16 + 6, t410_abort_handler, SIGBUS, BUS_OBJERR,
|
||||
"imprecise external abort");
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
|
||||
static struct iommu_platform_data omap4_iommu_pdata = {
|
||||
.reset_name = "mmu_cache",
|
||||
|
|
@ -536,9 +510,6 @@ static struct pdata_init pdata_quirks[] __initdata = {
|
|||
{ "openpandora,omap3-pandora-600mhz", omap3_pandora_legacy_init, },
|
||||
{ "openpandora,omap3-pandora-1ghz", omap3_pandora_legacy_init, },
|
||||
#endif
|
||||
#ifdef CONFIG_SOC_TI81XX
|
||||
{ "hp,t410", t410_abort_init, },
|
||||
#endif
|
||||
#ifdef CONFIG_SOC_OMAP5
|
||||
{ "ti,omap5-uevm", omap5_uevm_legacy_init, },
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -301,11 +301,11 @@ static void omap3_pm_idle(void)
|
|||
if (omap_irq_pending())
|
||||
return;
|
||||
|
||||
trace_cpu_idle(1, smp_processor_id());
|
||||
trace_cpu_idle_rcuidle(1, smp_processor_id());
|
||||
|
||||
omap_sram_idle();
|
||||
|
||||
trace_cpu_idle(PWR_EVENT_EXIT, smp_processor_id());
|
||||
trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SUSPEND
|
||||
|
|
|
|||
|
|
@ -21,5 +21,5 @@
|
|||
@ find cause bits that are unmasked
|
||||
ands \irqstat, \irqstat, \tmp @ clear Z flag if any
|
||||
clzne \irqnr, \irqstat @ calc irqnr
|
||||
rsbne \irqnr, \irqnr, #31
|
||||
rsbne \irqnr, \irqnr, #32
|
||||
.endm
|
||||
|
|
|
|||
|
|
@ -889,6 +889,7 @@ static void __init e680_init(void)
|
|||
|
||||
pxa_set_keypad_info(&e680_keypad_platform_data);
|
||||
|
||||
pwm_add_table(ezx_pwm_lookup, ARRAY_SIZE(ezx_pwm_lookup));
|
||||
platform_add_devices(ARRAY_AND_SIZE(ezx_devices));
|
||||
platform_add_devices(ARRAY_AND_SIZE(e680_devices));
|
||||
}
|
||||
|
|
@ -956,6 +957,7 @@ static void __init a1200_init(void)
|
|||
|
||||
pxa_set_keypad_info(&a1200_keypad_platform_data);
|
||||
|
||||
pwm_add_table(ezx_pwm_lookup, ARRAY_SIZE(ezx_pwm_lookup));
|
||||
platform_add_devices(ARRAY_AND_SIZE(ezx_devices));
|
||||
platform_add_devices(ARRAY_AND_SIZE(a1200_devices));
|
||||
}
|
||||
|
|
@ -1148,6 +1150,7 @@ static void __init a910_init(void)
|
|||
platform_device_register(&a910_camera);
|
||||
}
|
||||
|
||||
pwm_add_table(ezx_pwm_lookup, ARRAY_SIZE(ezx_pwm_lookup));
|
||||
platform_add_devices(ARRAY_AND_SIZE(ezx_devices));
|
||||
platform_add_devices(ARRAY_AND_SIZE(a910_devices));
|
||||
}
|
||||
|
|
@ -1215,6 +1218,7 @@ static void __init e6_init(void)
|
|||
|
||||
pxa_set_keypad_info(&e6_keypad_platform_data);
|
||||
|
||||
pwm_add_table(ezx_pwm_lookup, ARRAY_SIZE(ezx_pwm_lookup));
|
||||
platform_add_devices(ARRAY_AND_SIZE(ezx_devices));
|
||||
platform_add_devices(ARRAY_AND_SIZE(e6_devices));
|
||||
}
|
||||
|
|
@ -1256,6 +1260,7 @@ static void __init e2_init(void)
|
|||
|
||||
pxa_set_keypad_info(&e2_keypad_platform_data);
|
||||
|
||||
pwm_add_table(ezx_pwm_lookup, ARRAY_SIZE(ezx_pwm_lookup));
|
||||
platform_add_devices(ARRAY_AND_SIZE(ezx_devices));
|
||||
platform_add_devices(ARRAY_AND_SIZE(e2_devices));
|
||||
}
|
||||
|
|
|
|||
|
|
@ -344,7 +344,7 @@ void __init palm27x_pwm_init(int bl, int lcd)
|
|||
{
|
||||
palm_bl_power = bl;
|
||||
palm_lcd_power = lcd;
|
||||
pwm_add_lookup(palm27x_pwm_lookup, ARRAY_SIZE(palm27x_pwm_lookup));
|
||||
pwm_add_table(palm27x_pwm_lookup, ARRAY_SIZE(palm27x_pwm_lookup));
|
||||
platform_device_register(&palm27x_backlight);
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -169,7 +169,7 @@ static inline void palmtc_keys_init(void) {}
|
|||
#if defined(CONFIG_BACKLIGHT_PWM) || defined(CONFIG_BACKLIGHT_PWM_MODULE)
|
||||
static struct pwm_lookup palmtc_pwm_lookup[] = {
|
||||
PWM_LOOKUP("pxa25x-pwm.1", 0, "pwm-backlight.0", NULL, PALMTC_PERIOD_NS,
|
||||
PWM_PERIOD_NORMAL),
|
||||
PWM_POLARITY_NORMAL),
|
||||
};
|
||||
|
||||
static struct platform_pwm_backlight_data palmtc_backlight_data = {
|
||||
|
|
|
|||
|
|
@ -20,7 +20,7 @@
|
|||
#include <plat/cpu.h>
|
||||
#include <plat/cpu-freq-core.h>
|
||||
|
||||
static struct cpufreq_frequency_table s3c2440_plls_12[] __initdata = {
|
||||
static struct cpufreq_frequency_table s3c2440_plls_12[] = {
|
||||
{ .frequency = 75000000, .driver_data = PLLVAL(0x75, 3, 3), }, /* FVco 600.000000 */
|
||||
{ .frequency = 80000000, .driver_data = PLLVAL(0x98, 4, 3), }, /* FVco 640.000000 */
|
||||
{ .frequency = 90000000, .driver_data = PLLVAL(0x70, 2, 3), }, /* FVco 720.000000 */
|
||||
|
|
|
|||
|
|
@ -20,7 +20,7 @@
|
|||
#include <plat/cpu.h>
|
||||
#include <plat/cpu-freq-core.h>
|
||||
|
||||
static struct cpufreq_frequency_table s3c2440_plls_169344[] __initdata = {
|
||||
static struct cpufreq_frequency_table s3c2440_plls_169344[] = {
|
||||
{ .frequency = 78019200, .driver_data = PLLVAL(121, 5, 3), }, /* FVco 624.153600 */
|
||||
{ .frequency = 84067200, .driver_data = PLLVAL(131, 5, 3), }, /* FVco 672.537600 */
|
||||
{ .frequency = 90115200, .driver_data = PLLVAL(141, 5, 3), }, /* FVco 720.921600 */
|
||||
|
|
|
|||
|
|
@ -19,7 +19,7 @@
|
|||
#include "common.h"
|
||||
#include "rcar-gen2.h"
|
||||
|
||||
static const char *r8a7793_boards_compat_dt[] __initconst = {
|
||||
static const char * const r8a7793_boards_compat_dt[] __initconst = {
|
||||
"renesas,r8a7793",
|
||||
NULL,
|
||||
};
|
||||
|
|
|
|||
|
|
@ -13,7 +13,7 @@ config SOC_ZX296702
|
|||
select ARM_GLOBAL_TIMER
|
||||
select HAVE_ARM_SCU if SMP
|
||||
select HAVE_ARM_TWD if SMP
|
||||
select PM_GENERIC_DOMAINS
|
||||
select PM_GENERIC_DOMAINS if PM
|
||||
help
|
||||
Support for ZTE ZX296702 SoC which is a dual core CortexA9MP
|
||||
endif
|
||||
|
|
|
|||
|
|
@ -1061,7 +1061,7 @@ void bpf_jit_compile(struct bpf_prog *fp)
|
|||
}
|
||||
build_epilogue(&ctx);
|
||||
|
||||
flush_icache_range((u32)ctx.target, (u32)(ctx.target + ctx.idx));
|
||||
flush_icache_range((u32)header, (u32)(ctx.target + ctx.idx));
|
||||
|
||||
#if __LINUX_ARM_ARCH__ < 7
|
||||
if (ctx.imm_count)
|
||||
|
|
|
|||
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