memory: stm32-fmc2-ebi: check regmap_read return value
[ Upstream commit 722463f73bcf65a8c818752a38c14ee672c77da1 ] Check regmap_read return value to avoid to use uninitialized local variables. Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com> Link: https://lore.kernel.org/r/20240226101428.37791-3-christophe.kerello@foss.st.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Родитель
06cb3463aa
Коммит
ef1d6d795e
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@ -179,8 +179,11 @@ static int stm32_fmc2_ebi_check_mux(struct stm32_fmc2_ebi *ebi,
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int cs)
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int cs)
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{
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{
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u32 bcr;
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u32 bcr;
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int ret;
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regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr);
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ret = regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr);
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if (ret)
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return ret;
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if (bcr & FMC2_BCR_MTYP)
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if (bcr & FMC2_BCR_MTYP)
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return 0;
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return 0;
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@ -193,8 +196,11 @@ static int stm32_fmc2_ebi_check_waitcfg(struct stm32_fmc2_ebi *ebi,
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int cs)
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int cs)
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{
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{
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u32 bcr, val = FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_NOR);
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u32 bcr, val = FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_NOR);
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int ret;
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regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr);
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ret = regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr);
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if (ret)
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return ret;
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if ((bcr & FMC2_BCR_MTYP) == val && bcr & FMC2_BCR_BURSTEN)
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if ((bcr & FMC2_BCR_MTYP) == val && bcr & FMC2_BCR_BURSTEN)
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return 0;
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return 0;
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@ -207,8 +213,11 @@ static int stm32_fmc2_ebi_check_sync_trans(struct stm32_fmc2_ebi *ebi,
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int cs)
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int cs)
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{
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{
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u32 bcr;
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u32 bcr;
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int ret;
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regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr);
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ret = regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr);
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if (ret)
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return ret;
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if (bcr & FMC2_BCR_BURSTEN)
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if (bcr & FMC2_BCR_BURSTEN)
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return 0;
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return 0;
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@ -221,8 +230,11 @@ static int stm32_fmc2_ebi_check_async_trans(struct stm32_fmc2_ebi *ebi,
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int cs)
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int cs)
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{
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{
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u32 bcr;
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u32 bcr;
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int ret;
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regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr);
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ret = regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr);
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if (ret)
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return ret;
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if (!(bcr & FMC2_BCR_BURSTEN) || !(bcr & FMC2_BCR_CBURSTRW))
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if (!(bcr & FMC2_BCR_BURSTEN) || !(bcr & FMC2_BCR_CBURSTRW))
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return 0;
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return 0;
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@ -235,8 +247,11 @@ static int stm32_fmc2_ebi_check_cpsize(struct stm32_fmc2_ebi *ebi,
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int cs)
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int cs)
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{
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{
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u32 bcr, val = FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_PSRAM);
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u32 bcr, val = FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_PSRAM);
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int ret;
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regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr);
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ret = regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr);
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if (ret)
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return ret;
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if ((bcr & FMC2_BCR_MTYP) == val && bcr & FMC2_BCR_BURSTEN)
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if ((bcr & FMC2_BCR_MTYP) == val && bcr & FMC2_BCR_BURSTEN)
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return 0;
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return 0;
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@ -249,12 +264,18 @@ static int stm32_fmc2_ebi_check_address_hold(struct stm32_fmc2_ebi *ebi,
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int cs)
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int cs)
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{
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{
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u32 bcr, bxtr, val = FIELD_PREP(FMC2_BXTR_ACCMOD, FMC2_BXTR_EXTMOD_D);
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u32 bcr, bxtr, val = FIELD_PREP(FMC2_BXTR_ACCMOD, FMC2_BXTR_EXTMOD_D);
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int ret;
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ret = regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr);
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if (ret)
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return ret;
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regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr);
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if (prop->reg_type == FMC2_REG_BWTR)
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if (prop->reg_type == FMC2_REG_BWTR)
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regmap_read(ebi->regmap, FMC2_BWTR(cs), &bxtr);
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ret = regmap_read(ebi->regmap, FMC2_BWTR(cs), &bxtr);
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else
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else
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regmap_read(ebi->regmap, FMC2_BTR(cs), &bxtr);
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ret = regmap_read(ebi->regmap, FMC2_BTR(cs), &bxtr);
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if (ret)
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return ret;
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if ((!(bcr & FMC2_BCR_BURSTEN) || !(bcr & FMC2_BCR_CBURSTRW)) &&
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if ((!(bcr & FMC2_BCR_BURSTEN) || !(bcr & FMC2_BCR_CBURSTRW)) &&
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((bxtr & FMC2_BXTR_ACCMOD) == val || bcr & FMC2_BCR_MUXEN))
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((bxtr & FMC2_BXTR_ACCMOD) == val || bcr & FMC2_BCR_MUXEN))
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@ -268,12 +289,19 @@ static int stm32_fmc2_ebi_check_clk_period(struct stm32_fmc2_ebi *ebi,
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int cs)
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int cs)
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{
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{
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u32 bcr, bcr1;
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u32 bcr, bcr1;
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int ret;
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regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr);
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ret = regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr);
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if (cs)
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if (ret)
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regmap_read(ebi->regmap, FMC2_BCR1, &bcr1);
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return ret;
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else
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if (cs) {
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ret = regmap_read(ebi->regmap, FMC2_BCR1, &bcr1);
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if (ret)
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return ret;
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} else {
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bcr1 = bcr;
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bcr1 = bcr;
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}
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if (bcr & FMC2_BCR_BURSTEN && (!cs || !(bcr1 & FMC2_BCR1_CCLKEN)))
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if (bcr & FMC2_BCR_BURSTEN && (!cs || !(bcr1 & FMC2_BCR1_CCLKEN)))
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return 0;
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return 0;
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@ -305,12 +333,18 @@ static u32 stm32_fmc2_ebi_ns_to_clk_period(struct stm32_fmc2_ebi *ebi,
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{
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{
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u32 nb_clk_cycles = stm32_fmc2_ebi_ns_to_clock_cycles(ebi, cs, setup);
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u32 nb_clk_cycles = stm32_fmc2_ebi_ns_to_clock_cycles(ebi, cs, setup);
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u32 bcr, btr, clk_period;
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u32 bcr, btr, clk_period;
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int ret;
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ret = regmap_read(ebi->regmap, FMC2_BCR1, &bcr);
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if (ret)
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return ret;
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regmap_read(ebi->regmap, FMC2_BCR1, &bcr);
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if (bcr & FMC2_BCR1_CCLKEN || !cs)
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if (bcr & FMC2_BCR1_CCLKEN || !cs)
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regmap_read(ebi->regmap, FMC2_BTR1, &btr);
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ret = regmap_read(ebi->regmap, FMC2_BTR1, &btr);
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else
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else
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regmap_read(ebi->regmap, FMC2_BTR(cs), &btr);
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ret = regmap_read(ebi->regmap, FMC2_BTR(cs), &btr);
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if (ret)
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return ret;
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clk_period = FIELD_GET(FMC2_BTR_CLKDIV, btr) + 1;
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clk_period = FIELD_GET(FMC2_BTR_CLKDIV, btr) + 1;
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@ -569,11 +603,16 @@ static int stm32_fmc2_ebi_set_address_setup(struct stm32_fmc2_ebi *ebi,
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if (ret)
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if (ret)
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return ret;
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return ret;
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regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr);
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ret = regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr);
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if (ret)
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return ret;
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if (prop->reg_type == FMC2_REG_BWTR)
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if (prop->reg_type == FMC2_REG_BWTR)
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regmap_read(ebi->regmap, FMC2_BWTR(cs), &bxtr);
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ret = regmap_read(ebi->regmap, FMC2_BWTR(cs), &bxtr);
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else
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else
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regmap_read(ebi->regmap, FMC2_BTR(cs), &bxtr);
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ret = regmap_read(ebi->regmap, FMC2_BTR(cs), &bxtr);
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if (ret)
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return ret;
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if ((bxtr & FMC2_BXTR_ACCMOD) == val || bcr & FMC2_BCR_MUXEN)
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if ((bxtr & FMC2_BXTR_ACCMOD) == val || bcr & FMC2_BCR_MUXEN)
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val = clamp_val(setup, 1, FMC2_BXTR_ADDSET_MAX);
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val = clamp_val(setup, 1, FMC2_BXTR_ADDSET_MAX);
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@ -691,11 +730,14 @@ static int stm32_fmc2_ebi_set_max_low_pulse(struct stm32_fmc2_ebi *ebi,
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int cs, u32 setup)
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int cs, u32 setup)
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{
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{
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u32 old_val, new_val, pcscntr;
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u32 old_val, new_val, pcscntr;
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int ret;
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if (setup < 1)
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if (setup < 1)
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return 0;
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return 0;
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regmap_read(ebi->regmap, FMC2_PCSCNTR, &pcscntr);
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ret = regmap_read(ebi->regmap, FMC2_PCSCNTR, &pcscntr);
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if (ret)
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return ret;
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/* Enable counter for the bank */
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/* Enable counter for the bank */
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regmap_update_bits(ebi->regmap, FMC2_PCSCNTR,
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regmap_update_bits(ebi->regmap, FMC2_PCSCNTR,
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@ -942,17 +984,20 @@ static void stm32_fmc2_ebi_disable_bank(struct stm32_fmc2_ebi *ebi, int cs)
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regmap_update_bits(ebi->regmap, FMC2_BCR(cs), FMC2_BCR_MBKEN, 0);
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regmap_update_bits(ebi->regmap, FMC2_BCR(cs), FMC2_BCR_MBKEN, 0);
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}
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}
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static void stm32_fmc2_ebi_save_setup(struct stm32_fmc2_ebi *ebi)
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static int stm32_fmc2_ebi_save_setup(struct stm32_fmc2_ebi *ebi)
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{
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{
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unsigned int cs;
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unsigned int cs;
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int ret;
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for (cs = 0; cs < FMC2_MAX_EBI_CE; cs++) {
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for (cs = 0; cs < FMC2_MAX_EBI_CE; cs++) {
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regmap_read(ebi->regmap, FMC2_BCR(cs), &ebi->bcr[cs]);
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ret = regmap_read(ebi->regmap, FMC2_BCR(cs), &ebi->bcr[cs]);
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regmap_read(ebi->regmap, FMC2_BTR(cs), &ebi->btr[cs]);
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ret |= regmap_read(ebi->regmap, FMC2_BTR(cs), &ebi->btr[cs]);
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regmap_read(ebi->regmap, FMC2_BWTR(cs), &ebi->bwtr[cs]);
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ret |= regmap_read(ebi->regmap, FMC2_BWTR(cs), &ebi->bwtr[cs]);
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if (ret)
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return ret;
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}
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}
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regmap_read(ebi->regmap, FMC2_PCSCNTR, &ebi->pcscntr);
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return regmap_read(ebi->regmap, FMC2_PCSCNTR, &ebi->pcscntr);
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}
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}
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static void stm32_fmc2_ebi_set_setup(struct stm32_fmc2_ebi *ebi)
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static void stm32_fmc2_ebi_set_setup(struct stm32_fmc2_ebi *ebi)
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@ -981,22 +1026,29 @@ static void stm32_fmc2_ebi_disable_banks(struct stm32_fmc2_ebi *ebi)
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}
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}
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/* NWAIT signal can not be connected to EBI controller and NAND controller */
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/* NWAIT signal can not be connected to EBI controller and NAND controller */
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static bool stm32_fmc2_ebi_nwait_used_by_ctrls(struct stm32_fmc2_ebi *ebi)
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static int stm32_fmc2_ebi_nwait_used_by_ctrls(struct stm32_fmc2_ebi *ebi)
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{
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{
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struct device *dev = ebi->dev;
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unsigned int cs;
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unsigned int cs;
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u32 bcr;
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u32 bcr;
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int ret;
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for (cs = 0; cs < FMC2_MAX_EBI_CE; cs++) {
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for (cs = 0; cs < FMC2_MAX_EBI_CE; cs++) {
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if (!(ebi->bank_assigned & BIT(cs)))
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if (!(ebi->bank_assigned & BIT(cs)))
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continue;
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continue;
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regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr);
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ret = regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr);
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if (ret)
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return ret;
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if ((bcr & FMC2_BCR_WAITEN || bcr & FMC2_BCR_ASYNCWAIT) &&
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if ((bcr & FMC2_BCR_WAITEN || bcr & FMC2_BCR_ASYNCWAIT) &&
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ebi->bank_assigned & BIT(FMC2_NAND))
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ebi->bank_assigned & BIT(FMC2_NAND)) {
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return true;
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dev_err(dev, "NWAIT signal connected to EBI and NAND controllers\n");
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return -EINVAL;
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}
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}
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}
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return false;
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return 0;
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}
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}
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static void stm32_fmc2_ebi_enable(struct stm32_fmc2_ebi *ebi)
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static void stm32_fmc2_ebi_enable(struct stm32_fmc2_ebi *ebi)
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@ -1083,10 +1135,9 @@ static int stm32_fmc2_ebi_parse_dt(struct stm32_fmc2_ebi *ebi)
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return -ENODEV;
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return -ENODEV;
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}
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}
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if (stm32_fmc2_ebi_nwait_used_by_ctrls(ebi)) {
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ret = stm32_fmc2_ebi_nwait_used_by_ctrls(ebi);
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dev_err(dev, "NWAIT signal connected to EBI and NAND controllers\n");
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if (ret)
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return -EINVAL;
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return ret;
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}
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stm32_fmc2_ebi_enable(ebi);
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stm32_fmc2_ebi_enable(ebi);
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@ -1131,7 +1182,10 @@ static int stm32_fmc2_ebi_probe(struct platform_device *pdev)
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if (ret)
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if (ret)
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goto err_release;
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goto err_release;
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stm32_fmc2_ebi_save_setup(ebi);
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ret = stm32_fmc2_ebi_save_setup(ebi);
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if (ret)
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goto err_release;
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platform_set_drvdata(pdev, ebi);
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platform_set_drvdata(pdev, ebi);
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return 0;
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return 0;
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