b43: N-PHY: add workarounds for gain control
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Rafał Miłecki
John W. Linville
Родитель
28fd7daabf
Коммит
ef5127a4d2
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@ -712,6 +712,134 @@ static void b43_nphy_stop_playback(struct b43_wldev *dev)
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b43_nphy_stay_in_carrier_search(dev, 0);
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}
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/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/WorkaroundsGainCtrl */
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static void b43_nphy_gain_crtl_workarounds(struct b43_wldev *dev)
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{
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struct b43_phy_n *nphy = dev->phy.n;
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u8 i, j;
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u8 code;
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/* TODO: for PHY >= 3
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s8 *lna1_gain, *lna2_gain;
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u8 *gain_db, *gain_bits;
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u16 *rfseq_init;
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u8 lpf_gain[6] = { 0x00, 0x06, 0x0C, 0x12, 0x12, 0x12 };
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u8 lpf_bits[6] = { 0, 1, 2, 3, 3, 3 };
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*/
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u8 rfseq_events[3] = { 6, 8, 7 };
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u8 rfseq_delays[3] = { 10, 30, 1 };
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if (dev->phy.rev >= 3) {
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/* TODO */
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} else {
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/* Set Clip 2 detect */
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b43_phy_set(dev, B43_NPHY_C1_CGAINI,
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B43_NPHY_C1_CGAINI_CL2DETECT);
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b43_phy_set(dev, B43_NPHY_C2_CGAINI,
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B43_NPHY_C2_CGAINI_CL2DETECT);
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/* Set narrowband clip threshold */
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b43_phy_set(dev, B43_NPHY_C1_NBCLIPTHRES, 0x84);
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b43_phy_set(dev, B43_NPHY_C2_NBCLIPTHRES, 0x84);
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if (!dev->phy.is_40mhz) {
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/* Set dwell lengths */
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b43_phy_set(dev, B43_NPHY_CLIP1_NBDWELL_LEN, 0x002B);
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b43_phy_set(dev, B43_NPHY_CLIP2_NBDWELL_LEN, 0x002B);
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b43_phy_set(dev, B43_NPHY_W1CLIP1_DWELL_LEN, 0x0009);
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b43_phy_set(dev, B43_NPHY_W1CLIP2_DWELL_LEN, 0x0009);
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}
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/* Set wideband clip 2 threshold */
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b43_phy_maskset(dev, B43_NPHY_C1_CLIPWBTHRES,
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~B43_NPHY_C1_CLIPWBTHRES_CLIP2,
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21);
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b43_phy_maskset(dev, B43_NPHY_C2_CLIPWBTHRES,
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~B43_NPHY_C2_CLIPWBTHRES_CLIP2,
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21);
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if (!dev->phy.is_40mhz) {
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b43_phy_maskset(dev, B43_NPHY_C1_CGAINI,
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~B43_NPHY_C1_CGAINI_GAINBKOFF, 0x1);
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b43_phy_maskset(dev, B43_NPHY_C2_CGAINI,
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~B43_NPHY_C2_CGAINI_GAINBKOFF, 0x1);
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b43_phy_maskset(dev, B43_NPHY_C1_CCK_CGAINI,
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~B43_NPHY_C1_CCK_CGAINI_GAINBKOFF, 0x1);
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b43_phy_maskset(dev, B43_NPHY_C2_CCK_CGAINI,
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~B43_NPHY_C2_CCK_CGAINI_GAINBKOFF, 0x1);
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}
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b43_phy_set(dev, B43_NPHY_CCK_SHIFTB_REF, 0x809C);
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if (nphy->gain_boost) {
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if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ &&
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dev->phy.is_40mhz)
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code = 4;
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else
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code = 5;
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} else {
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code = dev->phy.is_40mhz ? 6 : 7;
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}
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/* Set HPVGA2 index */
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b43_phy_maskset(dev, B43_NPHY_C1_INITGAIN,
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~B43_NPHY_C1_INITGAIN_HPVGA2,
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code << B43_NPHY_C1_INITGAIN_HPVGA2_SHIFT);
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b43_phy_maskset(dev, B43_NPHY_C2_INITGAIN,
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~B43_NPHY_C2_INITGAIN_HPVGA2,
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code << B43_NPHY_C2_INITGAIN_HPVGA2_SHIFT);
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b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x1D06);
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b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
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(code << 8 | 0x7C));
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b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
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(code << 8 | 0x7C));
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/* TODO: b43_nphy_adjust_lna_gain_table(dev); */
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if (nphy->elna_gain_config) {
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b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x0808);
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b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0);
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b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1);
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b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1);
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b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1);
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b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x0C08);
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b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0);
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b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1);
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b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1);
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b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1);
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b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x1D06);
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b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
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(code << 8 | 0x74));
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b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
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(code << 8 | 0x74));
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}
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if (dev->phy.rev == 2) {
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for (i = 0; i < 4; i++) {
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b43_phy_write(dev, B43_NPHY_TABLE_ADDR,
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(0x0400 * i) + 0x0020);
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for (j = 0; j < 21; j++)
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b43_phy_write(dev,
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B43_NPHY_TABLE_DATALO, 3 * j);
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}
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/* TODO: b43_nphy_set_rf_sequence(dev, 5,
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rfseq_events, rfseq_delays, 3);*/
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b43_phy_maskset(dev, B43_NPHY_OVER_DGAIN1,
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(u16)~B43_NPHY_OVER_DGAIN_CCKDGECV,
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0x5A << B43_NPHY_OVER_DGAIN_CCKDGECV_SHIFT);
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if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
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b43_phy_maskset(dev, B43_PHY_N(0xC5D),
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0xFF80, 4);
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}
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}
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}
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/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/Workarounds */
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static void b43_nphy_workarounds(struct b43_wldev *dev)
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{
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@ -786,7 +914,7 @@ static void b43_nphy_workarounds(struct b43_wldev *dev)
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/*TODO:b43_nphy_set_rf_sequence(dev, 0, events1, delays1, 7);*/
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/*TODO:b43_nphy_set_rf_sequence(dev, 1, events2, delays2, 7);*/
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/*TODO:b43_nphy_gain_crtl_workarounds(dev);*/
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b43_nphy_gain_crtl_workarounds(dev);
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if (dev->phy.rev < 2) {
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if (b43_phy_read(dev, B43_NPHY_RXCTL) & 0x2)
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