[PATCH] atyfb: Improve power management
Some register were only set in aty_init() which is not called on resume. I added the aty_resume_chip() function to reset those registers on resume. Susped-to-ram now works on a HP Omnibook 6000 with acpi_sleep=s3_bios. Signed-off-by: Ville Syrjala <syrjala@sci.fi> Cc: "Antonino A. Daplas" <adaplas@pol.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
Ville Syrjala
Linus Torvalds
Родитель
4ec3fd71e4
Коммит
efc08a75d3
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@ -185,6 +185,7 @@ struct atyfb_par {
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int mtrr_aper;
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int mtrr_reg;
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#endif
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u32 mem_cntl;
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};
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/*
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@ -314,6 +315,7 @@ struct aty_pll_ops {
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void (*set_pll) (const struct fb_info * info, const union aty_pll * pll);
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void (*get_pll) (const struct fb_info *info, union aty_pll * pll);
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int (*init_pll) (const struct fb_info * info, union aty_pll * pll);
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void (*resume_pll)(const struct fb_info *info, union aty_pll *pll);
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};
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extern const struct aty_pll_ops aty_pll_ati18818_1; /* ATI 18818 */
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@ -242,6 +242,7 @@ static int atyfb_sync(struct fb_info *info);
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*/
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static int aty_init(struct fb_info *info);
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static void aty_resume_chip(struct fb_info *info);
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#ifdef CONFIG_ATARI
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static int store_video_par(char *videopar, unsigned char m64_num);
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#endif
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@ -1971,6 +1972,7 @@ static void atyfb_palette(int enter)
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#if defined(CONFIG_PM) && defined(CONFIG_PCI)
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#ifdef CONFIG_PPC_PMAC
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/* Power management routines. Those are used for PowerBook sleep.
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*/
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static int aty_power_mgmt(int sleep, struct atyfb_par *par)
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@ -2027,21 +2029,13 @@ static int aty_power_mgmt(int sleep, struct atyfb_par *par)
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return timeout ? 0 : -EIO;
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}
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#endif
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static int atyfb_pci_suspend(struct pci_dev *pdev, pm_message_t state)
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{
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struct fb_info *info = pci_get_drvdata(pdev);
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struct atyfb_par *par = (struct atyfb_par *) info->par;
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#ifndef CONFIG_PPC_PMAC
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/* HACK ALERT ! Once I find a proper way to say to each driver
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* individually what will happen with it's PCI slot, I'll change
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* that. On laptops, the AGP slot is just unclocked, so D2 is
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* expected, while on desktops, the card is powered off
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*/
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return 0;
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#endif /* CONFIG_PPC_PMAC */
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if (state.event == pdev->dev.power.power_state.event)
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return 0;
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@ -2059,6 +2053,7 @@ static int atyfb_pci_suspend(struct pci_dev *pdev, pm_message_t state)
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par->asleep = 1;
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par->lock_blank = 1;
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#ifdef CONFIG_PPC_PMAC
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/* Set chip to "suspend" mode */
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if (aty_power_mgmt(1, par)) {
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par->asleep = 0;
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@ -2068,6 +2063,9 @@ static int atyfb_pci_suspend(struct pci_dev *pdev, pm_message_t state)
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release_console_sem();
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return -EIO;
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}
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#else
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pci_set_power_state(pdev, pci_choose_state(pdev, state));
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#endif
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release_console_sem();
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@ -2086,8 +2084,15 @@ static int atyfb_pci_resume(struct pci_dev *pdev)
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acquire_console_sem();
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#ifdef CONFIG_PPC_PMAC
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if (pdev->dev.power.power_state.event == 2)
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aty_power_mgmt(0, par);
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#else
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pci_set_power_state(pdev, PCI_D0);
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#endif
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aty_resume_chip(info);
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par->asleep = 0;
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/* Restore display */
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@ -2339,7 +2344,6 @@ static int __devinit aty_init(struct fb_info *info)
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const char *ramname = NULL, *xtal;
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int gtb_memsize, has_var = 0;
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struct fb_var_screeninfo var;
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u32 i;
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init_waitqueue_head(&par->vblank.wait);
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spin_lock_init(&par->int_lock);
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@ -2470,10 +2474,10 @@ static int __devinit aty_init(struct fb_info *info)
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if(par->pll_ops->get_pll)
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par->pll_ops->get_pll(info, &saved_pll);
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i = aty_ld_le32(MEM_CNTL, par);
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par->mem_cntl = aty_ld_le32(MEM_CNTL, par);
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gtb_memsize = M64_HAS(GTB_DSP);
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if (gtb_memsize)
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switch (i & 0xF) { /* 0xF used instead of MEM_SIZE_ALIAS */
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switch (par->mem_cntl & 0xF) { /* 0xF used instead of MEM_SIZE_ALIAS */
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case MEM_SIZE_512K:
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info->fix.smem_len = 0x80000;
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break;
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@ -2495,7 +2499,7 @@ static int __devinit aty_init(struct fb_info *info)
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default:
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info->fix.smem_len = 0x80000;
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} else
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switch (i & MEM_SIZE_ALIAS) {
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switch (par->mem_cntl & MEM_SIZE_ALIAS) {
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case MEM_SIZE_512K:
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info->fix.smem_len = 0x80000;
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break;
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@ -2525,20 +2529,20 @@ static int __devinit aty_init(struct fb_info *info)
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if (vram) {
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info->fix.smem_len = vram * 1024;
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i = i & ~(gtb_memsize ? 0xF : MEM_SIZE_ALIAS);
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par->mem_cntl &= ~(gtb_memsize ? 0xF : MEM_SIZE_ALIAS);
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if (info->fix.smem_len <= 0x80000)
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i |= MEM_SIZE_512K;
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par->mem_cntl |= MEM_SIZE_512K;
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else if (info->fix.smem_len <= 0x100000)
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i |= MEM_SIZE_1M;
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par->mem_cntl |= MEM_SIZE_1M;
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else if (info->fix.smem_len <= 0x200000)
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i |= gtb_memsize ? MEM_SIZE_2M_GTB : MEM_SIZE_2M;
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par->mem_cntl |= gtb_memsize ? MEM_SIZE_2M_GTB : MEM_SIZE_2M;
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else if (info->fix.smem_len <= 0x400000)
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i |= gtb_memsize ? MEM_SIZE_4M_GTB : MEM_SIZE_4M;
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par->mem_cntl |= gtb_memsize ? MEM_SIZE_4M_GTB : MEM_SIZE_4M;
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else if (info->fix.smem_len <= 0x600000)
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i |= gtb_memsize ? MEM_SIZE_6M_GTB : MEM_SIZE_6M;
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par->mem_cntl |= gtb_memsize ? MEM_SIZE_6M_GTB : MEM_SIZE_6M;
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else
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i |= gtb_memsize ? MEM_SIZE_8M_GTB : MEM_SIZE_8M;
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aty_st_le32(MEM_CNTL, i, par);
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par->mem_cntl |= gtb_memsize ? MEM_SIZE_8M_GTB : MEM_SIZE_8M;
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aty_st_le32(MEM_CNTL, par->mem_cntl, par);
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}
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/*
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@ -2584,6 +2588,8 @@ static int __devinit aty_init(struct fb_info *info)
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#endif
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if(par->pll_ops->init_pll)
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par->pll_ops->init_pll(info, &par->pll);
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if (par->pll_ops->resume_pll)
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par->pll_ops->resume_pll(info, &par->pll);
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/*
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* Last page of 8 MB (4 MB on ISA) aperture is MMIO,
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@ -2755,6 +2761,19 @@ aty_init_exit:
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return -1;
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}
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static void aty_resume_chip(struct fb_info *info)
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{
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struct atyfb_par *par = info->par;
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aty_st_le32(MEM_CNTL, par->mem_cntl, par);
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if (par->pll_ops->resume_pll)
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par->pll_ops->resume_pll(info, &par->pll);
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if (par->aux_start)
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aty_st_le32(BUS_CNTL, aty_ld_le32(BUS_CNTL, par) | BUS_APER_REG_DIS, par);
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}
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#ifdef CONFIG_ATARI
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static int __devinit store_video_par(char *video_str, unsigned char m64_num)
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{
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@ -398,8 +398,8 @@ static int __devinit aty_init_pll_ct(const struct fb_info *info,
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union aty_pll *pll)
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{
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struct atyfb_par *par = (struct atyfb_par *) info->par;
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u8 mpost_div, xpost_div, sclk_post_div_real, sclk_fb_div, spll_cntl2;
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u32 q, i, memcntl, trp;
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u8 mpost_div, xpost_div, sclk_post_div_real;
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u32 q, memcntl, trp;
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u32 dsp_config, dsp_on_off, vga_dsp_config, vga_dsp_on_off;
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#ifdef DEBUG
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int pllmclk, pllsclk;
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@ -575,14 +575,30 @@ static int __devinit aty_init_pll_ct(const struct fb_info *info,
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mpost_div += (q < 32*8);
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}
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sclk_post_div_real = postdividers[mpost_div];
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sclk_fb_div = q * sclk_post_div_real / 8;
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spll_cntl2 = mpost_div << 4;
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pll->ct.sclk_fb_div = q * sclk_post_div_real / 8;
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pll->ct.spll_cntl2 = mpost_div << 4;
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#ifdef DEBUG
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pllsclk = (1000000 * 2 * sclk_fb_div) /
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pllsclk = (1000000 * 2 * pll->ct.sclk_fb_div) /
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(par->ref_clk_per * pll->ct.pll_ref_div);
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printk("atyfb(%s): use sclk, pllsclk=%d MHz, sclk=mclk=%d MHz\n",
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__FUNCTION__, pllsclk, pllsclk / sclk_post_div_real);
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#endif
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}
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/* Disable the extra precision pixel clock controls since we do not use them. */
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pll->ct.ext_vpll_cntl = aty_ld_pll_ct(EXT_VPLL_CNTL, par);
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pll->ct.ext_vpll_cntl &= ~(EXT_VPLL_EN | EXT_VPLL_VGA_EN | EXT_VPLL_INSYNC);
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return 0;
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}
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static void aty_resume_pll_ct(const struct fb_info *info,
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union aty_pll *pll)
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{
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struct atyfb_par *par = info->par;
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if (par->mclk_per != par->xclk_per) {
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int i;
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/*
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* This disables the sclk, crashes the computer as reported:
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* aty_st_pll_ct(SPLL_CNTL2, 3, info);
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@ -590,8 +606,8 @@ static int __devinit aty_init_pll_ct(const struct fb_info *info,
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* So it seems the sclk must be enabled before it is used;
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* so PLL_GEN_CNTL must be programmed *after* the sclk.
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*/
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aty_st_pll_ct(SCLK_FB_DIV, sclk_fb_div, par);
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aty_st_pll_ct(SPLL_CNTL2, spll_cntl2, par);
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aty_st_pll_ct(SCLK_FB_DIV, pll->ct.sclk_fb_div, par);
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aty_st_pll_ct(SPLL_CNTL2, pll->ct.spll_cntl2, par);
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/*
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* The sclk has been started. However, I believe the first clock
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* ticks it generates are not very stable. Hope this primitive loop
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@ -605,11 +621,7 @@ static int __devinit aty_init_pll_ct(const struct fb_info *info,
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aty_st_pll_ct(PLL_GEN_CNTL, pll->ct.pll_gen_cntl, par);
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aty_st_pll_ct(MCLK_FB_DIV, pll->ct.mclk_fb_div, par);
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aty_st_pll_ct(PLL_EXT_CNTL, pll->ct.pll_ext_cntl, par);
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/* Disable the extra precision pixel clock controls since we do not use them. */
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aty_st_pll_ct(EXT_VPLL_CNTL, aty_ld_pll_ct(EXT_VPLL_CNTL, par) &
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~(EXT_VPLL_EN | EXT_VPLL_VGA_EN | EXT_VPLL_INSYNC), par);
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return 0;
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aty_st_pll_ct(EXT_VPLL_CNTL, pll->ct.ext_vpll_cntl, par);
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}
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static int dummy(void)
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@ -626,5 +638,6 @@ const struct aty_pll_ops aty_pll_ct = {
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.pll_to_var = aty_pll_to_var_ct,
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.set_pll = aty_set_pll_ct,
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.get_pll = aty_get_pll_ct,
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.init_pll = aty_init_pll_ct
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.init_pll = aty_init_pll_ct,
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.resume_pll = aty_resume_pll_ct,
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};
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