Misc updates:
- Extend the x86 family/model macros with a steppings dimension, because x86 life isn't complex enough and Intel uses steppings to differentiate between different CPUs. :-/ - Convert the TSC deadline timer quirks to the steppings macros. - Clean up asm mnemonics. - Fix the handling of an AMD erratum, or in other words, fix a kernel erratum. Signed-off-by: Ingo Molnar <mingo@kernel.org> -----BEGIN PGP SIGNATURE----- iQJFBAABCgAvFiEEBpT5eoXrXCwVQwEKEnMQ0APhK1gFAl7VL2wRHG1pbmdvQGtl cm5lbC5vcmcACgkQEnMQ0APhK1hxYQ//dic//qQ+4GOL1wP1Qj8EiGOzaWdynoia oDi7Si1I9vy58iCCRgkQKmxEwfnHcM5+NC6/091S4BD2IE6o+iD1YhPsGZK8DT4Y FmeD8pgtx5LMJFMBe6KRyek1s0JblP6v0Q0BwUk7YtV6k0oSP+f/2n5BGj2+P7YH 3Iw438M5JhIrzVp3PnCgJoZkSm9iRnZqbBtR8nd2SO+vx8M75cX27LL6fdaCypRj wH9w6+J2NhAZStmEv54LKOdO5RAPJjvatbTZFMEFdceAGFEbHPJIees7paoC+DTP 3BuhzF/9ghDNKly6Zz3PtyNNDP1vglZ1W9dJkCfTXUWlZKbQV94Yk+JbP5mndxqn +f3eD/dInofHiCeAh1Sfj3BCGdOSjgFMBB57CKkCy4LehXwJ9C2eBcbxd4XMfEkd h0EywZrp1L10AxDHtq5x82xf1fwfTDyvlYmJrBshXfiitaySn+mPVJMuj3wvqJSP WKbJS4HfkekIaf9WoUA+Ay6FJdY7nNirViRrQEZVmDPTV0EDfcaNM5p6Ttkja3Ph VoVa8Ms8FRqTfh6xCfckYR+vI44U+AFNLM6YFyetGYc0yVXNzg3vLy2DbqLRolWy t1upDdNf1TMJg4BaMrBzZgDg/uI2BM3jeOj69U0cboO2JhJjxjl3qPeiYDKD50MK Z1Nho933894= =QKjn -----END PGP SIGNATURE----- Merge tag 'x86-cpu-2020-06-01' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 cpu updates from Ingo Molnar: "Misc updates: - Extend the x86 family/model macros with a steppings dimension, because x86 life isn't complex enough and Intel uses steppings to differentiate between different CPUs. :-/ - Convert the TSC deadline timer quirks to the steppings macros. - Clean up asm mnemonics. - Fix the handling of an AMD erratum, or in other words, fix a kernel erratum" * tag 'x86-cpu-2020-06-01' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/cpu: Use RDRAND and RDSEED mnemonics in archrandom.h x86/cpu: Use INVPCID mnemonic in invpcid.h x86/cpu/amd: Make erratum #1054 a legacy erratum x86/apic: Convert the TSC deadline timer matching to steppings macro x86/cpu: Add a X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS() macro x86/cpu: Add a steppings field to struct x86_cpu_id
This commit is contained in:
Коммит
eff5ddadab
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@ -15,16 +15,6 @@
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#define RDRAND_RETRY_LOOPS 10
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#define RDRAND_INT ".byte 0x0f,0xc7,0xf0"
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#define RDSEED_INT ".byte 0x0f,0xc7,0xf8"
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#ifdef CONFIG_X86_64
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# define RDRAND_LONG ".byte 0x48,0x0f,0xc7,0xf0"
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# define RDSEED_LONG ".byte 0x48,0x0f,0xc7,0xf8"
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#else
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# define RDRAND_LONG RDRAND_INT
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# define RDSEED_LONG RDSEED_INT
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#endif
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/* Unconditional execution of RDRAND and RDSEED */
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static inline bool __must_check rdrand_long(unsigned long *v)
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@ -32,9 +22,9 @@ static inline bool __must_check rdrand_long(unsigned long *v)
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bool ok;
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unsigned int retry = RDRAND_RETRY_LOOPS;
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do {
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asm volatile(RDRAND_LONG
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asm volatile("rdrand %[out]"
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CC_SET(c)
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: CC_OUT(c) (ok), "=a" (*v));
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: CC_OUT(c) (ok), [out] "=r" (*v));
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if (ok)
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return true;
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} while (--retry);
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@ -46,9 +36,9 @@ static inline bool __must_check rdrand_int(unsigned int *v)
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bool ok;
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unsigned int retry = RDRAND_RETRY_LOOPS;
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do {
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asm volatile(RDRAND_INT
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asm volatile("rdrand %[out]"
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CC_SET(c)
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: CC_OUT(c) (ok), "=a" (*v));
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: CC_OUT(c) (ok), [out] "=r" (*v));
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if (ok)
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return true;
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} while (--retry);
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@ -58,18 +48,18 @@ static inline bool __must_check rdrand_int(unsigned int *v)
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static inline bool __must_check rdseed_long(unsigned long *v)
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{
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bool ok;
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asm volatile(RDSEED_LONG
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asm volatile("rdseed %[out]"
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CC_SET(c)
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: CC_OUT(c) (ok), "=a" (*v));
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: CC_OUT(c) (ok), [out] "=r" (*v));
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return ok;
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}
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static inline bool __must_check rdseed_int(unsigned int *v)
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{
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bool ok;
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asm volatile(RDSEED_INT
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asm volatile("rdseed %[out]"
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CC_SET(c)
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: CC_OUT(c) (ok), "=a" (*v));
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: CC_OUT(c) (ok), [out] "=r" (*v));
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return ok;
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}
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@ -20,12 +20,14 @@
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#define X86_CENTAUR_FAM6_C7_D 0xd
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#define X86_CENTAUR_FAM6_NANO 0xf
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#define X86_STEPPINGS(mins, maxs) GENMASK(maxs, mins)
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/**
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* X86_MATCH_VENDOR_FAM_MODEL_FEATURE - Base macro for CPU matching
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* X86_MATCH_VENDOR_FAM_MODEL_STEPPINGS_FEATURE - Base macro for CPU matching
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* @_vendor: The vendor name, e.g. INTEL, AMD, HYGON, ..., ANY
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* The name is expanded to X86_VENDOR_@_vendor
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* @_family: The family number or X86_FAMILY_ANY
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* @_model: The model number, model constant or X86_MODEL_ANY
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* @_steppings: Bitmask for steppings, stepping constant or X86_STEPPING_ANY
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* @_feature: A X86_FEATURE bit or X86_FEATURE_ANY
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* @_data: Driver specific data or NULL. The internal storage
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* format is unsigned long. The supplied value, pointer
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@ -37,15 +39,34 @@
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* into another macro at the usage site for good reasons, then please
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* start this local macro with X86_MATCH to allow easy grepping.
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*/
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#define X86_MATCH_VENDOR_FAM_MODEL_FEATURE(_vendor, _family, _model, \
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_feature, _data) { \
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#define X86_MATCH_VENDOR_FAM_MODEL_STEPPINGS_FEATURE(_vendor, _family, _model, \
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_steppings, _feature, _data) { \
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.vendor = X86_VENDOR_##_vendor, \
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.family = _family, \
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.model = _model, \
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.steppings = _steppings, \
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.feature = _feature, \
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.driver_data = (unsigned long) _data \
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}
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/**
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* X86_MATCH_VENDOR_FAM_MODEL_FEATURE - Macro for CPU matching
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* @_vendor: The vendor name, e.g. INTEL, AMD, HYGON, ..., ANY
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* The name is expanded to X86_VENDOR_@_vendor
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* @_family: The family number or X86_FAMILY_ANY
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* @_model: The model number, model constant or X86_MODEL_ANY
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* @_feature: A X86_FEATURE bit or X86_FEATURE_ANY
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* @_data: Driver specific data or NULL. The internal storage
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* format is unsigned long. The supplied value, pointer
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* etc. is casted to unsigned long internally.
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*
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* The steppings arguments of X86_MATCH_VENDOR_FAM_MODEL_STEPPINGS_FEATURE() is
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* set to wildcards.
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*/
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#define X86_MATCH_VENDOR_FAM_MODEL_FEATURE(vendor, family, model, feature, data) \
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X86_MATCH_VENDOR_FAM_MODEL_STEPPINGS_FEATURE(vendor, family, model, \
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X86_STEPPING_ANY, feature, data)
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/**
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* X86_MATCH_VENDOR_FAM_FEATURE - Macro for matching vendor, family and CPU feature
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* @vendor: The vendor name, e.g. INTEL, AMD, HYGON, ..., ANY
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@ -139,6 +160,10 @@
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#define X86_MATCH_INTEL_FAM6_MODEL(model, data) \
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X86_MATCH_VENDOR_FAM_MODEL(INTEL, 6, INTEL_FAM6_##model, data)
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#define X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(model, steppings, data) \
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X86_MATCH_VENDOR_FAM_MODEL_STEPPINGS_FEATURE(INTEL, 6, INTEL_FAM6_##model, \
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steppings, X86_FEATURE_ANY, data)
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/*
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* Match specific microcode revisions.
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*
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@ -12,12 +12,9 @@ static inline void __invpcid(unsigned long pcid, unsigned long addr,
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* stale TLB entries and, especially if we're flushing global
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* mappings, we don't want the compiler to reorder any subsequent
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* memory accesses before the TLB flush.
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*
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* The hex opcode is invpcid (%ecx), %eax in 32-bit mode and
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* invpcid (%rcx), %rax in long mode.
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*/
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asm volatile (".byte 0x66, 0x0f, 0x38, 0x82, 0x01"
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: : "m" (desc), "a" (type), "c" (&desc) : "memory");
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asm volatile("invpcid %[desc], %[type]"
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:: [desc] "m" (desc), [type] "r" (type) : "memory");
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}
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#define INVPCID_TYPE_INDIV_ADDR 0
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@ -544,46 +544,20 @@ static struct clock_event_device lapic_clockevent = {
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};
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static DEFINE_PER_CPU(struct clock_event_device, lapic_events);
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static __init u32 hsx_deadline_rev(void)
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{
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switch (boot_cpu_data.x86_stepping) {
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case 0x02: return 0x3a; /* EP */
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case 0x04: return 0x0f; /* EX */
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}
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return ~0U;
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}
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static __init u32 bdx_deadline_rev(void)
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{
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switch (boot_cpu_data.x86_stepping) {
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case 0x02: return 0x00000011;
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case 0x03: return 0x0700000e;
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case 0x04: return 0x0f00000c;
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case 0x05: return 0x0e000003;
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}
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return ~0U;
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}
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static __init u32 skx_deadline_rev(void)
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{
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switch (boot_cpu_data.x86_stepping) {
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case 0x03: return 0x01000136;
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case 0x04: return 0x02000014;
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}
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if (boot_cpu_data.x86_stepping > 4)
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return 0;
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return ~0U;
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}
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static const struct x86_cpu_id deadline_match[] __initconst = {
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X86_MATCH_INTEL_FAM6_MODEL( HASWELL_X, &hsx_deadline_rev),
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X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(HASWELL_X, X86_STEPPINGS(0x2, 0x2), 0x3a), /* EP */
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X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(HASWELL_X, X86_STEPPINGS(0x4, 0x4), 0x0f), /* EX */
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X86_MATCH_INTEL_FAM6_MODEL( BROADWELL_X, 0x0b000020),
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X86_MATCH_INTEL_FAM6_MODEL( BROADWELL_D, &bdx_deadline_rev),
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X86_MATCH_INTEL_FAM6_MODEL( SKYLAKE_X, &skx_deadline_rev),
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X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(BROADWELL_D, X86_STEPPINGS(0x2, 0x2), 0x00000011),
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X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(BROADWELL_D, X86_STEPPINGS(0x3, 0x3), 0x0700000e),
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X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(BROADWELL_D, X86_STEPPINGS(0x4, 0x4), 0x0f00000c),
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X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(BROADWELL_D, X86_STEPPINGS(0x5, 0x5), 0x0e000003),
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X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(SKYLAKE_X, X86_STEPPINGS(0x3, 0x3), 0x01000136),
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X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(SKYLAKE_X, X86_STEPPINGS(0x4, 0x4), 0x02000014),
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X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(SKYLAKE_X, X86_STEPPINGS(0x5, 0xf), 0),
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X86_MATCH_INTEL_FAM6_MODEL( HASWELL, 0x22),
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X86_MATCH_INTEL_FAM6_MODEL( HASWELL_L, 0x20),
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if (!m)
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return true;
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/*
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* Function pointers will have the MSB set due to address layout,
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* immediate revisions will not.
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*/
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if ((long)m->driver_data < 0)
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rev = ((u32 (*)(void))(m->driver_data))();
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else
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rev = (u32)m->driver_data;
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rev = (u32)m->driver_data;
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if (boot_cpu_data.microcode >= rev)
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return true;
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@ -1145,8 +1145,7 @@ static const int amd_erratum_383[] =
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/* #1054: Instructions Retired Performance Counter May Be Inaccurate */
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static const int amd_erratum_1054[] =
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AMD_OSVW_ERRATUM(0, AMD_MODEL_RANGE(0x17, 0, 0, 0x2f, 0xf));
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AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x17, 0, 0, 0x2f, 0xf));
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static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum)
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{
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@ -39,13 +39,18 @@ const struct x86_cpu_id *x86_match_cpu(const struct x86_cpu_id *match)
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const struct x86_cpu_id *m;
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struct cpuinfo_x86 *c = &boot_cpu_data;
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for (m = match; m->vendor | m->family | m->model | m->feature; m++) {
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for (m = match;
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m->vendor | m->family | m->model | m->steppings | m->feature;
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m++) {
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if (m->vendor != X86_VENDOR_ANY && c->x86_vendor != m->vendor)
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continue;
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if (m->family != X86_FAMILY_ANY && c->x86 != m->family)
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continue;
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if (m->model != X86_MODEL_ANY && c->x86_model != m->model)
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continue;
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if (m->steppings != X86_STEPPING_ANY &&
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!(BIT(c->x86_stepping) & m->steppings))
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continue;
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if (m->feature != X86_FEATURE_ANY && !cpu_has(c, m->feature))
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continue;
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return m;
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|
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|
@ -663,6 +663,7 @@ struct x86_cpu_id {
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__u16 vendor;
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__u16 family;
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__u16 model;
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__u16 steppings;
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__u16 feature; /* bit index */
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kernel_ulong_t driver_data;
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};
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|
@ -671,6 +672,7 @@ struct x86_cpu_id {
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#define X86_VENDOR_ANY 0xffff
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#define X86_FAMILY_ANY 0
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#define X86_MODEL_ANY 0
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#define X86_STEPPING_ANY 0
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#define X86_FEATURE_ANY 0 /* Same as FPU, you can't test for that */
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/*
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