[PATCH] genirq: x86_64 irq: Kill gsi_irq_sharing
After raising the number of irqs the system supports this function is no longer necessary. Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Rajesh Shah <rajesh.shah@intel.com> Cc: Andi Kleen <ak@muc.de> Cc: "Protasevich, Natalie" <Natalie.Protasevich@UNISYS.com> Cc: "Luck, Tony" <tony.luck@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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@ -62,8 +62,6 @@ static inline int acpi_madt_oem_check(char *oem_id, char *oem_table_id) { return
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#include <mach_mpparse.h>
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#endif /* CONFIG_X86_LOCAL_APIC */
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static inline int gsi_irq_sharing(int gsi) { return gsi; }
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#endif /* X86 */
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#define BAD_MADT_ENTRY(entry, end) ( \
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@ -468,7 +466,7 @@ void __init acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger)
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int acpi_gsi_to_irq(u32 gsi, unsigned int *irq)
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{
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*irq = gsi_irq_sharing(gsi);
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*irq = gsi;
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return 0;
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}
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@ -191,8 +191,6 @@ static void set_ioapic_affinity_irq(unsigned int irq, cpumask_t mask)
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}
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#endif
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static u8 gsi_2_irq[NR_IRQ_VECTORS] = { [0 ... NR_IRQ_VECTORS-1] = 0xFF };
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/*
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* The common case is 1:1 IRQ<->pin mappings. Sometimes there are
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* shared ISA-space IRQs, so we have to support them. We are super
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@ -518,64 +516,6 @@ static inline int irq_trigger(int idx)
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return MPBIOS_trigger(idx);
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}
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static int next_irq = 16;
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/*
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* gsi_irq_sharing -- Name overload! "irq" can be either a legacy IRQ
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* in the range 0-15, a linux IRQ in the range 0-223, or a GSI number
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* from ACPI, which can reach 800 in large boxen.
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*
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* Compact the sparse GSI space into a sequential IRQ series and reuse
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* vectors if possible.
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*/
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int gsi_irq_sharing(int gsi)
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{
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int i, tries, vector;
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BUG_ON(gsi >= NR_IRQ_VECTORS);
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if (platform_legacy_irq(gsi))
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return gsi;
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if (gsi_2_irq[gsi] != 0xFF)
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return (int)gsi_2_irq[gsi];
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tries = NR_IRQS;
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try_again:
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vector = assign_irq_vector(gsi, TARGET_CPUS);
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/*
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* Sharing vectors means sharing IRQs, so scan irq_vectors for previous
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* use of vector and if found, return that IRQ. However, we never want
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* to share legacy IRQs, which usually have a different trigger mode
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* than PCI.
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*/
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for (i = 0; i < NR_IRQS; i++)
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if (IO_APIC_VECTOR(i) == vector)
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break;
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if (platform_legacy_irq(i)) {
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if (--tries >= 0) {
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IO_APIC_VECTOR(i) = 0;
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goto try_again;
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}
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panic("gsi_irq_sharing: didn't find an IRQ using vector 0x%02X for GSI %d", vector, gsi);
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}
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if (i < NR_IRQS) {
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gsi_2_irq[gsi] = i;
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printk(KERN_INFO "GSI %d sharing vector 0x%02X and IRQ %d\n",
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gsi, vector, i);
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return i;
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}
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i = next_irq++;
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BUG_ON(i >= NR_IRQS);
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gsi_2_irq[gsi] = i;
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IO_APIC_VECTOR(i) = vector;
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printk(KERN_INFO "GSI %d assigned vector 0x%02X and IRQ %d\n",
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gsi, vector, i);
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return i;
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}
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static int pin_2_irq(int idx, int apic, int pin)
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{
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int irq, i;
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@ -597,7 +537,6 @@ static int pin_2_irq(int idx, int apic, int pin)
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while (i < apic)
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irq += nr_ioapic_registers[i++];
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irq += pin;
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irq = gsi_irq_sharing(irq);
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}
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BUG_ON(irq >= NR_IRQS);
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return irq;
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@ -1872,7 +1811,6 @@ int io_apic_set_pci_routing (int ioapic, int pin, int irq, int triggering, int p
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return -EINVAL;
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}
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irq = gsi_irq_sharing(irq);
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/*
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* IRQs < 16 are already in the irq_2_pin[] map
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*/
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