sparc: move MSI related definitions to where they are used
The definitions in arch/sparc/include/asm/msi.h are only used in arch/sparc/mm/srmmu.c, so it makes sense to have them in the C file directly. In addition, having a custom arch/sparc/include/asm/msi.h prevents from using the asm-generic version of this header, which is necessary to be able to include <linux/msi.h> when CONFIG_GENERIC_MSI_IRQ_DOMAIN is enabled. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -1,32 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* msi.h: Defines specific to the MBus - Sbus - Interface.
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*
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* Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
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* Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be)
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*/
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#ifndef _SPARC_MSI_H
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#define _SPARC_MSI_H
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/*
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* Locations of MSI Registers.
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*/
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#define MSI_MBUS_ARBEN 0xe0001008 /* MBus Arbiter Enable register */
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/*
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* Useful bits in the MSI Registers.
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*/
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#define MSI_ASYNC_MODE 0x80000000 /* Operate the MSI asynchronously */
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static inline void msi_set_sync(void)
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{
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__asm__ __volatile__ ("lda [%0] %1, %%g3\n\t"
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"andn %%g3, %2, %%g3\n\t"
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"sta %%g3, [%0] %1\n\t" : :
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"r" (MSI_MBUS_ARBEN),
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"i" (ASI_M_CTL), "r" (MSI_ASYNC_MODE) : "g3");
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}
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#endif /* !(_SPARC_MSI_H) */
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@ -37,7 +37,6 @@
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#include <asm/mbus.h>
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#include <asm/page.h>
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#include <asm/asi.h>
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#include <asm/msi.h>
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#include <asm/smp.h>
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#include <asm/io.h>
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@ -116,6 +115,25 @@ static inline void srmmu_ctxd_set(ctxd_t *ctxp, pgd_t *pgdp)
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set_pte((pte_t *)ctxp, pte);
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}
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/*
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* Locations of MSI Registers.
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*/
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#define MSI_MBUS_ARBEN 0xe0001008 /* MBus Arbiter Enable register */
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/*
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* Useful bits in the MSI Registers.
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*/
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#define MSI_ASYNC_MODE 0x80000000 /* Operate the MSI asynchronously */
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static void msi_set_sync(void)
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{
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__asm__ __volatile__ ("lda [%0] %1, %%g3\n\t"
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"andn %%g3, %2, %%g3\n\t"
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"sta %%g3, [%0] %1\n\t" : :
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"r" (MSI_MBUS_ARBEN),
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"i" (ASI_M_CTL), "r" (MSI_ASYNC_MODE) : "g3");
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}
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void pmd_set(pmd_t *pmdp, pte_t *ptep)
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{
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unsigned long ptp; /* Physical address, shifted right by 4 */
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