mmc: renesas_sdhi: Change HW adjustment register according to speed mode
SCC is used for SDR104/HS200/HS400. We need to change SCC_DT2FF according to the mode. If it is inappropriate, CRC error tends to occur. This adds variable "tap_hs400" for HS400 mode and configures SCC_DT2FF as needed. Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com> [wsa: rebased to upstream and updated commit message] Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund@ragnatech.se> Tested-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -15,6 +15,7 @@
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struct renesas_sdhi_scc {
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struct renesas_sdhi_scc {
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unsigned long clk_rate; /* clock rate for SDR104 */
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unsigned long clk_rate; /* clock rate for SDR104 */
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u32 tap; /* sampling clock position for SDR104 */
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u32 tap; /* sampling clock position for SDR104 */
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u32 tap_hs400; /* sampling clock position for HS400 */
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};
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};
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struct renesas_sdhi_of_data {
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struct renesas_sdhi_of_data {
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@ -49,6 +50,7 @@ struct renesas_sdhi {
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struct pinctrl_state *pins_default, *pins_uhs;
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struct pinctrl_state *pins_default, *pins_uhs;
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void __iomem *scc_ctl;
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void __iomem *scc_ctl;
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u32 scc_tappos;
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u32 scc_tappos;
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u32 scc_tappos_hs400;
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};
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};
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#define host_to_priv(host) \
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#define host_to_priv(host) \
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@ -337,6 +337,10 @@ static void renesas_sdhi_hs400_complete(struct tmio_mmc_host *host)
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/* Set HS400 mode */
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/* Set HS400 mode */
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sd_ctrl_write16(host, CTL_SDIF_MODE, 0x0001 |
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sd_ctrl_write16(host, CTL_SDIF_MODE, 0x0001 |
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sd_ctrl_read16(host, CTL_SDIF_MODE));
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sd_ctrl_read16(host, CTL_SDIF_MODE));
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sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_DT2FF,
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priv->scc_tappos_hs400);
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sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_TMPPORT2,
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sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_TMPPORT2,
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(SH_MOBILE_SDHI_SCC_TMPPORT2_HS400EN |
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(SH_MOBILE_SDHI_SCC_TMPPORT2_HS400EN |
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SH_MOBILE_SDHI_SCC_TMPPORT2_HS400OSEL) |
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SH_MOBILE_SDHI_SCC_TMPPORT2_HS400OSEL) |
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@ -396,6 +400,9 @@ static void renesas_sdhi_reset_hs400_mode(struct tmio_mmc_host *host,
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/* Reset HS400 mode */
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/* Reset HS400 mode */
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sd_ctrl_write16(host, CTL_SDIF_MODE, ~0x0001 &
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sd_ctrl_write16(host, CTL_SDIF_MODE, ~0x0001 &
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sd_ctrl_read16(host, CTL_SDIF_MODE));
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sd_ctrl_read16(host, CTL_SDIF_MODE));
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sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_DT2FF, priv->scc_tappos);
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sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_TMPPORT2,
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sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_TMPPORT2,
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~(SH_MOBILE_SDHI_SCC_TMPPORT2_HS400EN |
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~(SH_MOBILE_SDHI_SCC_TMPPORT2_HS400EN |
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SH_MOBILE_SDHI_SCC_TMPPORT2_HS400OSEL) &
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SH_MOBILE_SDHI_SCC_TMPPORT2_HS400OSEL) &
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@ -786,6 +793,7 @@ int renesas_sdhi_probe(struct platform_device *pdev,
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if (taps[i].clk_rate == 0 ||
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if (taps[i].clk_rate == 0 ||
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taps[i].clk_rate == host->mmc->f_max) {
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taps[i].clk_rate == host->mmc->f_max) {
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priv->scc_tappos = taps->tap;
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priv->scc_tappos = taps->tap;
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priv->scc_tappos_hs400 = taps->tap_hs400;
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hit = true;
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hit = true;
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break;
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break;
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}
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}
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@ -81,6 +81,7 @@ static struct renesas_sdhi_scc rcar_gen3_scc_taps[] = {
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{
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{
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.clk_rate = 0,
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.clk_rate = 0,
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.tap = 0x00000300,
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.tap = 0x00000300,
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.tap_hs400 = 0x00000704,
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},
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},
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};
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};
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