Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-2.6
This commit is contained in:
Коммит
f10023a4ef
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@ -587,8 +587,8 @@ struct ath9k_country_entry {
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u8 iso[3];
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};
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#define REG_WRITE(_ah, _reg, _val) iowrite32(_val, _ah->ah_sh + _reg)
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#define REG_READ(_ah, _reg) ioread32(_ah->ah_sh + _reg)
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#define REG_WRITE(_ah, _reg, _val) ath9k_iowrite32((_ah), (_reg), (_val))
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#define REG_READ(_ah, _reg) ath9k_ioread32((_ah), (_reg))
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#define SM(_v, _f) (((_v) << _f##_S) & _f)
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#define MS(_v, _f) (((_v) & _f) >> _f##_S)
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@ -701,6 +701,7 @@ struct ath_softc {
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struct ath_hal *sc_ah;
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void __iomem *mem;
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spinlock_t sc_resetlock;
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spinlock_t sc_serial_rw;
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struct mutex mutex;
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u8 sc_curbssid[ETH_ALEN];
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@ -751,4 +752,36 @@ int ath_get_hal_qnum(u16 queue, struct ath_softc *sc);
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int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc);
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int ath_cabq_update(struct ath_softc *);
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/*
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* Read and write, they both share the same lock. We do this to serialize
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* reads and writes on Atheros 802.11n PCI devices only. This is required
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* as the FIFO on these devices can only accept sanely 2 requests. After
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* that the device goes bananas. Serializing the reads/writes prevents this
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* from happening.
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*/
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static inline void ath9k_iowrite32(struct ath_hal *ah, u32 reg_offset, u32 val)
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{
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if (ah->ah_config.serialize_regmode == SER_REG_MODE_ON) {
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unsigned long flags;
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spin_lock_irqsave(&ah->ah_sc->sc_serial_rw, flags);
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iowrite32(val, ah->ah_sc->mem + reg_offset);
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spin_unlock_irqrestore(&ah->ah_sc->sc_serial_rw, flags);
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} else
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iowrite32(val, ah->ah_sc->mem + reg_offset);
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}
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static inline unsigned int ath9k_ioread32(struct ath_hal *ah, u32 reg_offset)
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{
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u32 val;
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if (ah->ah_config.serialize_regmode == SER_REG_MODE_ON) {
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unsigned long flags;
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spin_lock_irqsave(&ah->ah_sc->sc_serial_rw, flags);
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val = ioread32(ah->ah_sc->mem + reg_offset);
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spin_unlock_irqrestore(&ah->ah_sc->sc_serial_rw, flags);
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} else
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val = ioread32(ah->ah_sc->mem + reg_offset);
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return val;
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}
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#endif /* CORE_H */
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@ -437,6 +437,25 @@ static void ath9k_hw_set_defaults(struct ath_hal *ah)
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}
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ah->ah_config.intr_mitigation = 1;
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/*
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* We need this for PCI devices only (Cardbus, PCI, miniPCI)
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* _and_ if on non-uniprocessor systems (Multiprocessor/HT).
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* This means we use it for all AR5416 devices, and the few
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* minor PCI AR9280 devices out there.
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*
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* Serialization is required because these devices do not handle
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* well the case of two concurrent reads/writes due to the latency
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* involved. During one read/write another read/write can be issued
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* on another CPU while the previous read/write may still be working
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* on our hardware, if we hit this case the hardware poops in a loop.
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* We prevent this by serializing reads and writes.
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*
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* This issue is not present on PCI-Express devices or pre-AR5416
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* devices (legacy, 802.11abg).
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*/
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if (num_possible_cpus() > 1)
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ah->ah_config.serialize_regmode = SER_REG_MODE_AUTO;
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}
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static struct ath_hal_5416 *ath9k_hw_newstate(u16 devid,
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@ -668,7 +687,8 @@ static struct ath_hal *ath9k_hw_do_attach(u16 devid, struct ath_softc *sc,
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}
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if (ah->ah_config.serialize_regmode == SER_REG_MODE_AUTO) {
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if (ah->ah_macVersion == AR_SREV_VERSION_5416_PCI) {
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if (ah->ah_macVersion == AR_SREV_VERSION_5416_PCI ||
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(AR_SREV_9280(ah) && !ah->ah_isPciExpress)) {
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ah->ah_config.serialize_regmode =
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SER_REG_MODE_ON;
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} else {
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@ -1336,6 +1336,7 @@ static int ath_init(u16 devid, struct ath_softc *sc)
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printk(KERN_ERR "Unable to create debugfs files\n");
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spin_lock_init(&sc->sc_resetlock);
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spin_lock_init(&sc->sc_serial_rw);
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mutex_init(&sc->mutex);
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tasklet_init(&sc->intr_tq, ath9k_tasklet, (unsigned long)sc);
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tasklet_init(&sc->bcon_tasklet, ath9k_beacon_tasklet,
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@ -575,13 +575,17 @@ static int zd_op_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
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r = fill_ctrlset(mac, skb);
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if (r)
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return r;
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goto fail;
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info->rate_driver_data[0] = hw;
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r = zd_usb_tx(&mac->chip.usb, skb);
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if (r)
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return r;
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goto fail;
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return 0;
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fail:
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dev_kfree_skb(skb);
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return 0;
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}
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@ -752,6 +752,8 @@ ieee80211_tx_h_fragment(struct ieee80211_tx_data *tx)
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skb_copy_queue_mapping(frag, first);
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frag->do_not_encrypt = first->do_not_encrypt;
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frag->dev = first->dev;
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frag->iif = first->iif;
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pos += copylen;
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left -= copylen;
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@ -102,3 +102,13 @@ config LIB80211_CRYPT_CCMP
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config LIB80211_CRYPT_TKIP
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tristate
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config LIB80211_DEBUG
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bool "lib80211 debugging messages"
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depends on LIB80211
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default n
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---help---
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You can enable this if you want verbose debugging messages
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from lib80211.
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If unsure, say N.
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@ -337,6 +337,7 @@ static int lib80211_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
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pos += 8;
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if (ccmp_replay_check(pn, key->rx_pn)) {
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#ifdef CONFIG_LIB80211_DEBUG
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if (net_ratelimit()) {
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printk(KERN_DEBUG "CCMP: replay detected: STA=%pM "
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"previous PN %02x%02x%02x%02x%02x%02x "
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@ -346,6 +347,7 @@ static int lib80211_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
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key->rx_pn[3], key->rx_pn[4], key->rx_pn[5],
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pn[0], pn[1], pn[2], pn[3], pn[4], pn[5]);
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}
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#endif
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key->dot11RSNAStatsCCMPReplays++;
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return -4;
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}
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@ -465,12 +465,14 @@ static int lib80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
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pos += 8;
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if (tkip_replay_check(iv32, iv16, tkey->rx_iv32, tkey->rx_iv16)) {
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#ifdef CONFIG_LIB80211_DEBUG
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if (net_ratelimit()) {
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printk(KERN_DEBUG "TKIP: replay detected: STA=%pM"
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" previous TSC %08x%04x received TSC "
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"%08x%04x\n", hdr->addr2,
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tkey->rx_iv32, tkey->rx_iv16, iv32, iv16);
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}
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#endif
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tkey->dot11RSNAStatsTKIPReplays++;
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return -4;
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}
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@ -505,10 +507,12 @@ static int lib80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
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* it needs to be recalculated for the next packet. */
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tkey->rx_phase1_done = 0;
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}
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#ifdef CONFIG_LIB80211_DEBUG
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if (net_ratelimit()) {
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printk(KERN_DEBUG "TKIP: ICV error detected: STA="
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"%pM\n", hdr->addr2);
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}
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#endif
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tkey->dot11RSNAStatsTKIPICVErrors++;
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return -5;
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}
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