sh: pci: drop duplicate PCIC fixups for SE7780 and SH7785LCR.
SE7780 has the same PCIC fixup as SDK7780, and SH7785LCR the same as R7780RP. Switch to using those, and drop the duplicate code. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Paul Mundt
Родитель
3aabce8d3d
Коммит
f1a9ba8f15
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@ -21,6 +21,6 @@ obj-$(CONFIG_SH_SDK7780) += ops-sdk7780.o fixups-sdk7780.o
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obj-$(CONFIG_SH_TITAN) += ops-titan.o
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obj-$(CONFIG_SH_LANDISK) += ops-landisk.o
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obj-$(CONFIG_SH_LBOX_RE2) += ops-lboxre2.o fixups-lboxre2.o
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obj-$(CONFIG_SH_7780_SOLUTION_ENGINE) += ops-se7780.o fixups-se7780.o
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obj-$(CONFIG_SH_7780_SOLUTION_ENGINE) += ops-se7780.o fixups-sdk7780.o
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obj-$(CONFIG_SH_CAYMAN) += ops-cayman.o
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obj-$(CONFIG_SH_SH7785LCR) += ops-sh7785lcr.o fixups-sh7785lcr.o
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obj-$(CONFIG_SH_SH7785LCR) += ops-sh7785lcr.o fixups-r7780rp.o
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@ -1,62 +0,0 @@
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/*
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* arch/sh/drivers/pci/fixups-se7780.c
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*
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* HITACHI UL Solution Engine 7780 PCI fixups
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*
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* Copyright (C) 2003 Lineo uSolutions, Inc.
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* Copyright (C) 2004 - 2006 Paul Mundt
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* Copyright (C) 2006 Nobuhiro Iwamatsu
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/pci.h>
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#include "pci-sh4.h"
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#include <asm/io.h>
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int pci_fixup_pcic(struct pci_channel *chan)
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{
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ctrl_outl(0x00000001, SH7780_PCI_VCR2);
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/* Enable all interrupts, so we know what to fix */
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pci_write_reg(chan, 0x0000C3FF, SH7780_PCIIMR);
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pci_write_reg(chan, 0x0000380F, SH7780_PCIAINTM);
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/* Set up standard PCI config registers */
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ctrl_outw(0xFB00, PCI_REG(SH7780_PCISTATUS));
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ctrl_outw(0x0047, PCI_REG(SH7780_PCICMD));
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ctrl_outb( 0x00, PCI_REG(SH7780_PCIPIF));
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ctrl_outb( 0x00, PCI_REG(SH7780_PCISUB));
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ctrl_outb( 0x06, PCI_REG(SH7780_PCIBCC));
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ctrl_outw(0x1912, PCI_REG(SH7780_PCISVID));
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ctrl_outw(0x0001, PCI_REG(SH7780_PCISID));
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pci_write_reg(chan, 0x08000000, SH7780_PCIMBAR0); /* PCI */
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pci_write_reg(chan, 0x08000000, SH7780_PCILAR0); /* SHwy */
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pci_write_reg(chan, 0x07F00001, SH7780_PCILSR); /* size 128M w/ MBAR */
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pci_write_reg(chan, 0x00000000, SH7780_PCIMBAR1);
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pci_write_reg(chan, 0x00000000, SH7780_PCILAR1);
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pci_write_reg(chan, 0x00000000, SH7780_PCILSR1);
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pci_write_reg(chan, 0xAB000801, SH7780_PCIIBAR);
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/*
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* Set the MBR so PCI address is one-to-one with window,
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* meaning all calls go straight through... use ifdef to
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* catch erroneous assumption.
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*/
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pci_write_reg(chan, 0xFD000000 , SH7780_PCIMBR0);
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pci_write_reg(chan, 0x00FC0000 , SH7780_PCIMBMR0); /* 16M */
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/* Set IOBR for window containing area specified in pci.h */
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pci_write_reg(chan, chan->io_resource->start & ~(SH7780_PCI_IO_SIZE-1),
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SH7780_PCIIOBR);
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pci_write_reg(chan, (SH7780_PCI_IO_SIZE-1) & (7 << 18),
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SH7780_PCIIOBMR);
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pci_write_reg(chan, 0xA5000C01, SH7780_PCICR);
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return 0;
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}
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@ -1,47 +0,0 @@
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/*
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* arch/sh/drivers/pci/fixups-sh7785lcr.c
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*
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* R0P7785LC0011RL PCI fixups
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* Copyright (C) 2008 Yoshihiro Shimoda
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*
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* Based on arch/sh/drivers/pci/fixups-r7780rp.c
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* Copyright (C) 2003 Lineo uSolutions, Inc.
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* Copyright (C) 2004 - 2006 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/pci.h>
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#include "pci-sh4.h"
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int pci_fixup_pcic(struct pci_channel *chan)
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{
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pci_write_reg(chan, 0x000043ff, SH4_PCIINTM);
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pci_write_reg(chan, 0x0000380f, SH4_PCIAINTM);
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pci_write_reg(chan, 0xfbb00047, SH7780_PCICMD);
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pci_write_reg(chan, 0x00000000, SH7780_PCIIBAR);
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pci_write_reg(chan, 0x00011912, SH7780_PCISVID);
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pci_write_reg(chan, 0x08000000, SH7780_PCICSCR0);
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pci_write_reg(chan, 0x0000001b, SH7780_PCICSAR0);
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pci_write_reg(chan, 0xfd000000, SH7780_PCICSCR1);
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pci_write_reg(chan, 0x0000000f, SH7780_PCICSAR1);
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pci_write_reg(chan, 0xfd000000, SH7780_PCIMBR0);
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pci_write_reg(chan, 0x00fc0000, SH7780_PCIMBMR0);
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#ifdef CONFIG_32BIT
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pci_write_reg(chan, 0xc0000000, SH7780_PCIMBR2);
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pci_write_reg(chan, 0x20000000 - SH7780_PCI_IO_SIZE, SH7780_PCIMBMR2);
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#endif
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/* Set IOBR for windows containing area specified in pci.h */
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pci_write_reg(chan, chan->io_resource->start & ~(SH7780_PCI_IO_SIZE - 1),
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SH7780_PCIIOBR);
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pci_write_reg(chan, ((SH7780_PCI_IO_SIZE - 1) & (7 << 18)),
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SH7780_PCIIOBMR);
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return 0;
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}
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