USB: omap_udc: sync with OMAP tree
Sync up USB parts of the omap_udc support in mainline with the OMAP tree. This patch addresses some OMAP2 differences ... there's another, with respect to the double-buffering issue with PIO-IN in omap_ep_setup() (which is now out of sync with the comments), but it's not clear right now how to address that. From: Tony Lindgren <tony@atomide.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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@ -190,7 +190,7 @@ config USB_LH7A40X
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config USB_GADGET_OMAP
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config USB_GADGET_OMAP
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boolean "OMAP USB Device Controller"
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boolean "OMAP USB Device Controller"
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depends on ARCH_OMAP
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depends on ARCH_OMAP
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select ISP1301_OMAP if MACH_OMAP_H2 || MACH_OMAP_H3
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select ISP1301_OMAP if MACH_OMAP_H2 || MACH_OMAP_H3 || MACH_OMAP_H4_OTG
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help
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help
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Many Texas Instruments OMAP processors have flexible full
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Many Texas Instruments OMAP processors have flexible full
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speed USB device controllers, with support for up to 30
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speed USB device controllers, with support for up to 30
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@ -2313,6 +2313,13 @@ static int proc_otg_show(struct seq_file *s)
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tmp = omap_readl(OTG_REV);
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tmp = omap_readl(OTG_REV);
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if (cpu_is_omap24xx()) {
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if (cpu_is_omap24xx()) {
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/*
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* REVISIT: Not clear how this works on OMAP2. trans
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* is ANDed to produce bits 7 and 8, which might make
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* sense for USB_TRANSCEIVER_CTRL on OMAP1,
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* but with CONTROL_DEVCONF, these bits have something to
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* do with the frame adjustment counter and McBSP2.
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*/
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ctrl_name = "control_devconf";
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ctrl_name = "control_devconf";
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trans = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
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trans = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
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} else {
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} else {
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