Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next
Conflicts: net/netfilter/core.c net/netfilter/nf_tables_netdev.c Resolve two conflicts before pull request for David's net-next tree: 1) Betweenc73c248490
("netfilter: nf_tables_netdev: remove redundant ip_hdr assignment") from the net tree and commitddc8b6027a
("netfilter: introduce nft_set_pktinfo_{ipv4, ipv6}_validate()"). 2) Betweene8bffe0cf9
("net: Add _nf_(un)register_hooks symbols") and Aaron Conole's patches to replace list_head with single linked list. Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
This commit is contained in:
Коммит
f20fbc0717
3
.mailmap
3
.mailmap
|
@ -88,6 +88,7 @@ Kay Sievers <kay.sievers@vrfy.org>
|
|||
Kenneth W Chen <kenneth.w.chen@intel.com>
|
||||
Konstantin Khlebnikov <koct9i@gmail.com> <k.khlebnikov@samsung.com>
|
||||
Koushik <raghavendra.koushik@neterion.com>
|
||||
Krzysztof Kozlowski <krzk@kernel.org> <k.kozlowski@samsung.com>
|
||||
Krzysztof Kozlowski <krzk@kernel.org> <k.kozlowski.k@gmail.com>
|
||||
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
|
||||
Leonid I Ananiev <leonid.i.ananiev@intel.com>
|
||||
|
@ -158,6 +159,8 @@ Valdis Kletnieks <Valdis.Kletnieks@vt.edu>
|
|||
Viresh Kumar <vireshk@kernel.org> <viresh.kumar@st.com>
|
||||
Viresh Kumar <vireshk@kernel.org> <viresh.linux@gmail.com>
|
||||
Viresh Kumar <vireshk@kernel.org> <viresh.kumar2@arm.com>
|
||||
Vladimir Davydov <vdavydov.dev@gmail.com> <vdavydov@virtuozzo.com>
|
||||
Vladimir Davydov <vdavydov.dev@gmail.com> <vdavydov@parallels.com>
|
||||
Takashi YOSHII <takashi.yoshii.zj@renesas.com>
|
||||
Yusuke Goda <goda.yusuke@renesas.com>
|
||||
Gustavo Padovan <gustavo@las.ic.unicamp.br>
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
# Note: This documents additional properties of any device beyond what
|
||||
# is documented in Documentation/sysfs-rules.txt
|
||||
|
||||
What: /sys/devices/*/of_path
|
||||
What: /sys/devices/*/of_node
|
||||
Date: February 2015
|
||||
Contact: Device Tree mailing list <devicetree@vger.kernel.org>
|
||||
Description:
|
||||
|
|
|
@ -124,7 +124,6 @@ initialization with a pointer to a structure describing the driver
|
|||
|
||||
The ID table is an array of struct pci_device_id entries ending with an
|
||||
all-zero entry. Definitions with static const are generally preferred.
|
||||
Use of the deprecated macro DEFINE_PCI_DEVICE_TABLE should be avoided.
|
||||
|
||||
Each entry consists of:
|
||||
|
||||
|
|
|
@ -18,13 +18,17 @@ and config2 fields of the perf_event_attr structure. The "events"
|
|||
directory provides configuration templates for all documented
|
||||
events, that can be used with perf tool. For example "xp_valid_flit"
|
||||
is an equivalent of "type=0x8,event=0x4". Other parameters must be
|
||||
explicitly specified. For events originating from device, "node"
|
||||
defines its index. All crosspoint events require "xp" (index),
|
||||
"port" (device port number) and "vc" (virtual channel ID) and
|
||||
"dir" (direction). Watchpoints (special "event" value 0xfe) also
|
||||
require comparator values ("cmp_l" and "cmp_h") and "mask", being
|
||||
index of the comparator mask.
|
||||
explicitly specified.
|
||||
|
||||
For events originating from device, "node" defines its index.
|
||||
|
||||
Crosspoint PMU events require "xp" (index), "bus" (bus number)
|
||||
and "vc" (virtual channel ID).
|
||||
|
||||
Crosspoint watchpoint-based events (special "event" value 0xfe)
|
||||
require "xp" and "vc" as as above plus "port" (device port index),
|
||||
"dir" (transmit/receive direction), comparator values ("cmp_l"
|
||||
and "cmp_h") and "mask", being index of the comparator mask.
|
||||
Masks are defined separately from the event description
|
||||
(due to limited number of the config values) in the "cmp_mask"
|
||||
directory, with first 8 configurable by user and additional
|
||||
|
|
|
@ -103,7 +103,7 @@ Config Main Menu
|
|||
Power management options (ACPI, APM) --->
|
||||
CPU Frequency scaling --->
|
||||
[*] CPU Frequency scaling
|
||||
<*> CPU frequency translation statistics
|
||||
[*] CPU frequency translation statistics
|
||||
[*] CPU frequency translation statistics details
|
||||
|
||||
|
||||
|
|
|
@ -16,6 +16,11 @@ Required properties:
|
|||
- vref-supply: The regulator supply ADC reference voltage.
|
||||
- #io-channel-cells: Should be 1, see ../iio-bindings.txt
|
||||
|
||||
Optional properties:
|
||||
- resets: Must contain an entry for each entry in reset-names if need support
|
||||
this option. See ../reset/reset.txt for details.
|
||||
- reset-names: Must include the name "saradc-apb".
|
||||
|
||||
Example:
|
||||
saradc: saradc@2006c000 {
|
||||
compatible = "rockchip,saradc";
|
||||
|
@ -23,6 +28,8 @@ Example:
|
|||
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
|
||||
clock-names = "saradc", "apb_pclk";
|
||||
resets = <&cru SRST_SARADC>;
|
||||
reset-names = "saradc-apb";
|
||||
#io-channel-cells = <1>;
|
||||
vref-supply = <&vcc18>;
|
||||
};
|
||||
|
|
|
@ -10,7 +10,7 @@ Required properties:
|
|||
subsystem (mmcss) inside the FlashSS (available in STiH407 SoC
|
||||
family).
|
||||
|
||||
- clock-names: Should be "mmc".
|
||||
- clock-names: Should be "mmc" and "icn". (NB: The latter is not compulsory)
|
||||
See: Documentation/devicetree/bindings/resource-names.txt
|
||||
- clocks: Phandle to the clock.
|
||||
See: Documentation/devicetree/bindings/clock/clock-bindings.txt
|
||||
|
|
|
@ -0,0 +1,89 @@
|
|||
* Qualcomm Atheros QCA8xxx switch family
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: should be "qca,qca8337"
|
||||
- #size-cells: must be 0
|
||||
- #address-cells: must be 1
|
||||
|
||||
Subnodes:
|
||||
|
||||
The integrated switch subnode should be specified according to the binding
|
||||
described in dsa/dsa.txt. As the QCA8K switches do not have a N:N mapping of
|
||||
port and PHY id, each subnode describing a port needs to have a valid phandle
|
||||
referencing the internal PHY connected to it. The CPU port of this switch is
|
||||
always port 0.
|
||||
|
||||
Example:
|
||||
|
||||
|
||||
&mdio0 {
|
||||
phy_port1: phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phy_port2: phy@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
|
||||
phy_port3: phy@2 {
|
||||
reg = <2>;
|
||||
};
|
||||
|
||||
phy_port4: phy@3 {
|
||||
reg = <3>;
|
||||
};
|
||||
|
||||
phy_port5: phy@4 {
|
||||
reg = <4>;
|
||||
};
|
||||
|
||||
switch0@0 {
|
||||
compatible = "qca,qca8337";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
reg = <0>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
label = "cpu";
|
||||
ethernet = <&gmac1>;
|
||||
phy-mode = "rgmii";
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
label = "lan1";
|
||||
phy-handle = <&phy_port1>;
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
label = "lan2";
|
||||
phy-handle = <&phy_port2>;
|
||||
};
|
||||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "lan3";
|
||||
phy-handle = <&phy_port3>;
|
||||
};
|
||||
|
||||
port@4 {
|
||||
reg = <4>;
|
||||
label = "lan4";
|
||||
phy-handle = <&phy_port4>;
|
||||
};
|
||||
|
||||
port@5 {
|
||||
reg = <5>;
|
||||
label = "wan";
|
||||
phy-handle = <&phy_port5>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
|
@ -11,8 +11,8 @@ The following properties are common to the Ethernet controllers:
|
|||
the maximum frame size (there's contradiction in ePAPR).
|
||||
- phy-mode: string, operation mode of the PHY interface; supported values are
|
||||
"mii", "gmii", "sgmii", "qsgmii", "tbi", "rev-mii", "rmii", "rgmii", "rgmii-id",
|
||||
"rgmii-rxid", "rgmii-txid", "rtbi", "smii", "xgmii"; this is now a de-facto
|
||||
standard property;
|
||||
"rgmii-rxid", "rgmii-txid", "rtbi", "smii", "xgmii", "trgmii"; this is now a
|
||||
de-facto standard property;
|
||||
- phy-connection-type: the same as "phy-mode" property but described in ePAPR;
|
||||
- phy-handle: phandle, specifies a reference to a node representing a PHY
|
||||
device; this property is described in ePAPR and so preferred;
|
||||
|
|
|
@ -24,14 +24,17 @@ Required properties:
|
|||
Optional properties:
|
||||
- interrupt-parent: Should be the phandle for the interrupt controller
|
||||
that services interrupts for this device
|
||||
|
||||
- mediatek,hwlro: the capability if the hardware supports LRO functions
|
||||
|
||||
* Ethernet MAC node
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be "mediatek,eth-mac"
|
||||
- reg: The number of the MAC
|
||||
- phy-handle: see ethernet.txt file in the same directory.
|
||||
- phy-handle: see ethernet.txt file in the same directory and
|
||||
the phy-mode "trgmii" required being provided when reg
|
||||
is equal to 0 and the MAC uses fixed-link to connect
|
||||
with internal switch such as MT7530.
|
||||
|
||||
Example:
|
||||
|
||||
|
@ -51,6 +54,7 @@ eth: ethernet@1b100000 {
|
|||
reset-names = "eth";
|
||||
mediatek,ethsys = <ðsys>;
|
||||
mediatek,pctl = <&syscfg_pctl_a>;
|
||||
mediatek,hwlro;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
|
|
|
@ -3,9 +3,11 @@
|
|||
Required properties:
|
||||
- compatible : Should be "smsc,lan<model>", "smsc,lan9115"
|
||||
- reg : Address and length of the io space for SMSC LAN
|
||||
- interrupts : Should contain SMSC LAN interrupt line
|
||||
- interrupt-parent : Should be the phandle for the interrupt controller
|
||||
that services interrupts for this device
|
||||
- interrupts : one or two interrupt specifiers
|
||||
- The first interrupt is the SMSC LAN interrupt line
|
||||
- The second interrupt (if present) is the PME (power
|
||||
management event) interrupt that is able to wake up the host
|
||||
system with a 50ms pulse on network activity
|
||||
- phy-mode : See ethernet.txt file in the same directory
|
||||
|
||||
Optional properties:
|
||||
|
@ -21,6 +23,10 @@ Optional properties:
|
|||
external PHY
|
||||
- smsc,save-mac-address : Indicates that mac address needs to be saved
|
||||
before resetting the controller
|
||||
- reset-gpios : a GPIO line connected to the RESET (active low) signal
|
||||
of the device. On many systems this is wired high so the device goes
|
||||
out of reset at power-on, but if it is under program control, this
|
||||
optional GPIO can wake up in response to it.
|
||||
|
||||
Examples:
|
||||
|
||||
|
@ -29,7 +35,8 @@ lan9220@f4000000 {
|
|||
reg = <0xf4000000 0x2000000>;
|
||||
phy-mode = "mii";
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <31>;
|
||||
interrupts = <31>, <32>;
|
||||
reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
|
||||
reg-io-width = <4>;
|
||||
smsc,irq-push-pull;
|
||||
};
|
||||
|
|
|
@ -42,9 +42,6 @@ Optional properties:
|
|||
- auto-flow-control: one way to enable automatic flow control support. The
|
||||
driver is allowed to detect support for the capability even without this
|
||||
property.
|
||||
- {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD
|
||||
line respectively. It will use specified GPIO instead of the peripheral
|
||||
function pin for the UART feature. If unsure, don't specify this property.
|
||||
|
||||
Note:
|
||||
* fsl,ns16550:
|
||||
|
@ -66,19 +63,3 @@ Example:
|
|||
interrupts = <10>;
|
||||
reg-shift = <2>;
|
||||
};
|
||||
|
||||
Example for OMAP UART using GPIO-based modem control signals:
|
||||
|
||||
uart4: serial@49042000 {
|
||||
compatible = "ti,omap3-uart";
|
||||
reg = <0x49042000 0x400>;
|
||||
interrupts = <80>;
|
||||
ti,hwmods = "uart4";
|
||||
clock-frequency = <48000000>;
|
||||
cts-gpios = <&gpio3 5 GPIO_ACTIVE_LOW>;
|
||||
rts-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
|
||||
dtr-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
|
||||
dsr-gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
|
||||
dcd-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
|
||||
rng-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
|
|
@ -183,12 +183,10 @@ The copy_up operation essentially creates a new, identical file and
|
|||
moves it over to the old name. The new file may be on a different
|
||||
filesystem, so both st_dev and st_ino of the file may change.
|
||||
|
||||
Any open files referring to this inode will access the old data and
|
||||
metadata. Similarly any file locks obtained before copy_up will not
|
||||
apply to the copied up file.
|
||||
Any open files referring to this inode will access the old data.
|
||||
|
||||
On a file opened with O_RDONLY fchmod(2), fchown(2), futimesat(2) and
|
||||
fsetxattr(2) will fail with EROFS.
|
||||
Any file locks (and leases) obtained before copy_up will not apply
|
||||
to the copied up file.
|
||||
|
||||
If a file with multiple hard links is copied up, then this will
|
||||
"break" the link. Changes will not be propagated to other names
|
||||
|
|
|
@ -145,6 +145,11 @@ If you want to add slave support to the bus driver:
|
|||
|
||||
* Catch the slave interrupts and send appropriate i2c_slave_events to the backend.
|
||||
|
||||
Note that most hardware supports being master _and_ slave on the same bus. So,
|
||||
if you extend a bus driver, please make sure that the driver supports that as
|
||||
well. In almost all cases, slave support does not need to disable the master
|
||||
functionality.
|
||||
|
||||
Check the i2c-rcar driver as an example.
|
||||
|
||||
|
||||
|
|
|
@ -144,7 +144,7 @@ logical address types are already defined will return with error ``EBUSY``.
|
|||
|
||||
- ``flags``
|
||||
|
||||
- Flags. No flags are defined yet, so set this to 0.
|
||||
- Flags. See :ref:`cec-log-addrs-flags` for a list of available flags.
|
||||
|
||||
- .. row 7
|
||||
|
||||
|
@ -201,6 +201,25 @@ logical address types are already defined will return with error ``EBUSY``.
|
|||
give the CEC framework more information about the device type, even
|
||||
though the framework won't use it directly in the CEC message.
|
||||
|
||||
.. _cec-log-addrs-flags:
|
||||
|
||||
.. flat-table:: Flags for struct cec_log_addrs
|
||||
:header-rows: 0
|
||||
:stub-columns: 0
|
||||
:widths: 3 1 4
|
||||
|
||||
|
||||
- .. _`CEC-LOG-ADDRS-FL-ALLOW-UNREG-FALLBACK`:
|
||||
|
||||
- ``CEC_LOG_ADDRS_FL_ALLOW_UNREG_FALLBACK``
|
||||
|
||||
- 1
|
||||
|
||||
- By default if no logical address of the requested type can be claimed, then
|
||||
it will go back to the unconfigured state. If this flag is set, then it will
|
||||
fallback to the Unregistered logical address. Note that if the Unregistered
|
||||
logical address was explicitly requested, then this flag has no effect.
|
||||
|
||||
.. _cec-versions:
|
||||
|
||||
.. flat-table:: CEC Versions
|
||||
|
|
|
@ -64,7 +64,8 @@ it is guaranteed that the state did change in between the two events.
|
|||
|
||||
- ``phys_addr``
|
||||
|
||||
- The current physical address.
|
||||
- The current physical address. This is ``CEC_PHYS_ADDR_INVALID`` if no
|
||||
valid physical address is set.
|
||||
|
||||
- .. row 2
|
||||
|
||||
|
@ -72,7 +73,10 @@ it is guaranteed that the state did change in between the two events.
|
|||
|
||||
- ``log_addr_mask``
|
||||
|
||||
- The current set of claimed logical addresses.
|
||||
- The current set of claimed logical addresses. This is 0 if no logical
|
||||
addresses are claimed or if ``phys_addr`` is ``CEC_PHYS_ADDR_INVALID``.
|
||||
If bit 15 is set (``1 << CEC_LOG_ADDR_UNREGISTERED``) then this device
|
||||
has the unregistered logical address. In that case all other bits are 0.
|
||||
|
||||
|
||||
|
||||
|
|
|
@ -22,7 +22,7 @@ The driver can be built into the kernel (CONFIG_IPVLAN=y) or as a module
|
|||
There are no module parameters for this driver and it can be configured
|
||||
using IProute2/ip utility.
|
||||
|
||||
ip link add link <master-dev> <slave-dev> type ipvlan mode { l2 | L3 }
|
||||
ip link add link <master-dev> <slave-dev> type ipvlan mode { l2 | l3 | l3s }
|
||||
|
||||
e.g. ip link add link ipvl0 eth0 type ipvlan mode l2
|
||||
|
||||
|
@ -48,6 +48,11 @@ master device for the L2 processing and routing from that instance will be
|
|||
used before packets are queued on the outbound device. In this mode the slaves
|
||||
will not receive nor can send multicast / broadcast traffic.
|
||||
|
||||
4.3 L3S mode:
|
||||
This is very similar to the L3 mode except that iptables (conn-tracking)
|
||||
works in this mode and hence it is L3-symmetric (L3s). This will have slightly less
|
||||
performance but that shouldn't matter since you are choosing this mode over plain-L3
|
||||
mode to make conn-tracking work.
|
||||
|
||||
5. What to choose (macvlan vs. ipvlan)?
|
||||
These two devices are very similar in many regards and the specific use
|
||||
|
|
|
@ -80,6 +80,10 @@ functionality of their platform when planning to use this driver:
|
|||
|
||||
III. Module parameters
|
||||
|
||||
- 'dma_timeout' - DMA transfer completion timeout (in msec, default value 3000).
|
||||
This parameter set a maximum completion wait time for SYNC mode DMA
|
||||
transfer requests and for RIO_WAIT_FOR_ASYNC ioctl requests.
|
||||
|
||||
- 'dbg_level' - This parameter allows to control amount of debug information
|
||||
generated by this device driver. This parameter is formed by set of
|
||||
bit masks that correspond to the specific functional blocks.
|
||||
|
|
59
MAINTAINERS
59
MAINTAINERS
|
@ -807,6 +807,7 @@ M: Laura Abbott <labbott@redhat.com>
|
|||
M: Sumit Semwal <sumit.semwal@linaro.org>
|
||||
L: devel@driverdev.osuosl.org
|
||||
S: Supported
|
||||
F: Documentation/devicetree/bindings/staging/ion/
|
||||
F: drivers/staging/android/ion
|
||||
F: drivers/staging/android/uapi/ion.h
|
||||
F: drivers/staging/android/uapi/ion_test.h
|
||||
|
@ -1632,7 +1633,8 @@ N: rockchip
|
|||
|
||||
ARM/SAMSUNG EXYNOS ARM ARCHITECTURES
|
||||
M: Kukjin Kim <kgene@kernel.org>
|
||||
M: Krzysztof Kozlowski <k.kozlowski@samsung.com>
|
||||
M: Krzysztof Kozlowski <krzk@kernel.org>
|
||||
R: Javier Martinez Canillas <javier@osg.samsung.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
L: linux-samsung-soc@vger.kernel.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
|
@ -1652,7 +1654,6 @@ F: drivers/*/*s3c64xx*
|
|||
F: drivers/*/*s5pv210*
|
||||
F: drivers/memory/samsung/*
|
||||
F: drivers/soc/samsung/*
|
||||
F: drivers/spi/spi-s3c*
|
||||
F: Documentation/arm/Samsung/
|
||||
F: Documentation/devicetree/bindings/arm/samsung/
|
||||
F: Documentation/devicetree/bindings/sram/samsung-sram.txt
|
||||
|
@ -1840,6 +1841,7 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson.git
|
|||
ARM/UNIPHIER ARCHITECTURE
|
||||
M: Masahiro Yamada <yamada.masahiro@socionext.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier.git
|
||||
S: Maintained
|
||||
F: arch/arm/boot/dts/uniphier*
|
||||
F: arch/arm/include/asm/hardware/cache-uniphier.h
|
||||
|
@ -2493,7 +2495,7 @@ F: include/net/bluetooth/
|
|||
BONDING DRIVER
|
||||
M: Jay Vosburgh <j.vosburgh@gmail.com>
|
||||
M: Veaceslav Falico <vfalico@gmail.com>
|
||||
M: Andy Gospodarek <gospo@cumulusnetworks.com>
|
||||
M: Andy Gospodarek <andy@greyhouse.net>
|
||||
L: netdev@vger.kernel.org
|
||||
W: http://sourceforge.net/projects/bonding/
|
||||
S: Supported
|
||||
|
@ -2508,7 +2510,7 @@ S: Supported
|
|||
F: kernel/bpf/
|
||||
|
||||
BROADCOM B44 10/100 ETHERNET DRIVER
|
||||
M: Gary Zambrano <zambrano@broadcom.com>
|
||||
M: Michael Chan <michael.chan@broadcom.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
F: drivers/net/ethernet/broadcom/b44.*
|
||||
|
@ -3256,7 +3258,7 @@ F: kernel/cpuset.c
|
|||
CONTROL GROUP - MEMORY RESOURCE CONTROLLER (MEMCG)
|
||||
M: Johannes Weiner <hannes@cmpxchg.org>
|
||||
M: Michal Hocko <mhocko@kernel.org>
|
||||
M: Vladimir Davydov <vdavydov@virtuozzo.com>
|
||||
M: Vladimir Davydov <vdavydov.dev@gmail.com>
|
||||
L: cgroups@vger.kernel.org
|
||||
L: linux-mm@kvack.org
|
||||
S: Maintained
|
||||
|
@ -3277,7 +3279,7 @@ S: Maintained
|
|||
F: drivers/net/wan/cosa*
|
||||
|
||||
CPMAC ETHERNET DRIVER
|
||||
M: Florian Fainelli <florian@openwrt.org>
|
||||
M: Florian Fainelli <f.fainelli@gmail.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/net/ethernet/ti/cpmac.c
|
||||
|
@ -6110,7 +6112,7 @@ S: Supported
|
|||
F: drivers/cpufreq/intel_pstate.c
|
||||
|
||||
INTEL FRAMEBUFFER DRIVER (excluding 810 and 815)
|
||||
M: Maik Broemme <mbroemme@plusserver.de>
|
||||
M: Maik Broemme <mbroemme@libmpq.org>
|
||||
L: linux-fbdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/fb/intelfb.txt
|
||||
|
@ -7473,7 +7475,8 @@ F: Documentation/devicetree/bindings/sound/max9860.txt
|
|||
F: sound/soc/codecs/max9860.*
|
||||
|
||||
MAXIM MUIC CHARGER DRIVERS FOR EXYNOS BASED BOARDS
|
||||
M: Krzysztof Kozlowski <k.kozlowski@samsung.com>
|
||||
M: Krzysztof Kozlowski <krzk@kernel.org>
|
||||
M: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
|
||||
L: linux-pm@vger.kernel.org
|
||||
S: Supported
|
||||
F: drivers/power/max14577_charger.c
|
||||
|
@ -7489,7 +7492,8 @@ F: include/dt-bindings/*/*max77802.h
|
|||
|
||||
MAXIM PMIC AND MUIC DRIVERS FOR EXYNOS BASED BOARDS
|
||||
M: Chanwoo Choi <cw00.choi@samsung.com>
|
||||
M: Krzysztof Kozlowski <k.kozlowski@samsung.com>
|
||||
M: Krzysztof Kozlowski <krzk@kernel.org>
|
||||
M: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
S: Supported
|
||||
F: drivers/*/max14577*.c
|
||||
|
@ -8166,6 +8170,15 @@ S: Maintained
|
|||
W: https://fedorahosted.org/dropwatch/
|
||||
F: net/core/drop_monitor.c
|
||||
|
||||
NETWORKING [DSA]
|
||||
M: Andrew Lunn <andrew@lunn.ch>
|
||||
M: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
|
||||
M: Florian Fainelli <f.fainelli@gmail.com>
|
||||
S: Maintained
|
||||
F: net/dsa/
|
||||
F: include/net/dsa.h
|
||||
F: drivers/net/dsa/
|
||||
|
||||
NETWORKING [GENERAL]
|
||||
M: "David S. Miller" <davem@davemloft.net>
|
||||
L: netdev@vger.kernel.org
|
||||
|
@ -9255,7 +9268,7 @@ F: drivers/pinctrl/sh-pfc/
|
|||
|
||||
PIN CONTROLLER - SAMSUNG
|
||||
M: Tomasz Figa <tomasz.figa@gmail.com>
|
||||
M: Krzysztof Kozlowski <k.kozlowski@samsung.com>
|
||||
M: Krzysztof Kozlowski <krzk@kernel.org>
|
||||
M: Sylwester Nawrocki <s.nawrocki@samsung.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
L: linux-samsung-soc@vger.kernel.org (moderated for non-subscribers)
|
||||
|
@ -10195,7 +10208,7 @@ S: Maintained
|
|||
F: drivers/platform/x86/samsung-laptop.c
|
||||
|
||||
SAMSUNG AUDIO (ASoC) DRIVERS
|
||||
M: Krzysztof Kozlowski <k.kozlowski@samsung.com>
|
||||
M: Krzysztof Kozlowski <krzk@kernel.org>
|
||||
M: Sangbeom Kim <sbkim73@samsung.com>
|
||||
M: Sylwester Nawrocki <s.nawrocki@samsung.com>
|
||||
L: alsa-devel@alsa-project.org (moderated for non-subscribers)
|
||||
|
@ -10210,7 +10223,8 @@ F: drivers/video/fbdev/s3c-fb.c
|
|||
|
||||
SAMSUNG MULTIFUNCTION PMIC DEVICE DRIVERS
|
||||
M: Sangbeom Kim <sbkim73@samsung.com>
|
||||
M: Krzysztof Kozlowski <k.kozlowski@samsung.com>
|
||||
M: Krzysztof Kozlowski <krzk@kernel.org>
|
||||
M: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
L: linux-samsung-soc@vger.kernel.org
|
||||
S: Supported
|
||||
|
@ -10269,6 +10283,17 @@ S: Supported
|
|||
L: linux-samsung-soc@vger.kernel.org (moderated for non-subscribers)
|
||||
F: drivers/clk/samsung/
|
||||
|
||||
SAMSUNG SPI DRIVERS
|
||||
M: Kukjin Kim <kgene@kernel.org>
|
||||
M: Krzysztof Kozlowski <krzk@kernel.org>
|
||||
M: Andi Shyti <andi.shyti@samsung.com>
|
||||
L: linux-spi@vger.kernel.org
|
||||
L: linux-samsung-soc@vger.kernel.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/spi/spi-samsung.txt
|
||||
F: drivers/spi/spi-s3c*
|
||||
F: include/linux/platform_data/spi-s3c64xx.h
|
||||
|
||||
SAMSUNG SXGBE DRIVERS
|
||||
M: Byungho An <bh74.an@samsung.com>
|
||||
M: Girish K S <ks.giri@samsung.com>
|
||||
|
@ -11248,12 +11273,8 @@ S: Odd Fixes
|
|||
F: drivers/staging/vt665?/
|
||||
|
||||
STAGING - WILC1000 WIFI DRIVER
|
||||
M: Johnny Kim <johnny.kim@atmel.com>
|
||||
M: Austin Shin <austin.shin@atmel.com>
|
||||
M: Chris Park <chris.park@atmel.com>
|
||||
M: Tony Cho <tony.cho@atmel.com>
|
||||
M: Glen Lee <glen.lee@atmel.com>
|
||||
M: Leo Kim <leo.kim@atmel.com>
|
||||
M: Aditya Shankar <aditya.shankar@microchip.com>
|
||||
M: Ganesh Krishna <ganesh.krishna@microchip.com>
|
||||
L: linux-wireless@vger.kernel.org
|
||||
S: Supported
|
||||
F: drivers/staging/wilc1000/
|
||||
|
@ -12574,7 +12595,7 @@ F: include/linux/if_*vlan.h
|
|||
F: net/8021q/
|
||||
|
||||
VLYNQ BUS
|
||||
M: Florian Fainelli <florian@openwrt.org>
|
||||
M: Florian Fainelli <f.fainelli@gmail.com>
|
||||
L: openwrt-devel@lists.openwrt.org (subscribers-only)
|
||||
S: Maintained
|
||||
F: drivers/vlynq/vlynq.c
|
||||
|
|
2
Makefile
2
Makefile
|
@ -1,7 +1,7 @@
|
|||
VERSION = 4
|
||||
PATCHLEVEL = 8
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc4
|
||||
EXTRAVERSION = -rc7
|
||||
NAME = Psychotic Stoned Sheep
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
11
arch/Kconfig
11
arch/Kconfig
|
@ -336,17 +336,6 @@ config HAVE_ARCH_SECCOMP_FILTER
|
|||
results in the system call being skipped immediately.
|
||||
- seccomp syscall wired up
|
||||
|
||||
For best performance, an arch should use seccomp_phase1 and
|
||||
seccomp_phase2 directly. It should call seccomp_phase1 for all
|
||||
syscalls if TIF_SECCOMP is set, but seccomp_phase1 does not
|
||||
need to be called from a ptrace-safe context. It must then
|
||||
call seccomp_phase2 if seccomp_phase1 returns anything other
|
||||
than SECCOMP_PHASE1_OK or SECCOMP_PHASE1_SKIP.
|
||||
|
||||
As an additional optimization, an arch may provide seccomp_data
|
||||
directly to seccomp_phase1; this avoids multiple calls
|
||||
to the syscall_xyz helpers for every syscall.
|
||||
|
||||
config SECCOMP_FILTER
|
||||
def_bool y
|
||||
depends on HAVE_ARCH_SECCOMP_FILTER && SECCOMP && NET
|
||||
|
|
|
@ -371,14 +371,6 @@ __copy_tofrom_user_nocheck(void *to, const void *from, long len)
|
|||
return __cu_len;
|
||||
}
|
||||
|
||||
extern inline long
|
||||
__copy_tofrom_user(void *to, const void *from, long len, const void __user *validate)
|
||||
{
|
||||
if (__access_ok((unsigned long)validate, len, get_fs()))
|
||||
len = __copy_tofrom_user_nocheck(to, from, len);
|
||||
return len;
|
||||
}
|
||||
|
||||
#define __copy_to_user(to, from, n) \
|
||||
({ \
|
||||
__chk_user_ptr(to); \
|
||||
|
@ -393,17 +385,22 @@ __copy_tofrom_user(void *to, const void *from, long len, const void __user *vali
|
|||
#define __copy_to_user_inatomic __copy_to_user
|
||||
#define __copy_from_user_inatomic __copy_from_user
|
||||
|
||||
|
||||
extern inline long
|
||||
copy_to_user(void __user *to, const void *from, long n)
|
||||
{
|
||||
return __copy_tofrom_user((__force void *)to, from, n, to);
|
||||
if (likely(__access_ok((unsigned long)to, n, get_fs())))
|
||||
n = __copy_tofrom_user_nocheck((__force void *)to, from, n);
|
||||
return n;
|
||||
}
|
||||
|
||||
extern inline long
|
||||
copy_from_user(void *to, const void __user *from, long n)
|
||||
{
|
||||
return __copy_tofrom_user(to, (__force void *)from, n, from);
|
||||
if (likely(__access_ok((unsigned long)from, n, get_fs())))
|
||||
n = __copy_tofrom_user_nocheck(to, (__force void *)from, n);
|
||||
else
|
||||
memset(to, 0, n);
|
||||
return n;
|
||||
}
|
||||
|
||||
extern void __do_clear_user(void);
|
||||
|
|
|
@ -83,7 +83,10 @@
|
|||
"2: ;nop\n" \
|
||||
" .section .fixup, \"ax\"\n" \
|
||||
" .align 4\n" \
|
||||
"3: mov %0, %3\n" \
|
||||
"3: # return -EFAULT\n" \
|
||||
" mov %0, %3\n" \
|
||||
" # zero out dst ptr\n" \
|
||||
" mov %1, 0\n" \
|
||||
" j 2b\n" \
|
||||
" .previous\n" \
|
||||
" .section __ex_table, \"a\"\n" \
|
||||
|
@ -101,7 +104,11 @@
|
|||
"2: ;nop\n" \
|
||||
" .section .fixup, \"ax\"\n" \
|
||||
" .align 4\n" \
|
||||
"3: mov %0, %3\n" \
|
||||
"3: # return -EFAULT\n" \
|
||||
" mov %0, %3\n" \
|
||||
" # zero out dst ptr\n" \
|
||||
" mov %1, 0\n" \
|
||||
" mov %R1, 0\n" \
|
||||
" j 2b\n" \
|
||||
" .previous\n" \
|
||||
" .section __ex_table, \"a\"\n" \
|
||||
|
|
|
@ -226,7 +226,7 @@
|
|||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
elm_id = <&elm>;
|
||||
ti,elm-id = <&elm>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
@ -161,7 +161,7 @@
|
|||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
elm_id = <&elm>;
|
||||
ti,elm-id = <&elm>;
|
||||
|
||||
/* MTD partition table */
|
||||
partition@0 {
|
||||
|
|
|
@ -197,7 +197,7 @@
|
|||
gpmc,wr-access-ns = <30>;
|
||||
gpmc,wr-data-mux-bus-ns = <0>;
|
||||
|
||||
elm_id = <&elm>;
|
||||
ti,elm-id = <&elm>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
|
|
@ -390,12 +390,12 @@
|
|||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
label = "lan1";
|
||||
label = "lan5";
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
label = "lan2";
|
||||
label = "lan4";
|
||||
};
|
||||
|
||||
port@2 {
|
||||
|
@ -405,12 +405,12 @@
|
|||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "lan4";
|
||||
label = "lan2";
|
||||
};
|
||||
|
||||
port@4 {
|
||||
reg = <4>;
|
||||
label = "lan5";
|
||||
label = "lan1";
|
||||
};
|
||||
|
||||
port@5 {
|
||||
|
|
|
@ -2,6 +2,7 @@
|
|||
|
||||
/ {
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0 0x10000000>;
|
||||
};
|
||||
|
||||
|
|
|
@ -2,7 +2,6 @@
|
|||
#include <dt-bindings/clock/bcm2835.h>
|
||||
#include <dt-bindings/clock/bcm2835-aux.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include "skeleton.dtsi"
|
||||
|
||||
/* This include file covers the common peripherals and configuration between
|
||||
* bcm2835 and bcm2836 implementations, leaving the CPU configuration to
|
||||
|
@ -13,6 +12,8 @@
|
|||
compatible = "brcm,bcm2835";
|
||||
model = "BCM2835";
|
||||
interrupt-parent = <&intc>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
chosen {
|
||||
bootargs = "earlyprintk console=ttyAMA0";
|
||||
|
|
|
@ -447,14 +447,11 @@
|
|||
samsung,dw-mshc-ciu-div = <3>;
|
||||
samsung,dw-mshc-sdr-timing = <0 4>;
|
||||
samsung,dw-mshc-ddr-timing = <0 2>;
|
||||
samsung,dw-mshc-hs400-timing = <0 2>;
|
||||
samsung,read-strobe-delay = <90>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8 &sd0_cd>;
|
||||
bus-width = <8>;
|
||||
cap-mmc-highspeed;
|
||||
mmc-hs200-1_8v;
|
||||
mmc-hs400-1_8v;
|
||||
vmmc-supply = <&ldo20_reg>;
|
||||
vqmmc-supply = <&ldo11_reg>;
|
||||
};
|
||||
|
|
|
@ -243,7 +243,7 @@
|
|||
clocks = <&clks IMX6QDL_CLK_SPDIF_GCLK>, <&clks IMX6QDL_CLK_OSC>,
|
||||
<&clks IMX6QDL_CLK_SPDIF>, <&clks IMX6QDL_CLK_ASRC>,
|
||||
<&clks IMX6QDL_CLK_DUMMY>, <&clks IMX6QDL_CLK_ESAI_EXTAL>,
|
||||
<&clks IMX6QDL_CLK_IPG>, <&clks IMX6QDL_CLK_MLB>,
|
||||
<&clks IMX6QDL_CLK_IPG>, <&clks IMX6QDL_CLK_DUMMY>,
|
||||
<&clks IMX6QDL_CLK_DUMMY>, <&clks IMX6QDL_CLK_SPBA>;
|
||||
clock-names = "core", "rxtx0",
|
||||
"rxtx1", "rxtx2",
|
||||
|
|
|
@ -64,7 +64,7 @@
|
|||
cd-gpios = <&gpio7 11 GPIO_ACTIVE_LOW>;
|
||||
no-1-8-v;
|
||||
keep-power-in-suspend;
|
||||
enable-sdio-wakup;
|
||||
wakeup-source;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
@ -131,7 +131,7 @@
|
|||
ti,y-min = /bits/ 16 <0>;
|
||||
ti,y-max = /bits/ 16 <0>;
|
||||
ti,pressure-max = /bits/ 16 <0>;
|
||||
ti,x-plat-ohms = /bits/ 16 <400>;
|
||||
ti,x-plate-ohms = /bits/ 16 <400>;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
|
|
@ -113,7 +113,7 @@
|
|||
|
||||
partition@e0000 {
|
||||
label = "u-boot environment";
|
||||
reg = <0xe0000 0x100000>;
|
||||
reg = <0xe0000 0x20000>;
|
||||
};
|
||||
|
||||
partition@100000 {
|
||||
|
|
|
@ -116,6 +116,10 @@
|
|||
};
|
||||
};
|
||||
|
||||
&pciec {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -35,10 +35,15 @@
|
|||
ranges = <0 0 0x00000000 0x1000000>; /* CS0: 16MB for NAND */
|
||||
|
||||
nand@0,0 {
|
||||
linux,mtd-name = "micron,mt29f4g16abbda3w";
|
||||
compatible = "ti,omap2-nand";
|
||||
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
|
||||
interrupt-parent = <&gpmc>;
|
||||
interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
|
||||
<1 IRQ_TYPE_NONE>; /* termcount */
|
||||
linux,mtd-name = "micron,mt29f4g16abbda3w";
|
||||
nand-bus-width = <16>;
|
||||
ti,nand-ecc-opt = "bch8";
|
||||
rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
|
||||
gpmc,sync-clk-ps = <0>;
|
||||
gpmc,cs-on-ns = <0>;
|
||||
gpmc,cs-rd-off-ns = <44>;
|
||||
|
@ -54,10 +59,6 @@
|
|||
gpmc,wr-access-ns = <40>;
|
||||
gpmc,wr-data-mux-bus-ns = <0>;
|
||||
gpmc,device-width = <2>;
|
||||
|
||||
gpmc,page-burst-access-ns = <5>;
|
||||
gpmc,cycle2cycle-delay-ns = <50>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
|
|
|
@ -46,6 +46,7 @@
|
|||
linux,mtd-name = "micron,mt29f4g16abbda3w";
|
||||
nand-bus-width = <16>;
|
||||
ti,nand-ecc-opt = "bch8";
|
||||
rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
|
||||
gpmc,sync-clk-ps = <0>;
|
||||
gpmc,cs-on-ns = <0>;
|
||||
gpmc,cs-rd-off-ns = <44>;
|
||||
|
|
|
@ -223,7 +223,9 @@
|
|||
};
|
||||
|
||||
&gpmc {
|
||||
ranges = <0 0 0x00000000 0x20000000>;
|
||||
ranges = <0 0 0x30000000 0x1000000>, /* CS0 */
|
||||
<4 0 0x2b000000 0x1000000>, /* CS4 */
|
||||
<5 0 0x2c000000 0x1000000>; /* CS5 */
|
||||
|
||||
nand@0,0 {
|
||||
compatible = "ti,omap2-nand";
|
||||
|
|
|
@ -55,8 +55,6 @@
|
|||
#include "omap-gpmc-smsc9221.dtsi"
|
||||
|
||||
&gpmc {
|
||||
ranges = <5 0 0x2c000000 0x1000000>; /* CS5 */
|
||||
|
||||
ethernet@gpmc {
|
||||
reg = <5 0 0xff>;
|
||||
interrupt-parent = <&gpio6>;
|
||||
|
|
|
@ -27,8 +27,6 @@
|
|||
#include "omap-gpmc-smsc9221.dtsi"
|
||||
|
||||
&gpmc {
|
||||
ranges = <5 0 0x2c000000 0x1000000>; /* CS5 */
|
||||
|
||||
ethernet@gpmc {
|
||||
reg = <5 0 0xff>;
|
||||
interrupt-parent = <&gpio6>;
|
||||
|
|
|
@ -15,9 +15,6 @@
|
|||
#include "omap-gpmc-smsc9221.dtsi"
|
||||
|
||||
&gpmc {
|
||||
ranges = <4 0 0x2b000000 0x1000000>, /* CS4 */
|
||||
<5 0 0x2c000000 0x1000000>; /* CS5 */
|
||||
|
||||
smsc1: ethernet@gpmc {
|
||||
reg = <5 0 0xff>;
|
||||
interrupt-parent = <&gpio6>;
|
||||
|
|
|
@ -197,6 +197,8 @@
|
|||
clock-names = "saradc", "apb_pclk";
|
||||
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#io-channel-cells = <1>;
|
||||
resets = <&cru SRST_SARADC>;
|
||||
reset-names = "saradc-apb";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
|
@ -279,6 +279,8 @@
|
|||
#io-channel-cells = <1>;
|
||||
clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
|
||||
clock-names = "saradc", "apb_pclk";
|
||||
resets = <&cru SRST_SARADC>;
|
||||
reset-names = "saradc-apb";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
|
@ -399,6 +399,8 @@
|
|||
#io-channel-cells = <1>;
|
||||
clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
|
||||
clock-names = "saradc", "apb_pclk";
|
||||
resets = <&cru SRST_SARADC>;
|
||||
reset-names = "saradc-apb";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
|
@ -550,8 +550,9 @@
|
|||
interrupt-names = "mmcirq";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_mmc0>;
|
||||
clock-names = "mmc";
|
||||
clocks = <&clk_s_c0_flexgen CLK_MMC_0>;
|
||||
clock-names = "mmc", "icn";
|
||||
clocks = <&clk_s_c0_flexgen CLK_MMC_0>,
|
||||
<&clk_s_c0_flexgen CLK_RX_ICN_HVA>;
|
||||
bus-width = <8>;
|
||||
non-removable;
|
||||
};
|
||||
|
@ -565,8 +566,9 @@
|
|||
interrupt-names = "mmcirq";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_sd1>;
|
||||
clock-names = "mmc";
|
||||
clocks = <&clk_s_c0_flexgen CLK_MMC_1>;
|
||||
clock-names = "mmc", "icn";
|
||||
clocks = <&clk_s_c0_flexgen CLK_MMC_1>,
|
||||
<&clk_s_c0_flexgen CLK_RX_ICN_HVA>;
|
||||
resets = <&softreset STIH407_MMC1_SOFTRESET>;
|
||||
bus-width = <4>;
|
||||
};
|
||||
|
|
|
@ -41,7 +41,8 @@
|
|||
compatible = "st,st-ohci-300x";
|
||||
reg = <0x9a03c00 0x100>;
|
||||
interrupts = <GIC_SPI 180 IRQ_TYPE_NONE>;
|
||||
clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>;
|
||||
clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>,
|
||||
<&clk_s_c0_flexgen CLK_RX_ICN_DISP_0>;
|
||||
resets = <&powerdown STIH407_USB2_PORT0_POWERDOWN>,
|
||||
<&softreset STIH407_USB2_PORT0_SOFTRESET>;
|
||||
reset-names = "power", "softreset";
|
||||
|
@ -57,7 +58,8 @@
|
|||
interrupts = <GIC_SPI 151 IRQ_TYPE_NONE>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usb0>;
|
||||
clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>;
|
||||
clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>,
|
||||
<&clk_s_c0_flexgen CLK_RX_ICN_DISP_0>;
|
||||
resets = <&powerdown STIH407_USB2_PORT0_POWERDOWN>,
|
||||
<&softreset STIH407_USB2_PORT0_SOFTRESET>;
|
||||
reset-names = "power", "softreset";
|
||||
|
@ -71,7 +73,8 @@
|
|||
compatible = "st,st-ohci-300x";
|
||||
reg = <0x9a83c00 0x100>;
|
||||
interrupts = <GIC_SPI 181 IRQ_TYPE_NONE>;
|
||||
clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>;
|
||||
clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>,
|
||||
<&clk_s_c0_flexgen CLK_RX_ICN_DISP_0>;
|
||||
resets = <&powerdown STIH407_USB2_PORT1_POWERDOWN>,
|
||||
<&softreset STIH407_USB2_PORT1_SOFTRESET>;
|
||||
reset-names = "power", "softreset";
|
||||
|
@ -87,7 +90,8 @@
|
|||
interrupts = <GIC_SPI 153 IRQ_TYPE_NONE>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usb1>;
|
||||
clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>;
|
||||
clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>,
|
||||
<&clk_s_c0_flexgen CLK_RX_ICN_DISP_0>;
|
||||
resets = <&powerdown STIH407_USB2_PORT1_POWERDOWN>,
|
||||
<&softreset STIH407_USB2_PORT1_SOFTRESET>;
|
||||
reset-names = "power", "softreset";
|
||||
|
|
|
@ -84,7 +84,7 @@
|
|||
trips {
|
||||
cpu_alert0: cpu_alert0 {
|
||||
/* milliCelsius */
|
||||
temperature = <850000>;
|
||||
temperature = <85000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
|
|
@ -897,7 +897,7 @@
|
|||
palmas: tps65913@58 {
|
||||
compatible = "ti,palmas";
|
||||
reg = <0x58>;
|
||||
interrupts = <0 86 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
|
|
|
@ -802,7 +802,7 @@
|
|||
palmas: pmic@58 {
|
||||
compatible = "ti,palmas";
|
||||
reg = <0x58>;
|
||||
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
|
|
|
@ -63,7 +63,7 @@
|
|||
palmas: pmic@58 {
|
||||
compatible = "ti,palmas";
|
||||
reg = <0x58>;
|
||||
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
|
|
|
@ -1382,7 +1382,7 @@
|
|||
* Pin 41: BR_UART1_TXD
|
||||
* Pin 44: BR_UART1_RXD
|
||||
*/
|
||||
serial@0,70006000 {
|
||||
serial@70006000 {
|
||||
compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
|
||||
status = "okay";
|
||||
};
|
||||
|
@ -1394,7 +1394,7 @@
|
|||
* Pin 71: UART2_CTS_L
|
||||
* Pin 74: UART2_RTS_L
|
||||
*/
|
||||
serial@0,70006040 {
|
||||
serial@70006040 {
|
||||
compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -140,7 +140,7 @@ static struct locomo_dev_info locomo_devices[] = {
|
|||
|
||||
static void locomo_handler(struct irq_desc *desc)
|
||||
{
|
||||
struct locomo *lchip = irq_desc_get_chip_data(desc);
|
||||
struct locomo *lchip = irq_desc_get_handler_data(desc);
|
||||
int req, i;
|
||||
|
||||
/* Acknowledge the parent IRQ */
|
||||
|
@ -200,8 +200,7 @@ static void locomo_setup_irq(struct locomo *lchip)
|
|||
* Install handler for IRQ_LOCOMO_HW.
|
||||
*/
|
||||
irq_set_irq_type(lchip->irq, IRQ_TYPE_EDGE_FALLING);
|
||||
irq_set_chip_data(lchip->irq, lchip);
|
||||
irq_set_chained_handler(lchip->irq, locomo_handler);
|
||||
irq_set_chained_handler_and_data(lchip->irq, locomo_handler, lchip);
|
||||
|
||||
/* Install handlers for IRQ_LOCOMO_* */
|
||||
for ( ; irq <= lchip->irq_base + 3; irq++) {
|
||||
|
|
|
@ -472,8 +472,8 @@ static int sa1111_setup_irq(struct sa1111 *sachip, unsigned irq_base)
|
|||
* specifies that S0ReadyInt and S1ReadyInt should be '1'.
|
||||
*/
|
||||
sa1111_writel(0, irqbase + SA1111_INTPOL0);
|
||||
sa1111_writel(SA1111_IRQMASK_HI(IRQ_S0_READY_NINT) |
|
||||
SA1111_IRQMASK_HI(IRQ_S1_READY_NINT),
|
||||
sa1111_writel(BIT(IRQ_S0_READY_NINT & 31) |
|
||||
BIT(IRQ_S1_READY_NINT & 31),
|
||||
irqbase + SA1111_INTPOL1);
|
||||
|
||||
/* clear all IRQs */
|
||||
|
@ -754,7 +754,7 @@ static int __sa1111_probe(struct device *me, struct resource *mem, int irq)
|
|||
if (sachip->irq != NO_IRQ) {
|
||||
ret = sa1111_setup_irq(sachip, pd->irq_base);
|
||||
if (ret)
|
||||
goto err_unmap;
|
||||
goto err_clk;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_ARCH_SA1100
|
||||
|
@ -799,6 +799,8 @@ static int __sa1111_probe(struct device *me, struct resource *mem, int irq)
|
|||
|
||||
return 0;
|
||||
|
||||
err_clk:
|
||||
clk_disable(sachip->clk);
|
||||
err_unmap:
|
||||
iounmap(sachip->base);
|
||||
err_clk_unprep:
|
||||
|
@ -869,9 +871,9 @@ struct sa1111_save_data {
|
|||
|
||||
#ifdef CONFIG_PM
|
||||
|
||||
static int sa1111_suspend(struct platform_device *dev, pm_message_t state)
|
||||
static int sa1111_suspend_noirq(struct device *dev)
|
||||
{
|
||||
struct sa1111 *sachip = platform_get_drvdata(dev);
|
||||
struct sa1111 *sachip = dev_get_drvdata(dev);
|
||||
struct sa1111_save_data *save;
|
||||
unsigned long flags;
|
||||
unsigned int val;
|
||||
|
@ -934,9 +936,9 @@ static int sa1111_suspend(struct platform_device *dev, pm_message_t state)
|
|||
* restored by their respective drivers, and must be called
|
||||
* via LDM after this function.
|
||||
*/
|
||||
static int sa1111_resume(struct platform_device *dev)
|
||||
static int sa1111_resume_noirq(struct device *dev)
|
||||
{
|
||||
struct sa1111 *sachip = platform_get_drvdata(dev);
|
||||
struct sa1111 *sachip = dev_get_drvdata(dev);
|
||||
struct sa1111_save_data *save;
|
||||
unsigned long flags, id;
|
||||
void __iomem *base;
|
||||
|
@ -952,7 +954,7 @@ static int sa1111_resume(struct platform_device *dev)
|
|||
id = sa1111_readl(sachip->base + SA1111_SKID);
|
||||
if ((id & SKID_ID_MASK) != SKID_SA1111_ID) {
|
||||
__sa1111_remove(sachip);
|
||||
platform_set_drvdata(dev, NULL);
|
||||
dev_set_drvdata(dev, NULL);
|
||||
kfree(save);
|
||||
return 0;
|
||||
}
|
||||
|
@ -1003,8 +1005,8 @@ static int sa1111_resume(struct platform_device *dev)
|
|||
}
|
||||
|
||||
#else
|
||||
#define sa1111_suspend NULL
|
||||
#define sa1111_resume NULL
|
||||
#define sa1111_suspend_noirq NULL
|
||||
#define sa1111_resume_noirq NULL
|
||||
#endif
|
||||
|
||||
static int sa1111_probe(struct platform_device *pdev)
|
||||
|
@ -1017,7 +1019,7 @@ static int sa1111_probe(struct platform_device *pdev)
|
|||
return -EINVAL;
|
||||
irq = platform_get_irq(pdev, 0);
|
||||
if (irq < 0)
|
||||
return -ENXIO;
|
||||
return irq;
|
||||
|
||||
return __sa1111_probe(&pdev->dev, mem, irq);
|
||||
}
|
||||
|
@ -1038,6 +1040,11 @@ static int sa1111_remove(struct platform_device *pdev)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static struct dev_pm_ops sa1111_pm_ops = {
|
||||
.suspend_noirq = sa1111_suspend_noirq,
|
||||
.resume_noirq = sa1111_resume_noirq,
|
||||
};
|
||||
|
||||
/*
|
||||
* Not sure if this should be on the system bus or not yet.
|
||||
* We really want some way to register a system device at
|
||||
|
@ -1050,10 +1057,9 @@ static int sa1111_remove(struct platform_device *pdev)
|
|||
static struct platform_driver sa1111_device_driver = {
|
||||
.probe = sa1111_probe,
|
||||
.remove = sa1111_remove,
|
||||
.suspend = sa1111_suspend,
|
||||
.resume = sa1111_resume,
|
||||
.driver = {
|
||||
.name = "sa1111",
|
||||
.pm = &sa1111_pm_ops,
|
||||
},
|
||||
};
|
||||
|
||||
|
|
|
@ -161,6 +161,7 @@ CONFIG_USB_MON=y
|
|||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_USB_DWC3=y
|
||||
CONFIG_NOP_USB_XCEIV=y
|
||||
CONFIG_KEYSTONE_USB_PHY=y
|
||||
CONFIG_NEW_LEDS=y
|
||||
CONFIG_LEDS_CLASS=y
|
||||
|
|
|
@ -781,7 +781,7 @@ CONFIG_MXS_DMA=y
|
|||
CONFIG_DMA_BCM2835=y
|
||||
CONFIG_DMA_OMAP=y
|
||||
CONFIG_QCOM_BAM_DMA=y
|
||||
CONFIG_XILINX_VDMA=y
|
||||
CONFIG_XILINX_DMA=y
|
||||
CONFIG_DMA_SUN6I=y
|
||||
CONFIG_STAGING=y
|
||||
CONFIG_SENSORS_ISL29018=y
|
||||
|
|
|
@ -284,7 +284,7 @@ static int ctr_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
|
|||
err = blkcipher_walk_done(desc, &walk,
|
||||
walk.nbytes % AES_BLOCK_SIZE);
|
||||
}
|
||||
if (nbytes) {
|
||||
if (walk.nbytes % AES_BLOCK_SIZE) {
|
||||
u8 *tdst = walk.dst.virt.addr + blocks * AES_BLOCK_SIZE;
|
||||
u8 *tsrc = walk.src.virt.addr + blocks * AES_BLOCK_SIZE;
|
||||
u8 __aligned(8) tail[AES_BLOCK_SIZE];
|
||||
|
|
|
@ -47,6 +47,7 @@
|
|||
#define PMD_SECT_WB (PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE)
|
||||
#define PMD_SECT_MINICACHE (PMD_SECT_TEX(1) | PMD_SECT_CACHEABLE)
|
||||
#define PMD_SECT_WBWA (PMD_SECT_TEX(1) | PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE)
|
||||
#define PMD_SECT_CACHE_MASK (PMD_SECT_TEX(1) | PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE)
|
||||
#define PMD_SECT_NONSHARED_DEV (PMD_SECT_TEX(2))
|
||||
|
||||
/*
|
||||
|
|
|
@ -62,6 +62,7 @@
|
|||
#define PMD_SECT_WT (_AT(pmdval_t, 2) << 2) /* normal inner write-through */
|
||||
#define PMD_SECT_WB (_AT(pmdval_t, 3) << 2) /* normal inner write-back */
|
||||
#define PMD_SECT_WBWA (_AT(pmdval_t, 7) << 2) /* normal inner write-alloc */
|
||||
#define PMD_SECT_CACHE_MASK (_AT(pmdval_t, 7) << 2)
|
||||
|
||||
/*
|
||||
* + Level 3 descriptor (PTE)
|
||||
|
|
|
@ -142,6 +142,19 @@ ARM_BE8(orr r7, r7, #(1 << 25)) @ HSCTLR.EE
|
|||
and r7, #0x1f @ Preserve HPMN
|
||||
mcr p15, 4, r7, c1, c1, 1 @ HDCR
|
||||
|
||||
@ Make sure NS-SVC is initialised appropriately
|
||||
mrc p15, 0, r7, c1, c0, 0 @ SCTLR
|
||||
orr r7, #(1 << 5) @ CP15 barriers enabled
|
||||
bic r7, #(3 << 7) @ Clear SED/ITD for v8 (RES0 for v7)
|
||||
bic r7, #(3 << 19) @ WXN and UWXN disabled
|
||||
mcr p15, 0, r7, c1, c0, 0 @ SCTLR
|
||||
|
||||
mrc p15, 0, r7, c0, c0, 0 @ MIDR
|
||||
mcr p15, 4, r7, c0, c0, 0 @ VPIDR
|
||||
|
||||
mrc p15, 0, r7, c0, c0, 5 @ MPIDR
|
||||
mcr p15, 4, r7, c0, c0, 5 @ VMPIDR
|
||||
|
||||
#if !defined(ZIMAGE) && defined(CONFIG_ARM_ARCH_TIMER)
|
||||
@ make CNTP_* and CNTPCT accessible from PL1
|
||||
mrc p15, 0, r7, c0, c1, 1 @ ID_PFR1
|
||||
|
|
|
@ -158,8 +158,6 @@ void kvm_arch_destroy_vm(struct kvm *kvm)
|
|||
{
|
||||
int i;
|
||||
|
||||
kvm_free_stage2_pgd(kvm);
|
||||
|
||||
for (i = 0; i < KVM_MAX_VCPUS; ++i) {
|
||||
if (kvm->vcpus[i]) {
|
||||
kvm_arch_vcpu_free(kvm->vcpus[i]);
|
||||
|
|
|
@ -1714,7 +1714,8 @@ int kvm_mmu_init(void)
|
|||
kern_hyp_va(PAGE_OFFSET), kern_hyp_va(~0UL));
|
||||
|
||||
if (hyp_idmap_start >= kern_hyp_va(PAGE_OFFSET) &&
|
||||
hyp_idmap_start < kern_hyp_va(~0UL)) {
|
||||
hyp_idmap_start < kern_hyp_va(~0UL) &&
|
||||
hyp_idmap_start != (unsigned long)__hyp_idmap_text_start) {
|
||||
/*
|
||||
* The idmap page is intersecting with the VA space,
|
||||
* it is not safe to continue further.
|
||||
|
@ -1893,6 +1894,7 @@ void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
|
|||
|
||||
void kvm_arch_flush_shadow_all(struct kvm *kvm)
|
||||
{
|
||||
kvm_free_stage2_pgd(kvm);
|
||||
}
|
||||
|
||||
void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
|
||||
|
|
|
@ -255,6 +255,12 @@ static int __init exynos_pmu_irq_init(struct device_node *node,
|
|||
return -ENOMEM;
|
||||
}
|
||||
|
||||
/*
|
||||
* Clear the OF_POPULATED flag set in of_irq_init so that
|
||||
* later the Exynos PMU platform device won't be skipped.
|
||||
*/
|
||||
of_node_clear_flag(node, OF_POPULATED);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -64,6 +64,7 @@ static void __init imx6ul_init_machine(void)
|
|||
if (parent == NULL)
|
||||
pr_warn("failed to initialize soc device\n");
|
||||
|
||||
of_platform_default_populate(NULL, NULL, parent);
|
||||
imx6ul_enet_init();
|
||||
imx_anatop_init();
|
||||
imx6ul_pm_init();
|
||||
|
|
|
@ -295,7 +295,7 @@ int imx6_set_lpm(enum mxc_cpu_pwr_mode mode)
|
|||
val &= ~BM_CLPCR_SBYOS;
|
||||
if (cpu_is_imx6sl())
|
||||
val |= BM_CLPCR_BYPASS_PMIC_READY;
|
||||
if (cpu_is_imx6sl() || cpu_is_imx6sx())
|
||||
if (cpu_is_imx6sl() || cpu_is_imx6sx() || cpu_is_imx6ul())
|
||||
val |= BM_CLPCR_BYP_MMDC_CH0_LPM_HS;
|
||||
else
|
||||
val |= BM_CLPCR_BYP_MMDC_CH1_LPM_HS;
|
||||
|
@ -310,7 +310,7 @@ int imx6_set_lpm(enum mxc_cpu_pwr_mode mode)
|
|||
val |= 0x3 << BP_CLPCR_STBY_COUNT;
|
||||
val |= BM_CLPCR_VSTBY;
|
||||
val |= BM_CLPCR_SBYOS;
|
||||
if (cpu_is_imx6sl())
|
||||
if (cpu_is_imx6sl() || cpu_is_imx6sx())
|
||||
val |= BM_CLPCR_BYPASS_PMIC_READY;
|
||||
if (cpu_is_imx6sl() || cpu_is_imx6sx() || cpu_is_imx6ul())
|
||||
val |= BM_CLPCR_BYP_MMDC_CH0_LPM_HS;
|
||||
|
|
|
@ -220,9 +220,6 @@ static int am33xx_cm_wait_module_ready(u8 part, s16 inst, u16 clkctrl_offs,
|
|||
{
|
||||
int i = 0;
|
||||
|
||||
if (!clkctrl_offs)
|
||||
return 0;
|
||||
|
||||
omap_test_timeout(_is_module_ready(inst, clkctrl_offs),
|
||||
MAX_MODULE_READY_TIME, i);
|
||||
|
||||
|
@ -246,9 +243,6 @@ static int am33xx_cm_wait_module_idle(u8 part, s16 inst, u16 clkctrl_offs,
|
|||
{
|
||||
int i = 0;
|
||||
|
||||
if (!clkctrl_offs)
|
||||
return 0;
|
||||
|
||||
omap_test_timeout((_clkctrl_idlest(inst, clkctrl_offs) ==
|
||||
CLKCTRL_IDLEST_DISABLED),
|
||||
MAX_MODULE_READY_TIME, i);
|
||||
|
|
|
@ -278,9 +278,6 @@ static int omap4_cminst_wait_module_ready(u8 part, s16 inst, u16 clkctrl_offs,
|
|||
{
|
||||
int i = 0;
|
||||
|
||||
if (!clkctrl_offs)
|
||||
return 0;
|
||||
|
||||
omap_test_timeout(_is_module_ready(part, inst, clkctrl_offs),
|
||||
MAX_MODULE_READY_TIME, i);
|
||||
|
||||
|
@ -304,9 +301,6 @@ static int omap4_cminst_wait_module_idle(u8 part, s16 inst, u16 clkctrl_offs,
|
|||
{
|
||||
int i = 0;
|
||||
|
||||
if (!clkctrl_offs)
|
||||
return 0;
|
||||
|
||||
omap_test_timeout((_clkctrl_idlest(part, inst, clkctrl_offs) ==
|
||||
CLKCTRL_IDLEST_DISABLED),
|
||||
MAX_MODULE_DISABLE_TIME, i);
|
||||
|
|
|
@ -1053,6 +1053,10 @@ static int _omap4_wait_target_disable(struct omap_hwmod *oh)
|
|||
if (oh->flags & HWMOD_NO_IDLEST)
|
||||
return 0;
|
||||
|
||||
if (!oh->prcm.omap4.clkctrl_offs &&
|
||||
!(oh->prcm.omap4.flags & HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET))
|
||||
return 0;
|
||||
|
||||
return omap_cm_wait_module_idle(oh->clkdm->prcm_partition,
|
||||
oh->clkdm->cm_inst,
|
||||
oh->prcm.omap4.clkctrl_offs, 0);
|
||||
|
@ -2971,6 +2975,10 @@ static int _omap4_wait_target_ready(struct omap_hwmod *oh)
|
|||
if (!_find_mpu_rt_port(oh))
|
||||
return 0;
|
||||
|
||||
if (!oh->prcm.omap4.clkctrl_offs &&
|
||||
!(oh->prcm.omap4.flags & HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET))
|
||||
return 0;
|
||||
|
||||
/* XXX check module SIDLEMODE, hardreset status */
|
||||
|
||||
return omap_cm_wait_module_ready(oh->clkdm->prcm_partition,
|
||||
|
|
|
@ -443,8 +443,12 @@ struct omap_hwmod_omap2_prcm {
|
|||
* HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT: Some IP blocks don't have a PRCM
|
||||
* module-level context loss register associated with them; this
|
||||
* flag bit should be set in those cases
|
||||
* HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET: Some IP blocks have a valid CLKCTRL
|
||||
* offset of zero; this flag bit should be set in those cases to
|
||||
* distinguish from hwmods that have no clkctrl offset.
|
||||
*/
|
||||
#define HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT (1 << 0)
|
||||
#define HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET (1 << 1)
|
||||
|
||||
/**
|
||||
* struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data
|
||||
|
|
|
@ -29,6 +29,7 @@
|
|||
#define CLKCTRL(oh, clkctrl) ((oh).prcm.omap4.clkctrl_offs = (clkctrl))
|
||||
#define RSTCTRL(oh, rstctrl) ((oh).prcm.omap4.rstctrl_offs = (rstctrl))
|
||||
#define RSTST(oh, rstst) ((oh).prcm.omap4.rstst_offs = (rstst))
|
||||
#define PRCM_FLAGS(oh, flag) ((oh).prcm.omap4.flags = (flag))
|
||||
|
||||
/*
|
||||
* 'l3' class
|
||||
|
@ -1296,6 +1297,7 @@ static void omap_hwmod_am33xx_clkctrl(void)
|
|||
CLKCTRL(am33xx_i2c1_hwmod, AM33XX_CM_WKUP_I2C0_CLKCTRL_OFFSET);
|
||||
CLKCTRL(am33xx_wd_timer1_hwmod, AM33XX_CM_WKUP_WDT1_CLKCTRL_OFFSET);
|
||||
CLKCTRL(am33xx_rtc_hwmod, AM33XX_CM_RTC_RTC_CLKCTRL_OFFSET);
|
||||
PRCM_FLAGS(am33xx_rtc_hwmod, HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET);
|
||||
CLKCTRL(am33xx_mmc2_hwmod, AM33XX_CM_PER_MMC2_CLKCTRL_OFFSET);
|
||||
CLKCTRL(am33xx_gpmc_hwmod, AM33XX_CM_PER_GPMC_CLKCTRL_OFFSET);
|
||||
CLKCTRL(am33xx_l4_ls_hwmod, AM33XX_CM_PER_L4LS_CLKCTRL_OFFSET);
|
||||
|
|
|
@ -722,8 +722,20 @@ static struct omap_hwmod omap3xxx_dss_dispc_hwmod = {
|
|||
* display serial interface controller
|
||||
*/
|
||||
|
||||
static struct omap_hwmod_class_sysconfig omap3xxx_dsi_sysc = {
|
||||
.rev_offs = 0x0000,
|
||||
.sysc_offs = 0x0010,
|
||||
.syss_offs = 0x0014,
|
||||
.sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY |
|
||||
SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
|
||||
SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
|
||||
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
|
||||
.sysc_fields = &omap_hwmod_sysc_type1,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_class omap3xxx_dsi_hwmod_class = {
|
||||
.name = "dsi",
|
||||
.sysc = &omap3xxx_dsi_sysc,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_irq_info omap3xxx_dsi1_irqs[] = {
|
||||
|
|
|
@ -137,6 +137,18 @@ static struct pxa2xx_udc_mach_info udc_info __initdata = {
|
|||
// no D+ pullup; lubbock can't connect/disconnect in software
|
||||
};
|
||||
|
||||
static void lubbock_init_pcmcia(void)
|
||||
{
|
||||
struct clk *clk;
|
||||
|
||||
/* Add an alias for the SA1111 PCMCIA clock */
|
||||
clk = clk_get_sys("pxa2xx-pcmcia", NULL);
|
||||
if (!IS_ERR(clk)) {
|
||||
clkdev_create(clk, NULL, "1800");
|
||||
clk_put(clk);
|
||||
}
|
||||
}
|
||||
|
||||
static struct resource sa1111_resources[] = {
|
||||
[0] = {
|
||||
.start = 0x10000000,
|
||||
|
@ -467,6 +479,8 @@ static void __init lubbock_init(void)
|
|||
pxa_set_btuart_info(NULL);
|
||||
pxa_set_stuart_info(NULL);
|
||||
|
||||
lubbock_init_pcmcia();
|
||||
|
||||
clk_add_alias("SA1111_CLK", NULL, "GPIO11_CLK", NULL);
|
||||
pxa_set_udc_info(&udc_info);
|
||||
pxa_set_fb_info(NULL, &sharp_lm8v31);
|
||||
|
|
|
@ -125,6 +125,8 @@ static unsigned long clk_36864_get_rate(struct clk *clk)
|
|||
}
|
||||
|
||||
static struct clkops clk_36864_ops = {
|
||||
.enable = clk_cpu_enable,
|
||||
.disable = clk_cpu_disable,
|
||||
.get_rate = clk_36864_get_rate,
|
||||
};
|
||||
|
||||
|
@ -140,9 +142,8 @@ static struct clk_lookup sa11xx_clkregs[] = {
|
|||
CLKDEV_INIT(NULL, "OSTIMER0", &clk_36864),
|
||||
};
|
||||
|
||||
static int __init sa11xx_clk_init(void)
|
||||
int __init sa11xx_clk_init(void)
|
||||
{
|
||||
clkdev_add_table(sa11xx_clkregs, ARRAY_SIZE(sa11xx_clkregs));
|
||||
return 0;
|
||||
}
|
||||
core_initcall(sa11xx_clk_init);
|
||||
|
|
|
@ -34,6 +34,7 @@
|
|||
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/irqs.h>
|
||||
#include <mach/reset.h>
|
||||
|
||||
#include "generic.h"
|
||||
#include <clocksource/pxa.h>
|
||||
|
@ -95,6 +96,8 @@ static void sa1100_power_off(void)
|
|||
|
||||
void sa11x0_restart(enum reboot_mode mode, const char *cmd)
|
||||
{
|
||||
clear_reset_status(RESET_STATUS_ALL);
|
||||
|
||||
if (mode == REBOOT_SOFT) {
|
||||
/* Jump into ROM at address 0 */
|
||||
soft_restart(0);
|
||||
|
@ -388,6 +391,7 @@ void __init sa1100_init_irq(void)
|
|||
sa11x0_init_irq_nodt(IRQ_GPIO0_SC, irq_resource.start);
|
||||
|
||||
sa1100_init_gpio();
|
||||
sa11xx_clk_init();
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
@ -44,3 +44,5 @@ int sa11x0_pm_init(void);
|
|||
#else
|
||||
static inline int sa11x0_pm_init(void) { return 0; }
|
||||
#endif
|
||||
|
||||
int sa11xx_clk_init(void);
|
||||
|
|
|
@ -41,40 +41,27 @@
|
|||
|
||||
#define REGULATOR_IRQ_MASK BIT(2) /* IRQ2, active low */
|
||||
|
||||
/* start of DA9210 System Control and Event Registers */
|
||||
#define DA9210_REG_MASK_A 0x54
|
||||
|
||||
static void __iomem *irqc;
|
||||
|
||||
static const u8 da9063_mask_regs[] = {
|
||||
DA9063_REG_IRQ_MASK_A,
|
||||
DA9063_REG_IRQ_MASK_B,
|
||||
DA9063_REG_IRQ_MASK_C,
|
||||
DA9063_REG_IRQ_MASK_D,
|
||||
/* first byte sets the memory pointer, following are consecutive reg values */
|
||||
static u8 da9063_irq_clr[] = { DA9063_REG_IRQ_MASK_A, 0xff, 0xff, 0xff, 0xff };
|
||||
static u8 da9210_irq_clr[] = { DA9210_REG_MASK_A, 0xff, 0xff };
|
||||
|
||||
static struct i2c_msg da9xxx_msgs[2] = {
|
||||
{
|
||||
.addr = 0x58,
|
||||
.len = ARRAY_SIZE(da9063_irq_clr),
|
||||
.buf = da9063_irq_clr,
|
||||
}, {
|
||||
.addr = 0x68,
|
||||
.len = ARRAY_SIZE(da9210_irq_clr),
|
||||
.buf = da9210_irq_clr,
|
||||
},
|
||||
};
|
||||
|
||||
/* DA9210 System Control and Event Registers */
|
||||
#define DA9210_REG_MASK_A 0x54
|
||||
#define DA9210_REG_MASK_B 0x55
|
||||
|
||||
static const u8 da9210_mask_regs[] = {
|
||||
DA9210_REG_MASK_A,
|
||||
DA9210_REG_MASK_B,
|
||||
};
|
||||
|
||||
static void da9xxx_mask_irqs(struct i2c_client *client, const u8 regs[],
|
||||
unsigned int nregs)
|
||||
{
|
||||
unsigned int i;
|
||||
|
||||
dev_info(&client->dev, "Masking %s interrupt sources\n", client->name);
|
||||
|
||||
for (i = 0; i < nregs; i++) {
|
||||
int error = i2c_smbus_write_byte_data(client, regs[i], ~0);
|
||||
if (error) {
|
||||
dev_err(&client->dev, "i2c error %d\n", error);
|
||||
return;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static int regulator_quirk_notify(struct notifier_block *nb,
|
||||
unsigned long action, void *data)
|
||||
{
|
||||
|
@ -93,12 +80,15 @@ static int regulator_quirk_notify(struct notifier_block *nb,
|
|||
client = to_i2c_client(dev);
|
||||
dev_dbg(dev, "Detected %s\n", client->name);
|
||||
|
||||
if ((client->addr == 0x58 && !strcmp(client->name, "da9063")))
|
||||
da9xxx_mask_irqs(client, da9063_mask_regs,
|
||||
ARRAY_SIZE(da9063_mask_regs));
|
||||
else if (client->addr == 0x68 && !strcmp(client->name, "da9210"))
|
||||
da9xxx_mask_irqs(client, da9210_mask_regs,
|
||||
ARRAY_SIZE(da9210_mask_regs));
|
||||
if ((client->addr == 0x58 && !strcmp(client->name, "da9063")) ||
|
||||
(client->addr == 0x68 && !strcmp(client->name, "da9210"))) {
|
||||
int ret;
|
||||
|
||||
dev_info(&client->dev, "clearing da9063/da9210 interrupts\n");
|
||||
ret = i2c_transfer(client->adapter, da9xxx_msgs, ARRAY_SIZE(da9xxx_msgs));
|
||||
if (ret != ARRAY_SIZE(da9xxx_msgs))
|
||||
dev_err(&client->dev, "i2c error %d\n", ret);
|
||||
}
|
||||
|
||||
mon = ioread32(irqc + IRQC_MONITOR);
|
||||
if (mon & REGULATOR_IRQ_MASK)
|
||||
|
|
|
@ -137,7 +137,7 @@ void __init init_default_cache_policy(unsigned long pmd)
|
|||
|
||||
initial_pmd_value = pmd;
|
||||
|
||||
pmd &= PMD_SECT_TEX(1) | PMD_SECT_BUFFERABLE | PMD_SECT_CACHEABLE;
|
||||
pmd &= PMD_SECT_CACHE_MASK;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(cache_policies); i++)
|
||||
if (cache_policies[i].pmd == pmd) {
|
||||
|
|
|
@ -16,6 +16,7 @@
|
|||
#include <asm/hwcap.h>
|
||||
#include <asm/pgtable-hwdef.h>
|
||||
#include <asm/pgtable.h>
|
||||
#include <asm/memory.h>
|
||||
|
||||
#include "proc-macros.S"
|
||||
|
||||
|
|
|
@ -170,9 +170,6 @@ static int xen_starting_cpu(unsigned int cpu)
|
|||
pr_info("Xen: initializing cpu%d\n", cpu);
|
||||
vcpup = per_cpu_ptr(xen_vcpu_info, cpu);
|
||||
|
||||
/* Direct vCPU id mapping for ARM guests. */
|
||||
per_cpu(xen_vcpu_id, cpu) = cpu;
|
||||
|
||||
info.mfn = virt_to_gfn(vcpup);
|
||||
info.offset = xen_offset_in_page(vcpup);
|
||||
|
||||
|
@ -330,6 +327,7 @@ static int __init xen_guest_init(void)
|
|||
{
|
||||
struct xen_add_to_physmap xatp;
|
||||
struct shared_info *shared_info_page = NULL;
|
||||
int cpu;
|
||||
|
||||
if (!xen_domain())
|
||||
return 0;
|
||||
|
@ -380,7 +378,8 @@ static int __init xen_guest_init(void)
|
|||
return -ENOMEM;
|
||||
|
||||
/* Direct vCPU id mapping for ARM guests. */
|
||||
per_cpu(xen_vcpu_id, 0) = 0;
|
||||
for_each_possible_cpu(cpu)
|
||||
per_cpu(xen_vcpu_id, cpu) = cpu;
|
||||
|
||||
xen_auto_xlat_grant_frames.count = gnttab_max_grant_frames();
|
||||
if (xen_xlate_map_ballooned_pages(&xen_auto_xlat_grant_frames.pfn,
|
||||
|
|
|
@ -255,10 +255,10 @@
|
|||
/* Local timer */
|
||||
timer {
|
||||
compatible = "arm,armv8-timer";
|
||||
interrupts = <1 13 0xf01>,
|
||||
<1 14 0xf01>,
|
||||
<1 11 0xf01>,
|
||||
<1 10 0xf01>;
|
||||
interrupts = <1 13 0xf08>,
|
||||
<1 14 0xf08>,
|
||||
<1 11 0xf08>,
|
||||
<1 10 0xf08>;
|
||||
};
|
||||
|
||||
timer0: timer0@ffc03000 {
|
||||
|
|
|
@ -102,13 +102,13 @@
|
|||
timer {
|
||||
compatible = "arm,armv8-timer";
|
||||
interrupts = <GIC_PPI 13
|
||||
(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_EDGE_RISING)>,
|
||||
(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
|
||||
<GIC_PPI 14
|
||||
(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_EDGE_RISING)>,
|
||||
(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
|
||||
<GIC_PPI 11
|
||||
(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_EDGE_RISING)>,
|
||||
(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
|
||||
<GIC_PPI 10
|
||||
(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_EDGE_RISING)>;
|
||||
(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
|
||||
};
|
||||
|
||||
xtal: xtal-clk {
|
||||
|
|
|
@ -110,10 +110,10 @@
|
|||
|
||||
timer {
|
||||
compatible = "arm,armv8-timer";
|
||||
interrupts = <1 0 0xff01>, /* Secure Phys IRQ */
|
||||
<1 13 0xff01>, /* Non-secure Phys IRQ */
|
||||
<1 14 0xff01>, /* Virt IRQ */
|
||||
<1 15 0xff01>; /* Hyp IRQ */
|
||||
interrupts = <1 0 0xff08>, /* Secure Phys IRQ */
|
||||
<1 13 0xff08>, /* Non-secure Phys IRQ */
|
||||
<1 14 0xff08>, /* Virt IRQ */
|
||||
<1 15 0xff08>; /* Hyp IRQ */
|
||||
clock-frequency = <50000000>;
|
||||
};
|
||||
|
||||
|
|
|
@ -0,0 +1 @@
|
|||
../../../../arm/boot/dts/bcm2835-rpi.dtsi
|
|
@ -1,7 +1,7 @@
|
|||
/dts-v1/;
|
||||
#include "bcm2837.dtsi"
|
||||
#include "../../../../arm/boot/dts/bcm2835-rpi.dtsi"
|
||||
#include "../../../../arm/boot/dts/bcm283x-rpi-smsc9514.dtsi"
|
||||
#include "bcm2835-rpi.dtsi"
|
||||
#include "bcm283x-rpi-smsc9514.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "raspberrypi,3-model-b", "brcm,bcm2837";
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
#include "../../../../arm/boot/dts/bcm283x.dtsi"
|
||||
#include "bcm283x.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "brcm,bcm2836";
|
||||
|
|
|
@ -0,0 +1 @@
|
|||
../../../../arm/boot/dts/bcm283x-rpi-smsc9514.dtsi
|
|
@ -0,0 +1 @@
|
|||
../../../../arm/boot/dts/bcm283x.dtsi
|
|
@ -88,13 +88,13 @@
|
|||
timer {
|
||||
compatible = "arm,armv8-timer";
|
||||
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(0xff) |
|
||||
IRQ_TYPE_EDGE_RISING)>,
|
||||
IRQ_TYPE_LEVEL_LOW)>,
|
||||
<GIC_PPI 14 (GIC_CPU_MASK_RAW(0xff) |
|
||||
IRQ_TYPE_EDGE_RISING)>,
|
||||
IRQ_TYPE_LEVEL_LOW)>,
|
||||
<GIC_PPI 11 (GIC_CPU_MASK_RAW(0xff) |
|
||||
IRQ_TYPE_EDGE_RISING)>,
|
||||
IRQ_TYPE_LEVEL_LOW)>,
|
||||
<GIC_PPI 10 (GIC_CPU_MASK_RAW(0xff) |
|
||||
IRQ_TYPE_EDGE_RISING)>;
|
||||
IRQ_TYPE_LEVEL_LOW)>;
|
||||
};
|
||||
|
||||
pmu {
|
||||
|
|
|
@ -354,10 +354,10 @@
|
|||
|
||||
timer {
|
||||
compatible = "arm,armv8-timer";
|
||||
interrupts = <1 13 0xff01>,
|
||||
<1 14 0xff01>,
|
||||
<1 11 0xff01>,
|
||||
<1 10 0xff01>;
|
||||
interrupts = <1 13 4>,
|
||||
<1 14 4>,
|
||||
<1 11 4>,
|
||||
<1 10 4>;
|
||||
};
|
||||
|
||||
pmu {
|
||||
|
|
|
@ -473,10 +473,10 @@
|
|||
|
||||
timer {
|
||||
compatible = "arm,armv8-timer";
|
||||
interrupts = <1 13 0xff01>,
|
||||
<1 14 0xff01>,
|
||||
<1 11 0xff01>,
|
||||
<1 10 0xff01>;
|
||||
interrupts = <1 13 0xff08>,
|
||||
<1 14 0xff08>,
|
||||
<1 11 0xff08>,
|
||||
<1 10 0xff08>;
|
||||
};
|
||||
|
||||
pmu_system_controller: system-controller@105c0000 {
|
||||
|
|
|
@ -119,10 +119,10 @@
|
|||
|
||||
timer {
|
||||
compatible = "arm,armv8-timer";
|
||||
interrupts = <1 13 0x1>, /* Physical Secure PPI */
|
||||
<1 14 0x1>, /* Physical Non-Secure PPI */
|
||||
<1 11 0x1>, /* Virtual PPI */
|
||||
<1 10 0x1>; /* Hypervisor PPI */
|
||||
interrupts = <1 13 0xf08>, /* Physical Secure PPI */
|
||||
<1 14 0xf08>, /* Physical Non-Secure PPI */
|
||||
<1 11 0xf08>, /* Virtual PPI */
|
||||
<1 10 0xf08>; /* Hypervisor PPI */
|
||||
};
|
||||
|
||||
pmu {
|
||||
|
|
|
@ -191,10 +191,10 @@
|
|||
|
||||
timer {
|
||||
compatible = "arm,armv8-timer";
|
||||
interrupts = <1 13 0x8>, /* Physical Secure PPI, active-low */
|
||||
<1 14 0x8>, /* Physical Non-Secure PPI, active-low */
|
||||
<1 11 0x8>, /* Virtual PPI, active-low */
|
||||
<1 10 0x8>; /* Hypervisor PPI, active-low */
|
||||
interrupts = <1 13 4>, /* Physical Secure PPI, active-low */
|
||||
<1 14 4>, /* Physical Non-Secure PPI, active-low */
|
||||
<1 11 4>, /* Virtual PPI, active-low */
|
||||
<1 10 4>; /* Hypervisor PPI, active-low */
|
||||
};
|
||||
|
||||
pmu {
|
||||
|
|
|
@ -122,10 +122,10 @@
|
|||
|
||||
timer {
|
||||
compatible = "arm,armv8-timer";
|
||||
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>,
|
||||
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>,
|
||||
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>,
|
||||
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
|
||||
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
|
||||
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
|
||||
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
|
||||
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
|
||||
};
|
||||
|
||||
odmi: odmi@300000 {
|
||||
|
|
|
@ -270,6 +270,8 @@
|
|||
#io-channel-cells = <1>;
|
||||
clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
|
||||
clock-names = "saradc", "apb_pclk";
|
||||
resets = <&cru SRST_SARADC>;
|
||||
reset-names = "saradc-apb";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
|
@ -129,10 +129,10 @@
|
|||
|
||||
timer {
|
||||
compatible = "arm,armv8-timer";
|
||||
interrupts = <1 13 0xf01>,
|
||||
<1 14 0xf01>,
|
||||
<1 11 0xf01>,
|
||||
<1 10 0xf01>;
|
||||
interrupts = <1 13 4>,
|
||||
<1 14 4>,
|
||||
<1 11 4>,
|
||||
<1 10 4>;
|
||||
};
|
||||
|
||||
soc {
|
||||
|
|
|
@ -65,10 +65,10 @@
|
|||
timer {
|
||||
compatible = "arm,armv8-timer";
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <1 13 0xf01>,
|
||||
<1 14 0xf01>,
|
||||
<1 11 0xf01>,
|
||||
<1 10 0xf01>;
|
||||
interrupts = <1 13 0xf08>,
|
||||
<1 14 0xf08>,
|
||||
<1 11 0xf08>,
|
||||
<1 10 0xf08>;
|
||||
};
|
||||
|
||||
amba_apu {
|
||||
|
|
|
@ -216,7 +216,7 @@ static int ctr_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
|
|||
err = blkcipher_walk_done(desc, &walk,
|
||||
walk.nbytes % AES_BLOCK_SIZE);
|
||||
}
|
||||
if (nbytes) {
|
||||
if (walk.nbytes % AES_BLOCK_SIZE) {
|
||||
u8 *tdst = walk.dst.virt.addr + blocks * AES_BLOCK_SIZE;
|
||||
u8 *tsrc = walk.src.virt.addr + blocks * AES_BLOCK_SIZE;
|
||||
u8 __aligned(8) tail[AES_BLOCK_SIZE];
|
||||
|
|
|
@ -199,19 +199,19 @@ static inline unsigned long __percpu_xchg(void *ptr, unsigned long val,
|
|||
#define _percpu_read(pcp) \
|
||||
({ \
|
||||
typeof(pcp) __retval; \
|
||||
preempt_disable(); \
|
||||
preempt_disable_notrace(); \
|
||||
__retval = (typeof(pcp))__percpu_read(raw_cpu_ptr(&(pcp)), \
|
||||
sizeof(pcp)); \
|
||||
preempt_enable(); \
|
||||
preempt_enable_notrace(); \
|
||||
__retval; \
|
||||
})
|
||||
|
||||
#define _percpu_write(pcp, val) \
|
||||
do { \
|
||||
preempt_disable(); \
|
||||
preempt_disable_notrace(); \
|
||||
__percpu_write(raw_cpu_ptr(&(pcp)), (unsigned long)(val), \
|
||||
sizeof(pcp)); \
|
||||
preempt_enable(); \
|
||||
preempt_enable_notrace(); \
|
||||
} while(0) \
|
||||
|
||||
#define _pcp_protect(operation, pcp, val) \
|
||||
|
|
|
@ -363,4 +363,14 @@ static inline int arch_read_trylock(arch_rwlock_t *rw)
|
|||
#define arch_read_relax(lock) cpu_relax()
|
||||
#define arch_write_relax(lock) cpu_relax()
|
||||
|
||||
/*
|
||||
* Accesses appearing in program order before a spin_lock() operation
|
||||
* can be reordered with accesses inside the critical section, by virtue
|
||||
* of arch_spin_lock being constructed using acquire semantics.
|
||||
*
|
||||
* In cases where this is problematic (e.g. try_to_wake_up), an
|
||||
* smp_mb__before_spinlock() can restore the required ordering.
|
||||
*/
|
||||
#define smp_mb__before_spinlock() smp_mb()
|
||||
|
||||
#endif /* __ASM_SPINLOCK_H */
|
||||
|
|
|
@ -100,7 +100,16 @@ ENTRY(cpu_do_resume)
|
|||
|
||||
msr tcr_el1, x8
|
||||
msr vbar_el1, x9
|
||||
|
||||
/*
|
||||
* __cpu_setup() cleared MDSCR_EL1.MDE and friends, before unmasking
|
||||
* debug exceptions. By restoring MDSCR_EL1 here, we may take a debug
|
||||
* exception. Mask them until local_dbg_restore() in cpu_suspend()
|
||||
* resets them.
|
||||
*/
|
||||
disable_dbg
|
||||
msr mdscr_el1, x10
|
||||
|
||||
msr sctlr_el1, x12
|
||||
/*
|
||||
* Restore oslsr_el1 by writing oslar_el1
|
||||
|
|
|
@ -74,7 +74,7 @@ extern __kernel_size_t __copy_user(void *to, const void *from,
|
|||
|
||||
extern __kernel_size_t copy_to_user(void __user *to, const void *from,
|
||||
__kernel_size_t n);
|
||||
extern __kernel_size_t copy_from_user(void *to, const void __user *from,
|
||||
extern __kernel_size_t ___copy_from_user(void *to, const void __user *from,
|
||||
__kernel_size_t n);
|
||||
|
||||
static inline __kernel_size_t __copy_to_user(void __user *to, const void *from,
|
||||
|
@ -88,6 +88,15 @@ static inline __kernel_size_t __copy_from_user(void *to,
|
|||
{
|
||||
return __copy_user(to, (const void __force *)from, n);
|
||||
}
|
||||
static inline __kernel_size_t copy_from_user(void *to,
|
||||
const void __user *from,
|
||||
__kernel_size_t n)
|
||||
{
|
||||
size_t res = ___copy_from_user(to, from, n);
|
||||
if (unlikely(res))
|
||||
memset(to + (n - res), 0, res);
|
||||
return res;
|
||||
}
|
||||
|
||||
#define __copy_to_user_inatomic __copy_to_user
|
||||
#define __copy_from_user_inatomic __copy_from_user
|
||||
|
|
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