powerpc/64: allow alternate return locations for soft-masked interrupts
The exception table fixup adjusts a failed page fault's interrupt return location if it was taken at an address specified in the exception table, to a corresponding fixup handler address. Introduce a variation of that idea which adds a fixup table for NMIs and soft-masked asynchronous interrupts. This will be used to protect certain critical sections that are sensitive to being clobbered by interrupts coming in (due to using the same SPRs and/or irq soft-mask state). Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20210617155116.2167984-10-npiggin@gmail.com
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@ -73,6 +73,11 @@
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#include <asm/kprobes.h>
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#include <asm/runlatch.h>
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#ifdef CONFIG_PPC64
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extern char __end_soft_masked[];
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unsigned long search_kernel_restart_table(unsigned long addr);
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#endif
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#ifdef CONFIG_PPC_BOOK3S_64
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static inline void srr_regs_clobbered(void)
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{
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@ -269,6 +274,14 @@ static inline void interrupt_nmi_exit_prepare(struct pt_regs *regs, struct inter
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* new work to do (must use irq_work for that).
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*/
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#ifdef CONFIG_PPC64
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if (arch_irq_disabled_regs(regs)) {
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unsigned long rst = search_kernel_restart_table(regs->nip);
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if (rst)
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regs_set_return_ip(regs, rst);
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}
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#endif
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#ifdef CONFIG_PPC64
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if (nmi_disables_ftrace(regs))
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this_cpu_set_ftrace_enabled(state->ftrace_enabled);
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@ -762,6 +762,14 @@ END_FTR_SECTION_NESTED(CPU_FTR_CELL_TB_BUG, CPU_FTR_CELL_TB_BUG, 96)
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stringify_in_c(.long (_target) - . ;) \
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stringify_in_c(.previous)
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#define RESTART_TABLE(_start, _end, _target) \
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stringify_in_c(.section __restart_table,"a";)\
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stringify_in_c(.balign 8;) \
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stringify_in_c(.llong (_start);) \
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stringify_in_c(.llong (_end);) \
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stringify_in_c(.llong (_target);) \
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stringify_in_c(.previous)
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#ifdef CONFIG_PPC_FSL_BOOK3E
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#define BTB_FLUSH(reg) \
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lis reg,BUCSR_INIT@h; \
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@ -901,6 +901,28 @@ kernel_dbg_exc:
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bl unknown_exception
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b interrupt_return
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.macro SEARCH_RESTART_TABLE
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LOAD_REG_IMMEDIATE_SYM(r14, r11, __start___restart_table)
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LOAD_REG_IMMEDIATE_SYM(r15, r11, __stop___restart_table)
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300:
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cmpd r14,r15
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beq 302f
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ld r11,0(r14)
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cmpld r10,r11
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blt 301f
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ld r11,8(r14)
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cmpld r10,r11
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bge 301f
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ld r11,16(r14)
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b 303f
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301:
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addi r14,r14,24
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b 300b
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302:
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li r11,0
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303:
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.endm
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/*
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* An interrupt came in while soft-disabled; We mark paca->irq_happened
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* accordingly and if the interrupt is level sensitive, we hard disable
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@ -909,6 +931,9 @@ kernel_dbg_exc:
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*/
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.macro masked_interrupt_book3e paca_irq full_mask
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std r14,PACA_EXGEN+EX_R14(r13)
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std r15,PACA_EXGEN+EX_R15(r13)
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lbz r10,PACAIRQHAPPENED(r13)
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.if \full_mask == 1
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ori r10,r10,\paca_irq | PACA_IRQ_HARD_DIS
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@ -918,15 +943,23 @@ kernel_dbg_exc:
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stb r10,PACAIRQHAPPENED(r13)
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.if \full_mask == 1
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rldicl r10,r11,48,1 /* clear MSR_EE */
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rotldi r11,r10,16
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xori r11,r11,MSR_EE /* clear MSR_EE */
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mtspr SPRN_SRR1,r11
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.endif
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mfspr r10,SPRN_SRR0
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SEARCH_RESTART_TABLE
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cmpdi r11,0
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beq 1f
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mtspr SPRN_SRR0,r11 /* return to restart address */
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1:
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lwz r11,PACA_EXGEN+EX_CR(r13)
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mtcr r11
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ld r10,PACA_EXGEN+EX_R10(r13)
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ld r11,PACA_EXGEN+EX_R11(r13)
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ld r14,PACA_EXGEN+EX_R14(r13)
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ld r15,PACA_EXGEN+EX_R15(r13)
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mfspr r13,SPRN_SPRG_GEN_SCRATCH
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rfi
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b .
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@ -591,6 +591,36 @@ END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
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__GEN_COMMON_BODY \name
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.endm
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.macro SEARCH_RESTART_TABLE
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#ifdef CONFIG_RELOCATABLE
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mr r12,r2
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ld r2,PACATOC(r13)
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LOAD_REG_ADDR(r9, __start___restart_table)
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LOAD_REG_ADDR(r10, __stop___restart_table)
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mr r2,r12
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#else
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LOAD_REG_IMMEDIATE_SYM(r9, r12, __start___restart_table)
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LOAD_REG_IMMEDIATE_SYM(r10, r12, __stop___restart_table)
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#endif
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300:
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cmpd r9,r10
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beq 302f
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ld r12,0(r9)
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cmpld r11,r12
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blt 301f
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ld r12,8(r9)
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cmpld r11,r12
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bge 301f
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ld r12,16(r9)
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b 303f
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301:
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addi r9,r9,24
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b 300b
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302:
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li r12,0
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303:
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.endm
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/*
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* Restore all registers including H/SRR0/1 saved in a stack frame of a
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* standard exception.
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@ -2646,6 +2676,7 @@ EXC_COMMON_BEGIN(soft_nmi_common)
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mtmsrd r9,1
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kuap_kernel_restore r9, r10
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EXCEPTION_RESTORE_REGS hsrr=0
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RFI_TO_KERNEL
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@ -2703,6 +2734,16 @@ masked_interrupt:
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stb r9,PACASRR_VALID(r13)
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.endif
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SEARCH_RESTART_TABLE
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cmpdi r12,0
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beq 3f
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.if \hsrr
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mtspr SPRN_HSRR0,r12
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.else
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mtspr SPRN_SRR0,r12
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.endif
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3:
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ld r9,PACA_EXGEN+EX_CTR(r13)
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mtctr r9
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lwz r9,PACA_EXGEN+EX_CCR(r13)
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@ -9,6 +9,14 @@
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#define EMITS_PT_NOTE
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#define RO_EXCEPTION_TABLE_ALIGN 0
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#define RESTART_TABLE(align) \
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. = ALIGN(align); \
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__restart_table : AT(ADDR(__restart_table) - LOAD_OFFSET) { \
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__start___restart_table = .; \
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KEEP(*(__restart_table)) \
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__stop___restart_table = .; \
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}
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#include <asm/page.h>
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#include <asm-generic/vmlinux.lds.h>
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#include <asm/cache.h>
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@ -124,6 +132,8 @@ SECTIONS
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RO_DATA(PAGE_SIZE)
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#ifdef CONFIG_PPC64
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RESTART_TABLE(8)
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. = ALIGN(8);
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__stf_entry_barrier_fixup : AT(ADDR(__stf_entry_barrier_fixup) - LOAD_OFFSET) {
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__start___stf_entry_barrier_fixup = .;
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@ -42,7 +42,7 @@ obj-$(CONFIG_PPC_BOOK3S_64) += copyuser_power7.o copypage_power7.o \
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memcpy_power7.o
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obj64-y += copypage_64.o copyuser_64.o mem_64.o hweight_64.o \
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memcpy_64.o copy_mc_64.o
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memcpy_64.o copy_mc_64.o restart_table.o
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ifndef CONFIG_PPC_QUEUED_SPINLOCKS
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obj64-$(CONFIG_SMP) += locks.o
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@ -0,0 +1,30 @@
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#include <asm/interrupt.h>
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#include <asm/kprobes.h>
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struct restart_table_entry {
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unsigned long start;
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unsigned long end;
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unsigned long fixup;
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};
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extern struct restart_table_entry __start___restart_table[];
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extern struct restart_table_entry __stop___restart_table[];
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/* Given an address, look for it in the kernel exception table */
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unsigned long search_kernel_restart_table(unsigned long addr)
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{
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struct restart_table_entry *rte = __start___restart_table;
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while (rte < __stop___restart_table) {
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unsigned long start = rte->start;
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unsigned long end = rte->end;
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unsigned long fixup = rte->fixup;
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if (addr >= start && addr < end)
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return fixup;
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rte++;
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}
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return 0;
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}
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NOKPROBE_SYMBOL(search_kernel_restart_table);
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