tg3: Read VPD with pci_vpd_alloc()
Use pci_vpd_alloc() to dynamically allocate a properly sized buffer and read the full VPD data into it. This simplifies the code, and we no longer have to make assumptions about VPD size. Link: https://lore.kernel.org/r/bd3cd19c-b74f-9704-5786-476bf35ab5de@gmail.com Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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37838aa437
Коммит
f240e15097
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@ -12791,7 +12791,7 @@ static void tg3_get_ethtool_stats(struct net_device *dev,
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memset(tmp_stats, 0, sizeof(struct tg3_ethtool_stats));
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}
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static __be32 *tg3_vpd_readblock(struct tg3 *tp, u32 *vpdlen)
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static __be32 *tg3_vpd_readblock(struct tg3 *tp, unsigned int *vpdlen)
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{
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int i;
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__be32 *buf;
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@ -12825,15 +12825,11 @@ static __be32 *tg3_vpd_readblock(struct tg3 *tp, u32 *vpdlen)
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offset = TG3_NVM_VPD_OFF;
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len = TG3_NVM_VPD_LEN;
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}
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} else {
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len = TG3_NVM_PCI_VPD_MAX_LEN;
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}
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buf = kmalloc(len, GFP_KERNEL);
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if (buf == NULL)
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if (!buf)
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return NULL;
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if (magic == TG3_EEPROM_MAGIC) {
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for (i = 0; i < len; i += 4) {
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/* The data is in little-endian format in NVRAM.
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* Use the big-endian read routines to preserve
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@ -12844,12 +12840,9 @@ static __be32 *tg3_vpd_readblock(struct tg3 *tp, u32 *vpdlen)
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}
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*vpdlen = len;
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} else {
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ssize_t cnt;
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cnt = pci_read_vpd(tp->pdev, 0, len, (u8 *)buf);
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if (cnt < 0)
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goto error;
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*vpdlen = cnt;
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buf = pci_vpd_alloc(tp->pdev, vpdlen);
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if (IS_ERR(buf))
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return NULL;
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}
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return buf;
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@ -12871,9 +12864,10 @@ error:
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static int tg3_test_nvram(struct tg3 *tp)
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{
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u32 csum, magic, len;
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u32 csum, magic;
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__be32 *buf;
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int i, j, k, err = 0, size;
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unsigned int len;
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if (tg3_flag(tp, NO_NVRAM))
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return 0;
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@ -15621,8 +15615,7 @@ skip_phy_reset:
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static void tg3_read_vpd(struct tg3 *tp)
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{
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u8 *vpd_data;
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unsigned int block_end, rosize, len;
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u32 vpdlen;
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unsigned int block_end, rosize, len, vpdlen;
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int j, i = 0;
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vpd_data = (u8 *)tg3_vpd_readblock(tp, &vpdlen);
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@ -2101,7 +2101,6 @@
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/* Hardware Legacy NVRAM layout */
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#define TG3_NVM_VPD_OFF 0x100
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#define TG3_NVM_VPD_LEN 256
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#define TG3_NVM_PCI_VPD_MAX_LEN 512
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/* Hardware Selfboot NVRAM layout */
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#define TG3_NVM_HWSB_CFG1 0x00000004
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