i40iw: Add 2MB page support
Add support to allow each independent memory region to be configured for 2MB page size in addition to 4KB page size. Signed-off-by: Shiraz Saleem <shiraz.saleem@intel.com> Signed-off-by: Henry Orosco <henry.orosco@intel.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
This commit is contained in:
Родитель
b6a529da69
Коммит
f26c7c8339
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@ -37,6 +37,7 @@
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#include <linux/random.h>
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#include <linux/random.h>
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#include <linux/highmem.h>
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#include <linux/highmem.h>
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#include <linux/time.h>
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#include <linux/time.h>
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#include <linux/hugetlb.h>
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#include <asm/byteorder.h>
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#include <asm/byteorder.h>
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#include <net/ip.h>
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#include <net/ip.h>
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#include <rdma/ib_verbs.h>
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#include <rdma/ib_verbs.h>
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@ -1305,13 +1306,11 @@ static u32 i40iw_create_stag(struct i40iw_device *iwdev)
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/**
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/**
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* i40iw_next_pbl_addr - Get next pbl address
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* i40iw_next_pbl_addr - Get next pbl address
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* @palloc: Poiner to allocated pbles
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* @pbl: pointer to a pble
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* @pbl: pointer to a pble
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* @pinfo: info pointer
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* @pinfo: info pointer
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* @idx: index
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* @idx: index
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*/
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*/
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static inline u64 *i40iw_next_pbl_addr(struct i40iw_pble_alloc *palloc,
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static inline u64 *i40iw_next_pbl_addr(u64 *pbl,
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u64 *pbl,
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struct i40iw_pble_info **pinfo,
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struct i40iw_pble_info **pinfo,
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u32 *idx)
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u32 *idx)
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{
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{
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@ -1339,9 +1338,11 @@ static void i40iw_copy_user_pgaddrs(struct i40iw_mr *iwmr,
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struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
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struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
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struct i40iw_pble_info *pinfo;
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struct i40iw_pble_info *pinfo;
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struct scatterlist *sg;
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struct scatterlist *sg;
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u64 pg_addr = 0;
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u32 idx = 0;
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u32 idx = 0;
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pinfo = (level == I40IW_LEVEL_1) ? NULL : palloc->level2.leaf;
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pinfo = (level == I40IW_LEVEL_1) ? NULL : palloc->level2.leaf;
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pg_shift = ffs(region->page_size) - 1;
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pg_shift = ffs(region->page_size) - 1;
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for_each_sg(region->sg_head.sgl, sg, region->nmap, entry) {
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for_each_sg(region->sg_head.sgl, sg, region->nmap, entry) {
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chunk_pages = sg_dma_len(sg) >> pg_shift;
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chunk_pages = sg_dma_len(sg) >> pg_shift;
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@ -1349,8 +1350,35 @@ static void i40iw_copy_user_pgaddrs(struct i40iw_mr *iwmr,
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!iwpbl->qp_mr.sq_page)
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!iwpbl->qp_mr.sq_page)
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iwpbl->qp_mr.sq_page = sg_page(sg);
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iwpbl->qp_mr.sq_page = sg_page(sg);
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for (i = 0; i < chunk_pages; i++) {
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for (i = 0; i < chunk_pages; i++) {
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*pbl = cpu_to_le64(sg_dma_address(sg) + region->page_size * i);
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pg_addr = sg_dma_address(sg) + region->page_size * i;
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pbl = i40iw_next_pbl_addr(palloc, pbl, &pinfo, &idx);
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if ((entry + i) == 0)
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*pbl = cpu_to_le64(pg_addr & iwmr->page_msk);
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else if (!(pg_addr & ~iwmr->page_msk))
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*pbl = cpu_to_le64(pg_addr);
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else
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continue;
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pbl = i40iw_next_pbl_addr(pbl, &pinfo, &idx);
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}
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}
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}
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/**
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* i40iw_set_hugetlb_params - set MR pg size and mask to huge pg values.
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* @addr: virtual address
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* @iwmr: mr pointer for this memory registration
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*/
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static void i40iw_set_hugetlb_values(u64 addr, struct i40iw_mr *iwmr)
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{
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struct vm_area_struct *vma;
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struct hstate *h;
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vma = find_vma(current->mm, addr);
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if (vma && is_vm_hugetlb_page(vma)) {
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h = hstate_vma(vma);
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if (huge_page_size(h) == 0x200000) {
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iwmr->page_size = huge_page_size(h);
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iwmr->page_msk = huge_page_mask(h);
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}
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}
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}
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}
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}
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}
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@ -1471,7 +1499,7 @@ static int i40iw_handle_q_mem(struct i40iw_device *iwdev,
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bool ret = true;
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bool ret = true;
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total = req->sq_pages + req->rq_pages + req->cq_pages;
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total = req->sq_pages + req->rq_pages + req->cq_pages;
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pg_size = iwmr->region->page_size;
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pg_size = iwmr->page_size;
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err = i40iw_setup_pbles(iwdev, iwmr, use_pbles);
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err = i40iw_setup_pbles(iwdev, iwmr, use_pbles);
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if (err)
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if (err)
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@ -1720,6 +1748,7 @@ static int i40iw_hwreg_mr(struct i40iw_device *iwdev,
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stag_info->access_rights = access;
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stag_info->access_rights = access;
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stag_info->pd_id = iwpd->sc_pd.pd_id;
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stag_info->pd_id = iwpd->sc_pd.pd_id;
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stag_info->addr_type = I40IW_ADDR_TYPE_VA_BASED;
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stag_info->addr_type = I40IW_ADDR_TYPE_VA_BASED;
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stag_info->page_size = iwmr->page_size;
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if (iwpbl->pbl_allocated) {
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if (iwpbl->pbl_allocated) {
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if (palloc->level == I40IW_LEVEL_1) {
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if (palloc->level == I40IW_LEVEL_1) {
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@ -1778,6 +1807,7 @@ static struct ib_mr *i40iw_reg_user_mr(struct ib_pd *pd,
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unsigned long flags;
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unsigned long flags;
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int err = -ENOSYS;
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int err = -ENOSYS;
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int ret;
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int ret;
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int pg_shift;
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if (length > I40IW_MAX_MR_SIZE)
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if (length > I40IW_MAX_MR_SIZE)
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return ERR_PTR(-EINVAL);
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return ERR_PTR(-EINVAL);
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@ -1802,9 +1832,17 @@ static struct ib_mr *i40iw_reg_user_mr(struct ib_pd *pd,
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iwmr->ibmr.pd = pd;
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iwmr->ibmr.pd = pd;
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iwmr->ibmr.device = pd->device;
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iwmr->ibmr.device = pd->device;
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ucontext = to_ucontext(pd->uobject->context);
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ucontext = to_ucontext(pd->uobject->context);
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region_length = region->length + (start & 0xfff);
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pbl_depth = region_length >> 12;
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iwmr->page_size = region->page_size;
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pbl_depth += (region_length & (4096 - 1)) ? 1 : 0;
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iwmr->page_msk = PAGE_MASK;
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if (region->hugetlb && (req.reg_type == IW_MEMREG_TYPE_MEM))
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i40iw_set_hugetlb_values(start, iwmr);
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region_length = region->length + (start & (iwmr->page_size - 1));
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pg_shift = ffs(iwmr->page_size) - 1;
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pbl_depth = region_length >> pg_shift;
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pbl_depth += (region_length & (iwmr->page_size - 1)) ? 1 : 0;
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iwmr->length = region->length;
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iwmr->length = region->length;
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iwpbl->user_base = virt;
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iwpbl->user_base = virt;
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@ -1842,7 +1880,7 @@ static struct ib_mr *i40iw_reg_user_mr(struct ib_pd *pd,
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goto error;
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goto error;
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if (use_pbles) {
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if (use_pbles) {
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ret = i40iw_check_mr_contiguous(palloc, region->page_size);
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ret = i40iw_check_mr_contiguous(palloc, iwmr->page_size);
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if (ret) {
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if (ret) {
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i40iw_free_pble(iwdev->pble_rsrc, palloc);
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i40iw_free_pble(iwdev->pble_rsrc, palloc);
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iwpbl->pbl_allocated = false;
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iwpbl->pbl_allocated = false;
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@ -1865,6 +1903,7 @@ static struct ib_mr *i40iw_reg_user_mr(struct ib_pd *pd,
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i40iw_free_stag(iwdev, stag);
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i40iw_free_stag(iwdev, stag);
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goto error;
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goto error;
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}
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}
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break;
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break;
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default:
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default:
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goto error;
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goto error;
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@ -92,6 +92,8 @@ struct i40iw_mr {
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struct ib_umem *region;
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struct ib_umem *region;
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u16 type;
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u16 type;
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u32 page_cnt;
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u32 page_cnt;
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u32 page_size;
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u64 page_msk;
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u32 npages;
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u32 npages;
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u32 stag;
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u32 stag;
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u64 length;
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u64 length;
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