Merge branch 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc2
From Simon Horman <horms@verge.net.au>: * This pull-request is based on the boards branch of the rensas tree which I have sent a pull-request for. The boards branch is in turn based on the soc branch. The reason for the soc2 -> boards -> soc branch progression is to satisfy dependencies of patches in the boards and soc branches. * 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: sh7372: sh7372_fsiXck_clk become non-global ARM: shmobile: sh7372: remove fsidivx clock Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Коммит
f292465242
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@ -295,10 +295,10 @@ struct clk sh7372_pllc2_clk = {
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};
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/* External input clock (pin name: FSIACK/FSIBCK ) */
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struct clk sh7372_fsiack_clk = {
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static struct clk fsiack_clk = {
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};
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struct clk sh7372_fsibck_clk = {
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static struct clk fsibck_clk = {
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};
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static struct clk *main_clks[] = {
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@ -314,8 +314,8 @@ static struct clk *main_clks[] = {
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&pllc1_clk,
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&pllc1_div2_clk,
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&sh7372_pllc2_clk,
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&sh7372_fsiack_clk,
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&sh7372_fsibck_clk,
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&fsiack_clk,
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&fsibck_clk,
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};
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static void div4_kick(struct clk *clk)
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@ -399,14 +399,14 @@ static struct clk *hdmi_parent[] = {
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static struct clk *fsiackcr_parent[] = {
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[0] = &pllc1_div2_clk,
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[1] = &sh7372_pllc2_clk,
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[2] = &sh7372_fsiack_clk, /* external input for FSI A */
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[2] = &fsiack_clk, /* external input for FSI A */
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[3] = NULL, /* setting prohibited */
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};
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static struct clk *fsibckcr_parent[] = {
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[0] = &pllc1_div2_clk,
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[1] = &sh7372_pllc2_clk,
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[2] = &sh7372_fsibck_clk, /* external input for FSI B */
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[2] = &fsibck_clk, /* external input for FSI B */
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[3] = NULL, /* setting prohibited */
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};
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@ -507,8 +507,8 @@ static struct clk_lookup lookups[] = {
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CLKDEV_CON_ID("pllc1_clk", &pllc1_clk),
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CLKDEV_CON_ID("pllc1_div2_clk", &pllc1_div2_clk),
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CLKDEV_CON_ID("pllc2_clk", &sh7372_pllc2_clk),
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CLKDEV_CON_ID("fsidiva", &fsidivs[FSIDIV_A]),
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CLKDEV_CON_ID("fsidivb", &fsidivs[FSIDIV_B]),
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CLKDEV_CON_ID("fsiack", &fsiack_clk),
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CLKDEV_CON_ID("fsibck", &fsibck_clk),
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/* DIV4 clocks */
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CLKDEV_CON_ID("i_clk", &div4_clks[DIV4_I]),
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@ -606,8 +606,8 @@ static struct clk_lookup lookups[] = {
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CLKDEV_ICK_ID("spu2", "sh_fsi2", &mstp_clks[MSTP223]),
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CLKDEV_ICK_ID("diva", "sh_fsi2", &fsidivs[FSIDIV_A]),
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CLKDEV_ICK_ID("divb", "sh_fsi2", &fsidivs[FSIDIV_B]),
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CLKDEV_ICK_ID("xcka", "sh_fsi2", &sh7372_fsiack_clk),
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CLKDEV_ICK_ID("xckb", "sh_fsi2", &sh7372_fsibck_clk),
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CLKDEV_ICK_ID("xcka", "sh_fsi2", &fsiack_clk),
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CLKDEV_ICK_ID("xckb", "sh_fsi2", &fsibck_clk),
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};
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void __init sh7372_clock_init(void)
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@ -477,8 +477,6 @@ extern struct clk sh7372_extal2_clk;
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extern struct clk sh7372_dv_clki_clk;
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extern struct clk sh7372_dv_clki_div2_clk;
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extern struct clk sh7372_pllc2_clk;
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extern struct clk sh7372_fsiack_clk;
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extern struct clk sh7372_fsibck_clk;
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extern void sh7372_intcs_suspend(void);
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extern void sh7372_intcs_resume(void);
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