ALSA: firewire-motu: sequence replay for source packet header
This commit takes ALSA firewire-motu driver to perform sequence replay for media clock recovery. Unlike the other types of device, the devices in MOTU FireWire series require two levels of sequence replay; the sequence of the number of data blocks per packet and the sequence of source packet header per data block. The former is already cached by ALSA IEC 61883-1/6 packet streaming engine and ready to be replayed. The latter is also cached by ALSA firewire-motu driver itself with a previous patch. This commit takes the driver to replay both of them from the caches. The sequence replay is tested with below models: * 828 mkII * Traveler * UltraLite * 828 mk3 FireWire * 828 mk3 Hybrid (except for high sampling transfer frequency * UltraLite mk3 FireWire * 4pre * AudioExpress Unfortunately, below models still don't generate better sound, requires more work: * 8pre * 828 mk3 Hybrid at high sampling transfer frequency As long as I know, MOTU protocol version 1 requires extra care of the format of data block, thus below models are not supported yet in this time: * 828 * 896 Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp> Link: https://lore.kernel.org/r/20210602013406.26442-4-o-takashi@sakamocchi.jp Signed-off-by: Takashi Iwai <tiwai@suse.de>
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Родитель
e50dfac81f
Коммит
f2ac3b8395
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@ -20,10 +20,6 @@
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#define CYCLES_PER_SECOND 8000
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#define TICKS_PER_SECOND (TICKS_PER_CYCLE * CYCLES_PER_SECOND)
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#define IEEE1394_SEC_MODULUS 128
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#define TRANSFER_DELAY_TICKS 0x2e00 /* 479.17 microseconds */
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#define CIP_SPH_CYCLE_SHIFT 12
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#define CIP_SPH_CYCLE_MASK 0x01fff000
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#define CIP_SPH_OFFSET_MASK 0x00000fff
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@ -35,14 +31,6 @@
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#define MIDI_BYTES_PER_SECOND 3093
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struct amdtp_motu {
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/* For timestamp processing. */
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unsigned int quotient_ticks_per_event;
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unsigned int remainder_ticks_per_event;
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unsigned int next_ticks;
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unsigned int next_accumulated;
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unsigned int next_cycles;
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unsigned int next_seconds;
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unsigned int pcm_chunks;
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unsigned int pcm_byte_offset;
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@ -61,20 +49,8 @@ int amdtp_motu_set_parameters(struct amdtp_stream *s, unsigned int rate,
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unsigned int midi_ports,
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struct snd_motu_packet_format *formats)
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{
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static const struct {
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unsigned int quotient_ticks_per_event;
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unsigned int remainder_ticks_per_event;
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} params[] = {
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[CIP_SFC_44100] = { 557, 123 },
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[CIP_SFC_48000] = { 512, 0 },
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[CIP_SFC_88200] = { 278, 282 },
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[CIP_SFC_96000] = { 256, 0 },
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[CIP_SFC_176400] = { 139, 141 },
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[CIP_SFC_192000] = { 128, 0 },
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};
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struct amdtp_motu *p = s->protocol;
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unsigned int pcm_chunks, data_chunks, data_block_quadlets;
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unsigned int delay;
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unsigned int mode;
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int i, err;
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@ -111,18 +87,6 @@ int amdtp_motu_set_parameters(struct amdtp_stream *s, unsigned int rate,
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p->midi_db_count = 0;
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p->midi_db_interval = rate / MIDI_BYTES_PER_SECOND;
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delay = TRANSFER_DELAY_TICKS;
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// For no-data or empty packets to adjust PCM sampling frequency.
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delay += TICKS_PER_SECOND * s->syt_interval / rate;
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p->next_seconds = 0;
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p->next_cycles = delay / TICKS_PER_CYCLE;
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p->quotient_ticks_per_event = params[s->sfc].quotient_ticks_per_event;
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p->remainder_ticks_per_event = params[s->sfc].remainder_ticks_per_event;
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p->next_ticks = delay % TICKS_PER_CYCLE;
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p->next_accumulated = 0;
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return 0;
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}
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@ -400,47 +364,26 @@ static unsigned int process_ir_ctx_payloads(struct amdtp_stream *s,
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return pcm_frames;
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}
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static inline void compute_next_elapse_from_start(struct amdtp_motu *p)
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static void write_sph(struct amdtp_motu_cache *cache, __be32 *buffer, unsigned int data_blocks,
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unsigned int data_block_quadlets)
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{
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p->next_accumulated += p->remainder_ticks_per_event;
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if (p->next_accumulated >= 441) {
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p->next_accumulated -= 441;
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p->next_ticks++;
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}
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p->next_ticks += p->quotient_ticks_per_event;
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if (p->next_ticks >= TICKS_PER_CYCLE) {
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p->next_ticks -= TICKS_PER_CYCLE;
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p->next_cycles++;
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}
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if (p->next_cycles >= CYCLES_PER_SECOND) {
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p->next_cycles -= CYCLES_PER_SECOND;
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p->next_seconds++;
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}
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if (p->next_seconds >= IEEE1394_SEC_MODULUS)
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p->next_seconds -= IEEE1394_SEC_MODULUS;
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}
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static void write_sph(struct amdtp_stream *s, __be32 *buffer, unsigned int data_blocks,
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const unsigned int rx_start_cycle)
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{
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struct amdtp_motu *p = s->protocol;
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unsigned int next_cycles;
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unsigned int i;
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u32 sph;
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unsigned int *event_offsets = cache->event_offsets;
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const unsigned int cache_size = cache->size;
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unsigned int cache_head = cache->head;
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unsigned int base_tick = cache->rx_cycle_count * TICKS_PER_CYCLE;
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int i;
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for (i = 0; i < data_blocks; i++) {
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next_cycles = (rx_start_cycle + p->next_cycles) % CYCLES_PER_SECOND;
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sph = ((next_cycles << CIP_SPH_CYCLE_SHIFT) | p->next_ticks) &
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(CIP_SPH_CYCLE_MASK | CIP_SPH_OFFSET_MASK);
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unsigned int tick = (base_tick + event_offsets[cache_head]) % TICKS_PER_SECOND;
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u32 sph = ((tick / TICKS_PER_CYCLE) << CIP_SPH_CYCLE_SHIFT) | (tick % TICKS_PER_CYCLE);
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*buffer = cpu_to_be32(sph);
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compute_next_elapse_from_start(p);
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buffer += s->data_block_quadlets;
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cache_head = (cache_head + 1) % cache_size;
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buffer += data_block_quadlets;
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}
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cache->head = cache_head;
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cache->rx_cycle_count = (cache->rx_cycle_count + 1) % CYCLES_PER_SECOND;
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}
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static unsigned int process_it_ctx_payloads(struct amdtp_stream *s,
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@ -448,11 +391,13 @@ static unsigned int process_it_ctx_payloads(struct amdtp_stream *s,
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unsigned int packets,
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struct snd_pcm_substream *pcm)
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{
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const unsigned int rx_start_cycle = s->domain->processing_cycle.rx_start;
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struct amdtp_motu *p = s->protocol;
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unsigned int pcm_frames = 0;
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int i;
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if (p->cache->rx_cycle_count == UINT_MAX)
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p->cache->rx_cycle_count = (s->domain->processing_cycle.rx_start % CYCLES_PER_SECOND);
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// For data block processing.
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for (i = 0; i < packets; ++i) {
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const struct pkt_desc *desc = descs + i;
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@ -471,7 +416,7 @@ static unsigned int process_it_ctx_payloads(struct amdtp_stream *s,
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// TODO: how to interact control messages between userspace?
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write_sph(s, buf, data_blocks, rx_start_cycle);
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write_sph(p->cache, buf, data_blocks, s->data_block_quadlets);
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}
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// For tracepoints.
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@ -274,8 +274,13 @@ int snd_motu_stream_start_duplex(struct snd_motu *motu)
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motu->cache.tail = 0;
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motu->cache.tx_cycle_count = UINT_MAX;
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motu->cache.head = 0;
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motu->cache.rx_cycle_count = UINT_MAX;
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err = amdtp_domain_start(&motu->domain, 0, false, false);
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// NOTE: The device requires both of replay; the sequence of the number of data
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// blocks per packet, and the sequence of source packet header per data block as
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// presentation time.
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err = amdtp_domain_start(&motu->domain, 0, true, false);
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if (err < 0)
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goto stop_streams;
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@ -44,6 +44,8 @@ struct amdtp_motu_cache {
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unsigned int size;
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unsigned int tail;
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unsigned int tx_cycle_count;
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unsigned int head;
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unsigned int rx_cycle_count;
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};
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struct snd_motu {
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