drm: sti: add DVO output connector
Digital Video Out connector driver LCD panels. Like HDMI and HDA it create bridge, encoder and connector drm object. Add binding description. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
This commit is contained in:
Benjamin Gaignard
Родитель
4e0cd68115
Коммит
f32c4c506f
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@ -83,6 +83,22 @@ sti-hda:
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- clock-names: names of the clocks listed in clocks property in the same
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order.
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sti-dvo:
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Required properties:
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must be a child of sti-tvout
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- compatible: "st,stih<chip>-dvo"
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- reg: Physical base address of the IP registers and length of memory mapped region.
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- reg-names: names of the mapped memory regions listed in regs property in
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the same order.
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- clocks: from common clock binding: handle hardware IP needed clocks, the
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number of clocks may depend of the SoC type.
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See ../clocks/clock-bindings.txt for details.
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- clock-names: names of the clocks listed in clocks property in the same
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order.
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- pinctrl-0: pin control handle
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- pinctrl-name: names of the pin control to use
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- sti,panel: phandle of the panel connected to the DVO output
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sti-hqvdp:
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must be a child of sti-display-subsystem
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Required properties:
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@ -198,6 +214,19 @@ Example:
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clock-names = "pix", "hddac";
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clocks = <&clockgen_c_vcc CLK_S_PIX_HD>, <&clockgen_c_vcc CLK_S_HDDAC>;
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};
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sti-dvo@8d00400 {
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compatible = "st,stih407-dvo";
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reg = <0x8d00400 0x200>;
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reg-names = "dvo-reg";
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clock-names = "dvo_pix", "dvo",
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"main_parent", "aux_parent";
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clocks = <&clk_s_d2_flexgen CLK_PIX_DVO>, <&clk_s_d2_flexgen CLK_DVO>,
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<&clk_s_d2_quadfs 0>, <&clk_s_d2_quadfs 1>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_dvo>;
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sti,panel = <&panel_dvo>;
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};
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};
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sti-hqvdp@9c000000 {
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@ -12,6 +12,9 @@ stihdmi-y := sti_hdmi.o \
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sti_hdmi_tx3g0c55phy.o \
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sti_hdmi_tx3g4c28phy.o \
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stidvo-y := sti_dvo.o \
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sti_awg_utils.o
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obj-$(CONFIG_DRM_STI) = \
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sti_vtg.o \
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sti_vtac.o \
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@ -20,4 +23,5 @@ obj-$(CONFIG_DRM_STI) = \
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sti_tvout.o \
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sticompositor.o \
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sti_hqvdp.o \
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stidvo.o \
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sti_drm_drv.o
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@ -0,0 +1,184 @@
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/*
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* Copyright (C) STMicroelectronics SA 2014
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* Author: Vincent Abriou <vincent.abriou@st.com> for STMicroelectronics.
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* License terms: GNU General Public License (GPL), version 2
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*/
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#include "sti_awg_utils.h"
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#define AWG_OPCODE_OFFSET 10
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enum opcode {
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SET,
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RPTSET,
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RPLSET,
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SKIP,
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STOP,
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REPEAT,
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REPLAY,
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JUMP,
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HOLD,
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};
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static int awg_generate_instr(enum opcode opcode,
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long int arg,
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long int mux_sel,
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long int data_en,
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struct awg_code_generation_params *fwparams)
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{
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u32 instruction = 0;
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u32 mux = (mux_sel << 8) & 0x1ff;
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u32 data_enable = (data_en << 9) & 0x2ff;
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long int arg_tmp = arg;
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/* skip, repeat and replay arg should not exceed 1023.
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* If user wants to exceed this value, the instruction should be
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* duplicate and arg should be adjust for each duplicated instruction.
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*/
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while (arg_tmp > 0) {
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arg = arg_tmp;
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if (fwparams->instruction_offset >= AWG_MAX_INST) {
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DRM_ERROR("too many number of instructions\n");
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return -EINVAL;
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}
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switch (opcode) {
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case SKIP:
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/* leave 'arg' + 1 pixel elapsing without changing
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* output bus */
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arg--; /* pixel adjustment */
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arg_tmp--;
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if (arg < 0) {
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/* SKIP instruction not needed */
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return 0;
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}
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if (arg == 0) {
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/* SKIP 0 not permitted but we want to skip 1
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* pixel. So we transform SKIP into SET
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* instruction */
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opcode = SET;
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arg = (arg << 24) >> 24;
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arg &= (0x0ff);
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break;
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}
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mux = 0;
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data_enable = 0;
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arg = (arg << 22) >> 22;
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arg &= (0x3ff);
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break;
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case REPEAT:
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case REPLAY:
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if (arg == 0) {
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/* REPEAT or REPLAY instruction not needed */
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return 0;
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}
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mux = 0;
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data_enable = 0;
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arg = (arg << 22) >> 22;
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arg &= (0x3ff);
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break;
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case JUMP:
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mux = 0;
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data_enable = 0;
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arg |= 0x40; /* for jump instruction 7th bit is 1 */
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arg = (arg << 22) >> 22;
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arg &= 0x3ff;
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break;
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case STOP:
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arg = 0;
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break;
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case SET:
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case RPTSET:
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case RPLSET:
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case HOLD:
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arg = (arg << 24) >> 24;
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arg &= (0x0ff);
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break;
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default:
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DRM_ERROR("instruction %d does not exist\n", opcode);
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return -EINVAL;
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}
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arg_tmp = arg_tmp - arg;
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arg = ((arg + mux) + data_enable);
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instruction = ((opcode) << AWG_OPCODE_OFFSET) | arg;
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fwparams->ram_code[fwparams->instruction_offset] =
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instruction & (0x3fff);
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fwparams->instruction_offset++;
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}
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return 0;
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}
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int sti_awg_generate_code_data_enable_mode(
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struct awg_code_generation_params *fwparams,
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struct awg_timing *timing)
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{
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long int val;
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long int data_en;
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int ret = 0;
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if (timing->trailing_lines > 0) {
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/* skip trailing lines */
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val = timing->blanking_level;
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data_en = 0;
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ret |= awg_generate_instr(RPLSET, val, 0, data_en, fwparams);
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val = timing->trailing_lines - 1;
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data_en = 0;
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ret |= awg_generate_instr(REPLAY, val, 0, data_en, fwparams);
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}
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if (timing->trailing_pixels > 0) {
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/* skip trailing pixel */
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val = timing->blanking_level;
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data_en = 0;
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ret |= awg_generate_instr(RPLSET, val, 0, data_en, fwparams);
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val = timing->trailing_pixels - 1;
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data_en = 0;
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ret |= awg_generate_instr(SKIP, val, 0, data_en, fwparams);
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}
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/* set DE signal high */
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val = timing->blanking_level;
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data_en = 1;
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ret |= awg_generate_instr((timing->trailing_pixels > 0) ? SET : RPLSET,
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val, 0, data_en, fwparams);
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if (timing->blanking_pixels > 0) {
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/* skip the number of active pixel */
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val = timing->active_pixels - 1;
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data_en = 1;
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ret |= awg_generate_instr(SKIP, val, 0, data_en, fwparams);
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/* set DE signal low */
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val = timing->blanking_level;
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data_en = 0;
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ret |= awg_generate_instr(SET, val, 0, data_en, fwparams);
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}
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/* replay the sequence as many active lines defined */
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val = timing->active_lines - 1;
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data_en = 0;
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ret |= awg_generate_instr(REPLAY, val, 0, data_en, fwparams);
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if (timing->blanking_lines > 0) {
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/* skip blanking lines */
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val = timing->blanking_level;
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data_en = 0;
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ret |= awg_generate_instr(RPLSET, val, 0, data_en, fwparams);
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val = timing->blanking_lines - 1;
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data_en = 0;
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ret |= awg_generate_instr(REPLAY, val, 0, data_en, fwparams);
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}
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return ret;
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}
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@ -0,0 +1,34 @@
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/*
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* Copyright (C) STMicroelectronics SA 2014
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* Author: Vincent Abriou <vincent.abriou@st.com> for STMicroelectronics.
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* License terms: GNU General Public License (GPL), version 2
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*/
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#ifndef _STI_AWG_UTILS_H_
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#define _STI_AWG_UTILS_H_
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#include <drm/drmP.h>
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#define AWG_MAX_INST 64
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struct awg_code_generation_params {
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u32 *ram_code;
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u8 instruction_offset;
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};
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struct awg_timing {
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u32 total_lines;
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u32 active_lines;
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u32 blanking_lines;
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u32 trailing_lines;
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u32 total_pixels;
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u32 active_pixels;
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u32 blanking_pixels;
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u32 trailing_pixels;
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u32 blanking_level;
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};
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int sti_awg_generate_code_data_enable_mode(
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struct awg_code_generation_params *fw_gen_params,
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struct awg_timing *timing);
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#endif
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@ -0,0 +1,551 @@
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/*
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* Copyright (C) STMicroelectronics SA 2014
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* Author: Vincent Abriou <vincent.abriou@st.com> for STMicroelectronics.
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* License terms: GNU General Public License (GPL), version 2
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*/
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#include <linux/clk.h>
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#include <linux/component.h>
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#include <linux/module.h>
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#include <linux/of_gpio.h>
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#include <linux/platform_device.h>
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#include <drm/drmP.h>
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#include <drm/drm_crtc_helper.h>
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#include <drm/drm_panel.h>
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#include "sti_awg_utils.h"
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#include "sti_mixer.h"
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/* DVO registers */
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#define DVO_AWG_DIGSYNC_CTRL 0x0000
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#define DVO_DOF_CFG 0x0004
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#define DVO_LUT_PROG_LOW 0x0008
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#define DVO_LUT_PROG_MID 0x000C
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#define DVO_LUT_PROG_HIGH 0x0010
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#define DVO_DIGSYNC_INSTR_I 0x0100
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#define DVO_AWG_CTRL_EN BIT(0)
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#define DVO_AWG_FRAME_BASED_SYNC BIT(2)
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#define DVO_DOF_EN_LOWBYTE BIT(0)
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#define DVO_DOF_EN_MIDBYTE BIT(1)
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#define DVO_DOF_EN_HIGHBYTE BIT(2)
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#define DVO_DOF_EN BIT(6)
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#define DVO_DOF_MOD_COUNT_SHIFT 8
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#define DVO_LUT_ZERO 0
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#define DVO_LUT_Y_G 1
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#define DVO_LUT_Y_G_DEL 2
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#define DVO_LUT_CB_B 3
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#define DVO_LUT_CB_B_DEL 4
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#define DVO_LUT_CR_R 5
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#define DVO_LUT_CR_R_DEL 6
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#define DVO_LUT_HOLD 7
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struct dvo_config {
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u32 flags;
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u32 lowbyte;
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u32 midbyte;
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u32 highbyte;
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int (*awg_fwgen_fct)(
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struct awg_code_generation_params *fw_gen_params,
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struct awg_timing *timing);
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};
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static struct dvo_config rgb_24bit_de_cfg = {
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.flags = (0L << DVO_DOF_MOD_COUNT_SHIFT),
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.lowbyte = DVO_LUT_CR_R,
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.midbyte = DVO_LUT_Y_G,
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.highbyte = DVO_LUT_CB_B,
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.awg_fwgen_fct = sti_awg_generate_code_data_enable_mode,
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};
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/**
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* STI digital video output structure
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*
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* @dev: driver device
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* @drm_dev: pointer to drm device
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* @mode: current display mode selected
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* @regs: dvo registers
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* @clk_pix: pixel clock for dvo
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* @clk: clock for dvo
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* @clk_main_parent: dvo parent clock if main path used
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* @clk_aux_parent: dvo parent clock if aux path used
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* @panel_node: panel node reference from device tree
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* @panel: reference to the panel connected to the dvo
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* @enabled: true if dvo is enabled else false
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* @encoder: drm_encoder it is bound
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*/
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struct sti_dvo {
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struct device dev;
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struct drm_device *drm_dev;
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struct drm_display_mode mode;
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void __iomem *regs;
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struct clk *clk_pix;
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struct clk *clk;
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struct clk *clk_main_parent;
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struct clk *clk_aux_parent;
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struct device_node *panel_node;
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struct drm_panel *panel;
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struct dvo_config *config;
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bool enabled;
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struct drm_encoder *encoder;
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};
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struct sti_dvo_connector {
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struct drm_connector drm_connector;
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struct drm_encoder *encoder;
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struct sti_dvo *dvo;
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};
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#define to_sti_dvo_connector(x) \
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container_of(x, struct sti_dvo_connector, drm_connector)
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#define BLANKING_LEVEL 16
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int dvo_awg_generate_code(struct sti_dvo *dvo, u8 *ram_size, u32 *ram_code)
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{
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struct drm_display_mode *mode = &dvo->mode;
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struct dvo_config *config = dvo->config;
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struct awg_code_generation_params fw_gen_params;
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struct awg_timing timing;
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fw_gen_params.ram_code = ram_code;
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fw_gen_params.instruction_offset = 0;
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timing.total_lines = mode->vtotal;
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timing.active_lines = mode->vdisplay;
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timing.blanking_lines = mode->vsync_start - mode->vdisplay;
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timing.trailing_lines = mode->vtotal - mode->vsync_start;
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timing.total_pixels = mode->htotal;
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timing.active_pixels = mode->hdisplay;
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timing.blanking_pixels = mode->hsync_start - mode->hdisplay;
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timing.trailing_pixels = mode->htotal - mode->hsync_start;
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timing.blanking_level = BLANKING_LEVEL;
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if (config->awg_fwgen_fct(&fw_gen_params, &timing)) {
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DRM_ERROR("AWG firmware not properly generated\n");
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return -EINVAL;
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}
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*ram_size = fw_gen_params.instruction_offset;
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return 0;
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}
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/* Configure AWG, writing instructions
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*
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* @dvo: pointer to DVO structure
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* @awg_ram_code: pointer to AWG instructions table
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* @nb: nb of AWG instructions
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*/
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static void dvo_awg_configure(struct sti_dvo *dvo, u32 *awg_ram_code, int nb)
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{
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int i;
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DRM_DEBUG_DRIVER("\n");
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for (i = 0; i < nb; i++)
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writel(awg_ram_code[i],
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dvo->regs + DVO_DIGSYNC_INSTR_I + i * 4);
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for (i = nb; i < AWG_MAX_INST; i++)
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writel(0, dvo->regs + DVO_DIGSYNC_INSTR_I + i * 4);
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writel(DVO_AWG_CTRL_EN, dvo->regs + DVO_AWG_DIGSYNC_CTRL);
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}
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static void sti_dvo_disable(struct drm_bridge *bridge)
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{
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struct sti_dvo *dvo = bridge->driver_private;
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if (!dvo->enabled)
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return;
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DRM_DEBUG_DRIVER("\n");
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if (dvo->config->awg_fwgen_fct)
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writel(0x00000000, dvo->regs + DVO_AWG_DIGSYNC_CTRL);
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writel(0x00000000, dvo->regs + DVO_DOF_CFG);
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if (dvo->panel)
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dvo->panel->funcs->disable(dvo->panel);
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/* Disable/unprepare dvo clock */
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clk_disable_unprepare(dvo->clk_pix);
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clk_disable_unprepare(dvo->clk);
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dvo->enabled = false;
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}
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static void sti_dvo_pre_enable(struct drm_bridge *bridge)
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{
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struct sti_dvo *dvo = bridge->driver_private;
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struct dvo_config *config = dvo->config;
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u32 val;
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DRM_DEBUG_DRIVER("\n");
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if (dvo->enabled)
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return;
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|
||||
/* Make sure DVO is disabled */
|
||||
writel(0x00000000, dvo->regs + DVO_DOF_CFG);
|
||||
writel(0x00000000, dvo->regs + DVO_AWG_DIGSYNC_CTRL);
|
||||
|
||||
if (config->awg_fwgen_fct) {
|
||||
u8 nb_instr;
|
||||
u32 awg_ram_code[AWG_MAX_INST];
|
||||
/* Configure AWG */
|
||||
if (!dvo_awg_generate_code(dvo, &nb_instr, awg_ram_code))
|
||||
dvo_awg_configure(dvo, awg_ram_code, nb_instr);
|
||||
else
|
||||
return;
|
||||
}
|
||||
|
||||
/* Prepare/enable clocks */
|
||||
if (clk_prepare_enable(dvo->clk_pix))
|
||||
DRM_ERROR("Failed to prepare/enable dvo_pix clk\n");
|
||||
if (clk_prepare_enable(dvo->clk))
|
||||
DRM_ERROR("Failed to prepare/enable dvo clk\n");
|
||||
|
||||
if (dvo->panel)
|
||||
dvo->panel->funcs->enable(dvo->panel);
|
||||
|
||||
/* Set LUT */
|
||||
writel(config->lowbyte, dvo->regs + DVO_LUT_PROG_LOW);
|
||||
writel(config->midbyte, dvo->regs + DVO_LUT_PROG_MID);
|
||||
writel(config->highbyte, dvo->regs + DVO_LUT_PROG_HIGH);
|
||||
|
||||
/* Digital output formatter config */
|
||||
val = (config->flags | DVO_DOF_EN);
|
||||
writel(val, dvo->regs + DVO_DOF_CFG);
|
||||
|
||||
dvo->enabled = true;
|
||||
}
|
||||
|
||||
static void sti_dvo_set_mode(struct drm_bridge *bridge,
|
||||
struct drm_display_mode *mode,
|
||||
struct drm_display_mode *adjusted_mode)
|
||||
{
|
||||
struct sti_dvo *dvo = bridge->driver_private;
|
||||
struct sti_mixer *mixer = to_sti_mixer(dvo->encoder->crtc);
|
||||
int rate = mode->clock * 1000;
|
||||
struct clk *clkp;
|
||||
int ret;
|
||||
|
||||
DRM_DEBUG_DRIVER("\n");
|
||||
|
||||
memcpy(&dvo->mode, mode, sizeof(struct drm_display_mode));
|
||||
|
||||
/* According to the path used (main or aux), the dvo clocks should
|
||||
* have a different parent clock. */
|
||||
if (mixer->id == STI_MIXER_MAIN)
|
||||
clkp = dvo->clk_main_parent;
|
||||
else
|
||||
clkp = dvo->clk_aux_parent;
|
||||
|
||||
if (clkp) {
|
||||
clk_set_parent(dvo->clk_pix, clkp);
|
||||
clk_set_parent(dvo->clk, clkp);
|
||||
}
|
||||
|
||||
/* DVO clocks = compositor clock */
|
||||
ret = clk_set_rate(dvo->clk_pix, rate);
|
||||
if (ret < 0) {
|
||||
DRM_ERROR("Cannot set rate (%dHz) for dvo_pix clk\n", rate);
|
||||
return;
|
||||
}
|
||||
|
||||
ret = clk_set_rate(dvo->clk, rate);
|
||||
if (ret < 0) {
|
||||
DRM_ERROR("Cannot set rate (%dHz) for dvo clk\n", rate);
|
||||
return;
|
||||
}
|
||||
|
||||
/* For now, we only support 24bit data enable (DE) synchro format */
|
||||
dvo->config = &rgb_24bit_de_cfg;
|
||||
}
|
||||
|
||||
static void sti_dvo_bridge_nope(struct drm_bridge *bridge)
|
||||
{
|
||||
/* do nothing */
|
||||
}
|
||||
|
||||
static void sti_dvo_brigde_destroy(struct drm_bridge *bridge)
|
||||
{
|
||||
drm_bridge_cleanup(bridge);
|
||||
kfree(bridge);
|
||||
}
|
||||
|
||||
static const struct drm_bridge_funcs sti_dvo_bridge_funcs = {
|
||||
.pre_enable = sti_dvo_pre_enable,
|
||||
.enable = sti_dvo_bridge_nope,
|
||||
.disable = sti_dvo_disable,
|
||||
.post_disable = sti_dvo_bridge_nope,
|
||||
.mode_set = sti_dvo_set_mode,
|
||||
.destroy = sti_dvo_brigde_destroy,
|
||||
};
|
||||
|
||||
static int sti_dvo_connector_get_modes(struct drm_connector *connector)
|
||||
{
|
||||
struct sti_dvo_connector *dvo_connector
|
||||
= to_sti_dvo_connector(connector);
|
||||
struct sti_dvo *dvo = dvo_connector->dvo;
|
||||
|
||||
if (dvo->panel)
|
||||
return dvo->panel->funcs->get_modes(dvo->panel);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#define CLK_TOLERANCE_HZ 50
|
||||
|
||||
static int sti_dvo_connector_mode_valid(struct drm_connector *connector,
|
||||
struct drm_display_mode *mode)
|
||||
{
|
||||
int target = mode->clock * 1000;
|
||||
int target_min = target - CLK_TOLERANCE_HZ;
|
||||
int target_max = target + CLK_TOLERANCE_HZ;
|
||||
int result;
|
||||
struct sti_dvo_connector *dvo_connector
|
||||
= to_sti_dvo_connector(connector);
|
||||
struct sti_dvo *dvo = dvo_connector->dvo;
|
||||
|
||||
result = clk_round_rate(dvo->clk_pix, target);
|
||||
|
||||
DRM_DEBUG_DRIVER("target rate = %d => available rate = %d\n",
|
||||
target, result);
|
||||
|
||||
if ((result < target_min) || (result > target_max)) {
|
||||
DRM_DEBUG_DRIVER("dvo pixclk=%d not supported\n", target);
|
||||
return MODE_BAD;
|
||||
}
|
||||
|
||||
return MODE_OK;
|
||||
}
|
||||
|
||||
struct drm_encoder *sti_dvo_best_encoder(struct drm_connector *connector)
|
||||
{
|
||||
struct sti_dvo_connector *dvo_connector
|
||||
= to_sti_dvo_connector(connector);
|
||||
|
||||
/* Best encoder is the one associated during connector creation */
|
||||
return dvo_connector->encoder;
|
||||
}
|
||||
|
||||
static struct drm_connector_helper_funcs sti_dvo_connector_helper_funcs = {
|
||||
.get_modes = sti_dvo_connector_get_modes,
|
||||
.mode_valid = sti_dvo_connector_mode_valid,
|
||||
.best_encoder = sti_dvo_best_encoder,
|
||||
};
|
||||
|
||||
static enum drm_connector_status
|
||||
sti_dvo_connector_detect(struct drm_connector *connector, bool force)
|
||||
{
|
||||
struct sti_dvo_connector *dvo_connector
|
||||
= to_sti_dvo_connector(connector);
|
||||
struct sti_dvo *dvo = dvo_connector->dvo;
|
||||
|
||||
DRM_DEBUG_DRIVER("\n");
|
||||
|
||||
if (!dvo->panel)
|
||||
dvo->panel = of_drm_find_panel(dvo->panel_node);
|
||||
|
||||
if (dvo->panel)
|
||||
if (!drm_panel_attach(dvo->panel, connector))
|
||||
return connector_status_connected;
|
||||
|
||||
return connector_status_disconnected;
|
||||
}
|
||||
|
||||
static void sti_dvo_connector_destroy(struct drm_connector *connector)
|
||||
{
|
||||
struct sti_dvo_connector *dvo_connector
|
||||
= to_sti_dvo_connector(connector);
|
||||
|
||||
drm_connector_unregister(connector);
|
||||
drm_connector_cleanup(connector);
|
||||
kfree(dvo_connector);
|
||||
}
|
||||
|
||||
static struct drm_connector_funcs sti_dvo_connector_funcs = {
|
||||
.dpms = drm_helper_connector_dpms,
|
||||
.fill_modes = drm_helper_probe_single_connector_modes,
|
||||
.detect = sti_dvo_connector_detect,
|
||||
.destroy = sti_dvo_connector_destroy,
|
||||
};
|
||||
|
||||
static struct drm_encoder *sti_dvo_find_encoder(struct drm_device *dev)
|
||||
{
|
||||
struct drm_encoder *encoder;
|
||||
|
||||
list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
|
||||
if (encoder->encoder_type == DRM_MODE_ENCODER_LVDS)
|
||||
return encoder;
|
||||
}
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static int sti_dvo_bind(struct device *dev, struct device *master, void *data)
|
||||
{
|
||||
struct sti_dvo *dvo = dev_get_drvdata(dev);
|
||||
struct drm_device *drm_dev = data;
|
||||
struct drm_encoder *encoder;
|
||||
struct sti_dvo_connector *connector;
|
||||
struct drm_connector *drm_connector;
|
||||
struct drm_bridge *bridge;
|
||||
int err;
|
||||
|
||||
/* Set the drm device handle */
|
||||
dvo->drm_dev = drm_dev;
|
||||
|
||||
encoder = sti_dvo_find_encoder(drm_dev);
|
||||
if (!encoder)
|
||||
return -ENOMEM;
|
||||
|
||||
connector = devm_kzalloc(dev, sizeof(*connector), GFP_KERNEL);
|
||||
if (!connector)
|
||||
return -ENOMEM;
|
||||
|
||||
connector->dvo = dvo;
|
||||
|
||||
bridge = devm_kzalloc(dev, sizeof(*bridge), GFP_KERNEL);
|
||||
if (!bridge)
|
||||
return -ENOMEM;
|
||||
|
||||
bridge->driver_private = dvo;
|
||||
drm_bridge_init(drm_dev, bridge, &sti_dvo_bridge_funcs);
|
||||
|
||||
encoder->bridge = bridge;
|
||||
connector->encoder = encoder;
|
||||
dvo->encoder = encoder;
|
||||
|
||||
drm_connector = (struct drm_connector *)connector;
|
||||
|
||||
drm_connector->polled = DRM_CONNECTOR_POLL_HPD;
|
||||
|
||||
drm_connector_init(drm_dev, drm_connector,
|
||||
&sti_dvo_connector_funcs, DRM_MODE_CONNECTOR_LVDS);
|
||||
drm_connector_helper_add(drm_connector,
|
||||
&sti_dvo_connector_helper_funcs);
|
||||
|
||||
err = drm_connector_register(drm_connector);
|
||||
if (err)
|
||||
goto err_connector;
|
||||
|
||||
err = drm_mode_connector_attach_encoder(drm_connector, encoder);
|
||||
if (err) {
|
||||
DRM_ERROR("Failed to attach a connector to a encoder\n");
|
||||
goto err_sysfs;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
err_sysfs:
|
||||
drm_connector_unregister(drm_connector);
|
||||
err_connector:
|
||||
drm_bridge_cleanup(bridge);
|
||||
drm_connector_cleanup(drm_connector);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
static void sti_dvo_unbind(struct device *dev,
|
||||
struct device *master, void *data)
|
||||
{
|
||||
/* do nothing */
|
||||
}
|
||||
|
||||
static const struct component_ops sti_dvo_ops = {
|
||||
.bind = sti_dvo_bind,
|
||||
.unbind = sti_dvo_unbind,
|
||||
};
|
||||
|
||||
static int sti_dvo_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct device *dev = &pdev->dev;
|
||||
struct sti_dvo *dvo;
|
||||
struct resource *res;
|
||||
struct device_node *np = dev->of_node;
|
||||
|
||||
DRM_INFO("%s\n", __func__);
|
||||
|
||||
dvo = devm_kzalloc(dev, sizeof(*dvo), GFP_KERNEL);
|
||||
if (!dvo) {
|
||||
DRM_ERROR("Failed to allocate memory for DVO\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
dvo->dev = pdev->dev;
|
||||
|
||||
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dvo-reg");
|
||||
if (!res) {
|
||||
DRM_ERROR("Invalid dvo resource\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
dvo->regs = devm_ioremap_nocache(dev, res->start,
|
||||
resource_size(res));
|
||||
if (IS_ERR(dvo->regs))
|
||||
return PTR_ERR(dvo->regs);
|
||||
|
||||
dvo->clk_pix = devm_clk_get(dev, "dvo_pix");
|
||||
if (IS_ERR(dvo->clk_pix)) {
|
||||
DRM_ERROR("Cannot get dvo_pix clock\n");
|
||||
return PTR_ERR(dvo->clk_pix);
|
||||
}
|
||||
|
||||
dvo->clk = devm_clk_get(dev, "dvo");
|
||||
if (IS_ERR(dvo->clk)) {
|
||||
DRM_ERROR("Cannot get dvo clock\n");
|
||||
return PTR_ERR(dvo->clk);
|
||||
}
|
||||
|
||||
dvo->clk_main_parent = devm_clk_get(dev, "main_parent");
|
||||
if (IS_ERR(dvo->clk_main_parent)) {
|
||||
DRM_DEBUG_DRIVER("Cannot get main_parent clock\n");
|
||||
dvo->clk_main_parent = NULL;
|
||||
}
|
||||
|
||||
dvo->clk_aux_parent = devm_clk_get(dev, "aux_parent");
|
||||
if (IS_ERR(dvo->clk_aux_parent)) {
|
||||
DRM_DEBUG_DRIVER("Cannot get aux_parent clock\n");
|
||||
dvo->clk_aux_parent = NULL;
|
||||
}
|
||||
|
||||
dvo->panel_node = of_parse_phandle(np, "sti,panel", 0);
|
||||
if (!dvo->panel_node)
|
||||
DRM_ERROR("No panel associated to the dvo output\n");
|
||||
|
||||
platform_set_drvdata(pdev, dvo);
|
||||
|
||||
return component_add(&pdev->dev, &sti_dvo_ops);
|
||||
}
|
||||
|
||||
static int sti_dvo_remove(struct platform_device *pdev)
|
||||
{
|
||||
component_del(&pdev->dev, &sti_dvo_ops);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct of_device_id dvo_of_match[] = {
|
||||
{ .compatible = "st,stih407-dvo", },
|
||||
{ /* end node */ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, dvo_of_match);
|
||||
|
||||
struct platform_driver sti_dvo_driver = {
|
||||
.driver = {
|
||||
.name = "sti-dvo",
|
||||
.owner = THIS_MODULE,
|
||||
.of_match_table = dvo_of_match,
|
||||
},
|
||||
.probe = sti_dvo_probe,
|
||||
.remove = sti_dvo_remove,
|
||||
};
|
||||
|
||||
module_platform_driver(sti_dvo_driver);
|
||||
|
||||
MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>");
|
||||
MODULE_DESCRIPTION("STMicroelectronics SoC DRM driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
|
@ -48,6 +48,9 @@
|
|||
#define TVO_HDMI_CLIP_VALUE_R_CR 0x514
|
||||
#define TVO_HDMI_SYNC_SEL 0x518
|
||||
#define TVO_HDMI_DFV_OBS 0x540
|
||||
#define TVO_VIP_DVO 0x600
|
||||
#define TVO_DVO_SYNC_SEL 0x618
|
||||
#define TVO_DVO_CONFIG 0x620
|
||||
|
||||
#define TVO_IN_FMT_SIGNED BIT(0)
|
||||
#define TVO_SYNC_EXT BIT(4)
|
||||
|
|
@ -98,6 +101,9 @@
|
|||
|
||||
#define TVO_SYNC_HD_DCS_SHIFT 8
|
||||
|
||||
#define TVO_SYNC_DVO_PAD_HSYNC_SHIFT 8
|
||||
#define TVO_SYNC_DVO_PAD_VSYNC_SHIFT 16
|
||||
|
||||
#define ENCODER_CRTC_MASK (BIT(0) | BIT(1))
|
||||
|
||||
/* enum listing the supported output data format */
|
||||
|
|
@ -113,6 +119,7 @@ struct sti_tvout {
|
|||
struct reset_control *reset;
|
||||
struct drm_encoder *hdmi;
|
||||
struct drm_encoder *hda;
|
||||
struct drm_encoder *dvo;
|
||||
};
|
||||
|
||||
struct sti_tvout_encoder {
|
||||
|
|
@ -261,6 +268,66 @@ static void tvout_vip_set_in_vid_fmt(struct sti_tvout *tvout,
|
|||
tvout_write(tvout, val, reg);
|
||||
}
|
||||
|
||||
/**
|
||||
* Start VIP block for DVO output
|
||||
*
|
||||
* @tvout: pointer on tvout structure
|
||||
* @main_path: true if main path has to be used in the vip configuration
|
||||
* else aux path is used.
|
||||
*/
|
||||
static void tvout_dvo_start(struct sti_tvout *tvout, bool main_path)
|
||||
{
|
||||
struct device_node *node = tvout->dev->of_node;
|
||||
bool sel_input_logic_inverted = false;
|
||||
u32 tvo_in_vid_format;
|
||||
int val;
|
||||
|
||||
dev_dbg(tvout->dev, "%s\n", __func__);
|
||||
|
||||
if (main_path) {
|
||||
DRM_DEBUG_DRIVER("main vip for DVO\n");
|
||||
/* Select the input sync for dvo = VTG set 4 */
|
||||
val = TVO_SYNC_MAIN_VTG_SET_4 << TVO_SYNC_DVO_PAD_VSYNC_SHIFT;
|
||||
val |= TVO_SYNC_MAIN_VTG_SET_4 << TVO_SYNC_DVO_PAD_HSYNC_SHIFT;
|
||||
val |= TVO_SYNC_MAIN_VTG_SET_4;
|
||||
tvout_write(tvout, val, TVO_DVO_SYNC_SEL);
|
||||
tvo_in_vid_format = TVO_MAIN_IN_VID_FORMAT;
|
||||
} else {
|
||||
DRM_DEBUG_DRIVER("aux vip for DVO\n");
|
||||
/* Select the input sync for dvo = VTG set 4 */
|
||||
val = TVO_SYNC_AUX_VTG_SET_4 << TVO_SYNC_DVO_PAD_VSYNC_SHIFT;
|
||||
val |= TVO_SYNC_AUX_VTG_SET_4 << TVO_SYNC_DVO_PAD_HSYNC_SHIFT;
|
||||
val |= TVO_SYNC_AUX_VTG_SET_4;
|
||||
tvout_write(tvout, val, TVO_DVO_SYNC_SEL);
|
||||
tvo_in_vid_format = TVO_AUX_IN_VID_FORMAT;
|
||||
}
|
||||
|
||||
/* Set color channel order */
|
||||
tvout_vip_set_color_order(tvout, TVO_VIP_DVO,
|
||||
TVO_VIP_REORDER_CR_R_SEL,
|
||||
TVO_VIP_REORDER_Y_G_SEL,
|
||||
TVO_VIP_REORDER_CB_B_SEL);
|
||||
|
||||
/* Set clipping mode (Limited range RGB/Y) */
|
||||
tvout_vip_set_clip_mode(tvout, TVO_VIP_DVO,
|
||||
TVO_VIP_CLIP_LIMITED_RANGE_RGB_Y);
|
||||
|
||||
/* Set round mode (rounded to 8-bit per component) */
|
||||
tvout_vip_set_rnd(tvout, TVO_VIP_DVO, TVO_VIP_RND_8BIT_ROUNDED);
|
||||
|
||||
if (of_device_is_compatible(node, "st,stih407-tvout")) {
|
||||
/* Set input video format */
|
||||
tvout_vip_set_in_vid_fmt(tvout, tvo_in_vid_format,
|
||||
TVO_IN_FMT_SIGNED);
|
||||
sel_input_logic_inverted = true;
|
||||
}
|
||||
|
||||
/* Input selection */
|
||||
tvout_vip_set_sel_input(tvout, TVO_VIP_DVO, main_path,
|
||||
sel_input_logic_inverted,
|
||||
STI_TVOUT_VIDEO_OUT_RGB);
|
||||
}
|
||||
|
||||
/**
|
||||
* Start VIP block for HDMI output
|
||||
*
|
||||
|
|
@ -402,6 +469,56 @@ static const struct drm_encoder_funcs sti_tvout_encoder_funcs = {
|
|||
.destroy = sti_tvout_encoder_destroy,
|
||||
};
|
||||
|
||||
static void sti_dvo_encoder_commit(struct drm_encoder *encoder)
|
||||
{
|
||||
struct sti_tvout *tvout = to_sti_tvout(encoder);
|
||||
|
||||
tvout_dvo_start(tvout, sti_drm_crtc_is_main(encoder->crtc));
|
||||
}
|
||||
|
||||
static void sti_dvo_encoder_disable(struct drm_encoder *encoder)
|
||||
{
|
||||
struct sti_tvout *tvout = to_sti_tvout(encoder);
|
||||
|
||||
/* Reset VIP register */
|
||||
tvout_write(tvout, 0x0, TVO_VIP_DVO);
|
||||
}
|
||||
|
||||
static const struct drm_encoder_helper_funcs sti_dvo_encoder_helper_funcs = {
|
||||
.dpms = sti_tvout_encoder_dpms,
|
||||
.mode_fixup = sti_tvout_encoder_mode_fixup,
|
||||
.mode_set = sti_tvout_encoder_mode_set,
|
||||
.prepare = sti_tvout_encoder_prepare,
|
||||
.commit = sti_dvo_encoder_commit,
|
||||
.disable = sti_dvo_encoder_disable,
|
||||
};
|
||||
|
||||
static struct drm_encoder *
|
||||
sti_tvout_create_dvo_encoder(struct drm_device *dev,
|
||||
struct sti_tvout *tvout)
|
||||
{
|
||||
struct sti_tvout_encoder *encoder;
|
||||
struct drm_encoder *drm_encoder;
|
||||
|
||||
encoder = devm_kzalloc(tvout->dev, sizeof(*encoder), GFP_KERNEL);
|
||||
if (!encoder)
|
||||
return NULL;
|
||||
|
||||
encoder->tvout = tvout;
|
||||
|
||||
drm_encoder = (struct drm_encoder *)encoder;
|
||||
|
||||
drm_encoder->possible_crtcs = ENCODER_CRTC_MASK;
|
||||
drm_encoder->possible_clones = 1 << 0;
|
||||
|
||||
drm_encoder_init(dev, drm_encoder,
|
||||
&sti_tvout_encoder_funcs, DRM_MODE_ENCODER_LVDS);
|
||||
|
||||
drm_encoder_helper_add(drm_encoder, &sti_dvo_encoder_helper_funcs);
|
||||
|
||||
return drm_encoder;
|
||||
}
|
||||
|
||||
static void sti_hda_encoder_commit(struct drm_encoder *encoder)
|
||||
{
|
||||
struct sti_tvout *tvout = to_sti_tvout(encoder);
|
||||
|
|
@ -508,6 +625,7 @@ static void sti_tvout_create_encoders(struct drm_device *dev,
|
|||
{
|
||||
tvout->hdmi = sti_tvout_create_hdmi_encoder(dev, tvout);
|
||||
tvout->hda = sti_tvout_create_hda_encoder(dev, tvout);
|
||||
tvout->dvo = sti_tvout_create_dvo_encoder(dev, tvout);
|
||||
}
|
||||
|
||||
static void sti_tvout_destroy_encoders(struct sti_tvout *tvout)
|
||||
|
|
|
|||
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