KVM: PPC: Book3S 64: Move GUEST_MODE_SKIP test into KVM
Move the GUEST_MODE_SKIP logic into KVM code. This is quite a KVM internal detail that has no real need to be in common handlers. Add a comment explaining the what and why of KVM "skip" interrupts. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Reviewed-by: Daniel Axtens <dja@axtens.net> Reviewed-by: Fabiano Rosas <farosas@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20210528090752.3542186-3-npiggin@gmail.com
This commit is contained in:
Nicholas Piggin
Michael Ellerman
Родитель
f36011569b
Коммит
f33e0702d9
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@ -133,7 +133,6 @@ name:
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#define IBRANCH_TO_COMMON .L_IBRANCH_TO_COMMON_\name\() /* ENTRY branch to common */
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#define IREALMODE_COMMON .L_IREALMODE_COMMON_\name\() /* Common runs in realmode */
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#define IMASK .L_IMASK_\name\() /* IRQ soft-mask bit */
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#define IKVM_SKIP .L_IKVM_SKIP_\name\() /* Generate KVM skip handler */
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#define IKVM_REAL .L_IKVM_REAL_\name\() /* Real entry tests KVM */
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#define __IKVM_REAL(name) .L_IKVM_REAL_ ## name
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#define IKVM_VIRT .L_IKVM_VIRT_\name\() /* Virt entry tests KVM */
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@ -190,9 +189,6 @@ do_define_int n
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.ifndef IMASK
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IMASK=0
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.endif
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.ifndef IKVM_SKIP
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IKVM_SKIP=0
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.endif
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.ifndef IKVM_REAL
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IKVM_REAL=0
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.endif
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@ -250,15 +246,10 @@ do_define_int n
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.balign IFETCH_ALIGN_BYTES
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\name\()_kvm:
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.if IKVM_SKIP
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cmpwi r10,KVM_GUEST_MODE_SKIP
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beq 89f
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.else
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BEGIN_FTR_SECTION
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ld r10,IAREA+EX_CFAR(r13)
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std r10,HSTATE_CFAR(r13)
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END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
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.endif
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ld r10,IAREA+EX_CTR(r13)
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mtctr r10
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@ -285,27 +276,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
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ori r12,r12,(IVEC)
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.endif
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b kvmppc_interrupt
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.if IKVM_SKIP
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89: mtocrf 0x80,r9
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ld r10,IAREA+EX_CTR(r13)
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mtctr r10
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ld r9,IAREA+EX_R9(r13)
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ld r10,IAREA+EX_R10(r13)
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ld r11,IAREA+EX_R11(r13)
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ld r12,IAREA+EX_R12(r13)
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.if IHSRR_IF_HVMODE
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BEGIN_FTR_SECTION
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b kvmppc_skip_Hinterrupt
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FTR_SECTION_ELSE
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b kvmppc_skip_interrupt
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ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
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.elseif IHSRR
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b kvmppc_skip_Hinterrupt
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.else
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b kvmppc_skip_interrupt
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.endif
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.endif
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.endm
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#else
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@ -1064,7 +1034,6 @@ INT_DEFINE_BEGIN(machine_check)
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ISET_RI=0
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IDAR=1
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IDSISR=1
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IKVM_SKIP=1
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IKVM_REAL=1
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INT_DEFINE_END(machine_check)
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@ -1336,7 +1305,6 @@ INT_DEFINE_BEGIN(data_access)
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IVEC=0x300
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IDAR=1
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IDSISR=1
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IKVM_SKIP=1
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IKVM_REAL=1
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INT_DEFINE_END(data_access)
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@ -1390,7 +1358,6 @@ ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX)
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INT_DEFINE_BEGIN(data_access_slb)
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IVEC=0x380
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IDAR=1
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IKVM_SKIP=1
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IKVM_REAL=1
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INT_DEFINE_END(data_access_slb)
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@ -2057,7 +2024,6 @@ INT_DEFINE_BEGIN(h_data_storage)
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IHSRR=1
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IDAR=1
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IDSISR=1
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IKVM_SKIP=1
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IKVM_REAL=1
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IKVM_VIRT=1
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INT_DEFINE_END(h_data_storage)
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@ -3003,32 +2969,6 @@ EXPORT_SYMBOL(do_uaccess_flush)
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MASKED_INTERRUPT
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MASKED_INTERRUPT hsrr=1
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#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
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kvmppc_skip_interrupt:
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/*
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* Here all GPRs are unchanged from when the interrupt happened
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* except for r13, which is saved in SPRG_SCRATCH0.
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*/
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mfspr r13, SPRN_SRR0
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addi r13, r13, 4
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mtspr SPRN_SRR0, r13
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GET_SCRATCH0(r13)
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RFI_TO_KERNEL
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b .
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kvmppc_skip_Hinterrupt:
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/*
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* Here all GPRs are unchanged from when the interrupt happened
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* except for r13, which is saved in SPRG_SCRATCH0.
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*/
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mfspr r13, SPRN_HSRR0
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addi r13, r13, 4
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mtspr SPRN_HSRR0, r13
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GET_SCRATCH0(r13)
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HRFI_TO_KERNEL
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b .
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#endif
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/*
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* Relocation-on interrupts: A subset of the interrupts can be delivered
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* with IR=1/DR=1, if AIL==2 and MSR.HV won't be changed by delivering
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@ -1,6 +1,7 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <asm/asm-offsets.h>
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#include <asm/cache.h>
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#include <asm/exception-64s.h>
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#include <asm/kvm_asm.h>
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#include <asm/kvm_book3s_asm.h>
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#include <asm/ppc_asm.h>
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@ -20,9 +21,12 @@ kvmppc_interrupt:
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* guest R12 saved in shadow VCPU SCRATCH0
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* guest R13 saved in SPRN_SCRATCH0
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*/
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#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
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std r9,HSTATE_SCRATCH2(r13)
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lbz r9,HSTATE_IN_GUEST(r13)
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cmpwi r9,KVM_GUEST_MODE_SKIP
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beq- .Lmaybe_skip
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.Lno_skip:
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#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
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cmpwi r9,KVM_GUEST_MODE_HOST_HV
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beq kvmppc_bad_host_intr
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#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
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@ -32,5 +36,58 @@ kvmppc_interrupt:
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#endif
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b kvmppc_interrupt_hv
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#else
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ld r9,HSTATE_SCRATCH2(r13)
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b kvmppc_interrupt_pr
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#endif
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/*
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* "Skip" interrupts are part of a trick KVM uses a with hash guests to load
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* the faulting instruction in guest memory from the the hypervisor without
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* walking page tables.
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*
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* When the guest takes a fault that requires the hypervisor to load the
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* instruction (e.g., MMIO emulation), KVM is running in real-mode with HV=1
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* and the guest MMU context loaded. It sets KVM_GUEST_MODE_SKIP, and sets
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* MSR[DR]=1 while leaving MSR[IR]=0, so it continues to fetch HV instructions
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* but loads and stores will access the guest context. This is used to load
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* the faulting instruction using the faulting guest effective address.
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*
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* However the guest context may not be able to translate, or it may cause a
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* machine check or other issue, which results in a fault in the host
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* (even with KVM-HV).
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*
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* These faults come here because KVM_GUEST_MODE_SKIP was set, so if they
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* are (or are likely) caused by that load, the instruction is skipped by
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* just returning with the PC advanced +4, where it is noticed the load did
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* not execute and it goes to the slow path which walks the page tables to
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* read guest memory.
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*/
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.Lmaybe_skip:
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cmpwi r12,BOOK3S_INTERRUPT_MACHINE_CHECK
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beq 1f
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cmpwi r12,BOOK3S_INTERRUPT_DATA_STORAGE
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beq 1f
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cmpwi r12,BOOK3S_INTERRUPT_DATA_SEGMENT
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beq 1f
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#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
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/* HSRR interrupts get 2 added to interrupt number */
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cmpwi r12,BOOK3S_INTERRUPT_H_DATA_STORAGE | 0x2
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beq 2f
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#endif
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b .Lno_skip
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1: mfspr r9,SPRN_SRR0
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addi r9,r9,4
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mtspr SPRN_SRR0,r9
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ld r12,HSTATE_SCRATCH0(r13)
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ld r9,HSTATE_SCRATCH2(r13)
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GET_SCRATCH0(r13)
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RFI_TO_KERNEL
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#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
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2: mfspr r9,SPRN_HSRR0
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addi r9,r9,4
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mtspr SPRN_HSRR0,r9
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ld r12,HSTATE_SCRATCH0(r13)
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ld r9,HSTATE_SCRATCH2(r13)
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GET_SCRATCH0(r13)
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HRFI_TO_KERNEL
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#endif
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