dt-bindings: iio:imu:mpu6050: support more interrupt types
Document that the hardware supports falling edge, rising edge, level low, and level high interrupt types, rather than just rising edge. The language used is the same as that in st_lsm6dsx.txt. Signed-off-by: Martin Kelly <mkelly@xevo.com> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Jean-Baptiste Maneyrol <jmaneyrol@invensense.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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@ -12,7 +12,12 @@ Required properties:
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"invensense,icm20608"
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- reg : the I2C address of the sensor
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- interrupt-parent : should be the phandle for the interrupt controller
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- interrupts : interrupt mapping for GPIO IRQ
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- interrupts: interrupt mapping for IRQ. It should be configured with flags
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IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_EDGE_RISING, IRQ_TYPE_LEVEL_LOW or
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IRQ_TYPE_EDGE_FALLING.
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Refer to interrupt-controller/interrupts.txt for generic interrupt client node
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bindings.
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Optional properties:
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- mount-matrix: an optional 3x3 mounting rotation matrix
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@ -25,7 +30,7 @@ Example:
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compatible = "invensense,mpu6050";
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reg = <0x68>;
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interrupt-parent = <&gpio1>;
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interrupts = <18 1>;
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interrupts = <18 IRQ_TYPE_EDGE_RISING>;
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mount-matrix = "-0.984807753012208", /* x0 */
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"0", /* y0 */
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"-0.173648177666930", /* z0 */
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@ -42,7 +47,7 @@ Example:
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compatible = "invensense,mpu9250";
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reg = <0x68>;
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interrupt-parent = <&gpio3>;
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interrupts = <21 1>;
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interrupts = <21 IRQ_TYPE_LEVEL_HIGH>;
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i2c-gate {
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#address-cells = <1>;
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#size-cells = <0>;
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