soc: renesas: rcar-sysc: Add r8a774c0 support
Add support for the RZ/G2E (R8A774C0) SoC power areas to the R-Car SYSC driver. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Коммит
f37d211c68
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@ -11,6 +11,7 @@ config SOC_RENESAS
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select SYSC_R8A7745 if ARCH_R8A7745
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select SYSC_R8A77470 if ARCH_R8A77470
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select SYSC_R8A774A1 if ARCH_R8A774A1
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select SYSC_R8A774C0 if ARCH_R8A774C0
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select SYSC_R8A7779 if ARCH_R8A7779
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select SYSC_R8A7790 if ARCH_R8A7790
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select SYSC_R8A7791 if ARCH_R8A7791 || ARCH_R8A7793
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@ -43,6 +44,10 @@ config SYSC_R8A774A1
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bool "RZ/G2M System Controller support" if COMPILE_TEST
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select SYSC_RCAR
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config SYSC_R8A774C0
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bool "RZ/G2E System Controller support" if COMPILE_TEST
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select SYSC_RCAR
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config SYSC_R8A7779
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bool "R-Car H1 System Controller support" if COMPILE_TEST
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select SYSC_RCAR
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@ -7,6 +7,7 @@ obj-$(CONFIG_SYSC_R8A7743) += r8a7743-sysc.o
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obj-$(CONFIG_SYSC_R8A7745) += r8a7745-sysc.o
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obj-$(CONFIG_SYSC_R8A77470) += r8a77470-sysc.o
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obj-$(CONFIG_SYSC_R8A774A1) += r8a774a1-sysc.o
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obj-$(CONFIG_SYSC_R8A774C0) += r8a774c0-sysc.o
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obj-$(CONFIG_SYSC_R8A7779) += r8a7779-sysc.o
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obj-$(CONFIG_SYSC_R8A7790) += r8a7790-sysc.o
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obj-$(CONFIG_SYSC_R8A7791) += r8a7791-sysc.o
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@ -0,0 +1,68 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Renesas RZ/G2E System Controller
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* Copyright (C) 2018 Renesas Electronics Corp.
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*
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* Based on Renesas R-Car E3 System Controller
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*/
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#include <linux/bug.h>
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#include <linux/kernel.h>
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#include <linux/sys_soc.h>
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#include <dt-bindings/power/r8a774c0-sysc.h>
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#include "rcar-sysc.h"
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static struct rcar_sysc_area r8a774c0_areas[] __initdata = {
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{ "always-on", 0, 0, R8A774C0_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
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{ "ca53-scu", 0x140, 0, R8A774C0_PD_CA53_SCU, R8A774C0_PD_ALWAYS_ON,
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PD_SCU },
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{ "ca53-cpu0", 0x200, 0, R8A774C0_PD_CA53_CPU0, R8A774C0_PD_CA53_SCU,
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PD_CPU_NOCR },
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{ "ca53-cpu1", 0x200, 1, R8A774C0_PD_CA53_CPU1, R8A774C0_PD_CA53_SCU,
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PD_CPU_NOCR },
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{ "a3vc", 0x380, 0, R8A774C0_PD_A3VC, R8A774C0_PD_ALWAYS_ON },
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{ "a2vc1", 0x3c0, 1, R8A774C0_PD_A2VC1, R8A774C0_PD_A3VC },
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{ "3dg-a", 0x100, 0, R8A774C0_PD_3DG_A, R8A774C0_PD_ALWAYS_ON },
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{ "3dg-b", 0x100, 1, R8A774C0_PD_3DG_B, R8A774C0_PD_3DG_A },
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};
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static void __init rcar_sysc_fix_parent(struct rcar_sysc_area *areas,
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unsigned int num_areas, u8 id,
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int new_parent)
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{
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unsigned int i;
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for (i = 0; i < num_areas; i++)
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if (areas[i].isr_bit == id) {
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areas[i].parent = new_parent;
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return;
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}
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}
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/* Fixups for RZ/G2E ES1.0 revision */
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static const struct soc_device_attribute r8a774c0[] __initconst = {
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{ .soc_id = "r8a774c0", .revision = "ES1.0" },
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{ /* sentinel */ }
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};
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static int __init r8a774c0_sysc_init(void)
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{
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if (soc_device_match(r8a774c0)) {
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rcar_sysc_fix_parent(r8a774c0_areas,
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ARRAY_SIZE(r8a774c0_areas),
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R8A774C0_PD_3DG_A, R8A774C0_PD_3DG_B);
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rcar_sysc_fix_parent(r8a774c0_areas,
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ARRAY_SIZE(r8a774c0_areas),
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R8A774C0_PD_3DG_B, R8A774C0_PD_ALWAYS_ON);
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}
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return 0;
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}
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const struct rcar_sysc_info r8a774c0_sysc_info __initconst = {
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.init = r8a774c0_sysc_init,
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.areas = r8a774c0_areas,
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.num_areas = ARRAY_SIZE(r8a774c0_areas),
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};
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@ -275,6 +275,9 @@ static const struct of_device_id rcar_sysc_matches[] __initconst = {
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#ifdef CONFIG_SYSC_R8A774A1
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{ .compatible = "renesas,r8a774a1-sysc", .data = &r8a774a1_sysc_info },
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#endif
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#ifdef CONFIG_SYSC_R8A774C0
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{ .compatible = "renesas,r8a774c0-sysc", .data = &r8a774c0_sysc_info },
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#endif
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#ifdef CONFIG_SYSC_R8A7779
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{ .compatible = "renesas,r8a7779-sysc", .data = &r8a7779_sysc_info },
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#endif
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@ -50,6 +50,7 @@ extern const struct rcar_sysc_info r8a7743_sysc_info;
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extern const struct rcar_sysc_info r8a7745_sysc_info;
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extern const struct rcar_sysc_info r8a77470_sysc_info;
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extern const struct rcar_sysc_info r8a774a1_sysc_info;
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extern const struct rcar_sysc_info r8a774c0_sysc_info;
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extern const struct rcar_sysc_info r8a7779_sysc_info;
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extern const struct rcar_sysc_info r8a7790_sysc_info;
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extern const struct rcar_sysc_info r8a7791_sysc_info;
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