mtd: nand: gpio: Convert to use GPIO descriptors
There is exactly one board in the kernel that defines platform data for the GPIO NAND driver. Use the feature to provide a lookup table for the GPIOs in the board file so we can convert the driver as a whole to just use GPIO descriptors. After this we can cut the use of <linux/of_gpio.h> and use the GPIO descriptor management from <linux/gpio/consumer.h> alone to grab and use the GPIOs used in the driver. I also created a local struct device *dev in the probe() function because I was getting annoyed with all the &pdev->dev dereferencing. Cc: arm@kernel.org Cc: Mike Rapoport <rppt@linux.vnet.ibm.com> Cc: Frans Klaver <fransklaver@gmail.com> Cc: Gerhard Sittig <gsi@denx.de> Cc: Jamie Iles <jamie.iles@oracle.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Acked-by: Jamie Iles <jamie.iles@oracle.com> Acked-by: Olof Johansson <olof@lixom.net> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
This commit is contained in:
Linus Walleij
Boris Brezillon
Родитель
e8901f3ab5
Коммит
f3d0d8d938
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@ -14,7 +14,7 @@
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/physmap.h>
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#include <linux/mtd/nand-gpio.h>
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#include <linux/gpio/machine.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/pxa2xx_spi.h>
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@ -176,6 +176,17 @@ static inline void cmx255_init_nor(void) {}
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#endif
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#if defined(CONFIG_MTD_NAND_GPIO) || defined(CONFIG_MTD_NAND_GPIO_MODULE)
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static struct gpiod_lookup_table cmx255_nand_gpiod_table = {
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.dev_id = "gpio-nand",
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.table = {
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GPIO_LOOKUP("gpio-pxa", GPIO_NAND_CS, "nce", GPIO_ACTIVE_HIGH),
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GPIO_LOOKUP("gpio-pxa", GPIO_NAND_CLE, "cle", GPIO_ACTIVE_HIGH),
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GPIO_LOOKUP("gpio-pxa", GPIO_NAND_ALE, "ale", GPIO_ACTIVE_HIGH),
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GPIO_LOOKUP("gpio-pxa", GPIO_NAND_RB, "rdy", GPIO_ACTIVE_HIGH),
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},
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};
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static struct resource cmx255_nand_resource[] = {
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[0] = {
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.start = PXA_CS1_PHYS,
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@ -198,11 +209,6 @@ static struct mtd_partition cmx255_nand_parts[] = {
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};
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static struct gpio_nand_platdata cmx255_nand_platdata = {
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.gpio_nce = GPIO_NAND_CS,
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.gpio_cle = GPIO_NAND_CLE,
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.gpio_ale = GPIO_NAND_ALE,
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.gpio_rdy = GPIO_NAND_RB,
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.gpio_nwp = -1,
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.parts = cmx255_nand_parts,
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.num_parts = ARRAY_SIZE(cmx255_nand_parts),
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.chip_delay = 25,
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@ -220,6 +226,7 @@ static struct platform_device cmx255_nand = {
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static void __init cmx255_init_nand(void)
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{
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gpiod_add_lookup_table(&cmx255_nand_gpiod_table);
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platform_device_register(&cmx255_nand);
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}
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#else
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@ -23,7 +23,7 @@
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#include <linux/slab.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/gpio.h>
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#include <linux/gpio/consumer.h>
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#include <linux/io.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/rawnand.h>
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@ -31,12 +31,16 @@
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#include <linux/mtd/nand-gpio.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_gpio.h>
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struct gpiomtd {
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void __iomem *io_sync;
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struct nand_chip nand_chip;
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struct gpio_nand_platdata plat;
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struct gpio_desc *nce; /* Optional chip enable */
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struct gpio_desc *cle;
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struct gpio_desc *ale;
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struct gpio_desc *rdy;
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struct gpio_desc *nwp; /* Optional write protection */
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};
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static inline struct gpiomtd *gpio_nand_getpriv(struct mtd_info *mtd)
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@ -78,11 +82,10 @@ static void gpio_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
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gpio_nand_dosync(gpiomtd);
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if (ctrl & NAND_CTRL_CHANGE) {
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if (gpio_is_valid(gpiomtd->plat.gpio_nce))
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gpio_set_value(gpiomtd->plat.gpio_nce,
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!(ctrl & NAND_NCE));
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gpio_set_value(gpiomtd->plat.gpio_cle, !!(ctrl & NAND_CLE));
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gpio_set_value(gpiomtd->plat.gpio_ale, !!(ctrl & NAND_ALE));
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if (gpiomtd->nce)
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gpiod_set_value(gpiomtd->nce, !(ctrl & NAND_NCE));
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gpiod_set_value(gpiomtd->cle, !!(ctrl & NAND_CLE));
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gpiod_set_value(gpiomtd->ale, !!(ctrl & NAND_ALE));
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gpio_nand_dosync(gpiomtd);
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}
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if (cmd == NAND_CMD_NONE)
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@ -96,7 +99,7 @@ static int gpio_nand_devready(struct mtd_info *mtd)
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{
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struct gpiomtd *gpiomtd = gpio_nand_getpriv(mtd);
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return gpio_get_value(gpiomtd->plat.gpio_rdy);
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return gpiod_get_value(gpiomtd->rdy);
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}
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#ifdef CONFIG_OF
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@ -123,12 +126,6 @@ static int gpio_nand_get_config_of(const struct device *dev,
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}
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}
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plat->gpio_rdy = of_get_gpio(dev->of_node, 0);
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plat->gpio_nce = of_get_gpio(dev->of_node, 1);
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plat->gpio_ale = of_get_gpio(dev->of_node, 2);
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plat->gpio_cle = of_get_gpio(dev->of_node, 3);
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plat->gpio_nwp = of_get_gpio(dev->of_node, 4);
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if (!of_property_read_u32(dev->of_node, "chip-delay", &val))
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plat->chip_delay = val;
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@ -201,10 +198,11 @@ static int gpio_nand_remove(struct platform_device *pdev)
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nand_release(nand_to_mtd(&gpiomtd->nand_chip));
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if (gpio_is_valid(gpiomtd->plat.gpio_nwp))
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gpio_set_value(gpiomtd->plat.gpio_nwp, 0);
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if (gpio_is_valid(gpiomtd->plat.gpio_nce))
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gpio_set_value(gpiomtd->plat.gpio_nce, 1);
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/* Enable write protection and disable the chip */
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if (gpiomtd->nwp && !IS_ERR(gpiomtd->nwp))
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gpiod_set_value(gpiomtd->nwp, 0);
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if (gpiomtd->nce && !IS_ERR(gpiomtd->nce))
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gpiod_set_value(gpiomtd->nce, 0);
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return 0;
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}
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@ -215,66 +213,66 @@ static int gpio_nand_probe(struct platform_device *pdev)
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struct nand_chip *chip;
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struct mtd_info *mtd;
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struct resource *res;
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struct device *dev = &pdev->dev;
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int ret = 0;
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if (!pdev->dev.of_node && !dev_get_platdata(&pdev->dev))
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if (!dev->of_node && !dev_get_platdata(dev))
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return -EINVAL;
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gpiomtd = devm_kzalloc(&pdev->dev, sizeof(*gpiomtd), GFP_KERNEL);
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gpiomtd = devm_kzalloc(dev, sizeof(*gpiomtd), GFP_KERNEL);
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if (!gpiomtd)
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return -ENOMEM;
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chip = &gpiomtd->nand_chip;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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chip->IO_ADDR_R = devm_ioremap_resource(&pdev->dev, res);
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chip->IO_ADDR_R = devm_ioremap_resource(dev, res);
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if (IS_ERR(chip->IO_ADDR_R))
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return PTR_ERR(chip->IO_ADDR_R);
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res = gpio_nand_get_io_sync(pdev);
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if (res) {
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gpiomtd->io_sync = devm_ioremap_resource(&pdev->dev, res);
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gpiomtd->io_sync = devm_ioremap_resource(dev, res);
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if (IS_ERR(gpiomtd->io_sync))
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return PTR_ERR(gpiomtd->io_sync);
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}
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ret = gpio_nand_get_config(&pdev->dev, &gpiomtd->plat);
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ret = gpio_nand_get_config(dev, &gpiomtd->plat);
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if (ret)
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return ret;
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if (gpio_is_valid(gpiomtd->plat.gpio_nce)) {
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ret = devm_gpio_request(&pdev->dev, gpiomtd->plat.gpio_nce,
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"NAND NCE");
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if (ret)
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return ret;
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gpio_direction_output(gpiomtd->plat.gpio_nce, 1);
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/* Just enable the chip */
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gpiomtd->nce = devm_gpiod_get_optional(dev, "nce", GPIOD_OUT_HIGH);
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if (IS_ERR(gpiomtd->nce))
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return PTR_ERR(gpiomtd->nce);
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/* We disable write protection once we know probe() will succeed */
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gpiomtd->nwp = devm_gpiod_get_optional(dev, "nwp", GPIOD_OUT_LOW);
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if (IS_ERR(gpiomtd->nwp)) {
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ret = PTR_ERR(gpiomtd->nwp);
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goto out_ce;
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}
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if (gpio_is_valid(gpiomtd->plat.gpio_nwp)) {
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ret = devm_gpio_request(&pdev->dev, gpiomtd->plat.gpio_nwp,
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"NAND NWP");
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if (ret)
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return ret;
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gpiomtd->nwp = devm_gpiod_get(dev, "ale", GPIOD_OUT_LOW);
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if (IS_ERR(gpiomtd->nwp)) {
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ret = PTR_ERR(gpiomtd->nwp);
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goto out_ce;
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}
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ret = devm_gpio_request(&pdev->dev, gpiomtd->plat.gpio_ale, "NAND ALE");
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if (ret)
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return ret;
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gpio_direction_output(gpiomtd->plat.gpio_ale, 0);
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gpiomtd->cle = devm_gpiod_get(dev, "cle", GPIOD_OUT_LOW);
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if (IS_ERR(gpiomtd->cle)) {
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ret = PTR_ERR(gpiomtd->cle);
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goto out_ce;
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}
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ret = devm_gpio_request(&pdev->dev, gpiomtd->plat.gpio_cle, "NAND CLE");
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if (ret)
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return ret;
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gpio_direction_output(gpiomtd->plat.gpio_cle, 0);
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if (gpio_is_valid(gpiomtd->plat.gpio_rdy)) {
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ret = devm_gpio_request(&pdev->dev, gpiomtd->plat.gpio_rdy,
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"NAND RDY");
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if (ret)
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return ret;
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gpio_direction_input(gpiomtd->plat.gpio_rdy);
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gpiomtd->rdy = devm_gpiod_get_optional(dev, "rdy", GPIOD_IN);
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if (IS_ERR(gpiomtd->rdy)) {
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ret = PTR_ERR(gpiomtd->rdy);
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goto out_ce;
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}
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/* Using RDY pin */
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if (gpiomtd->rdy)
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chip->dev_ready = gpio_nand_devready;
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}
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nand_set_flash_node(chip, pdev->dev.of_node);
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chip->IO_ADDR_W = chip->IO_ADDR_R;
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@ -285,12 +283,13 @@ static int gpio_nand_probe(struct platform_device *pdev)
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chip->cmd_ctrl = gpio_nand_cmd_ctrl;
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mtd = nand_to_mtd(chip);
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mtd->dev.parent = &pdev->dev;
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mtd->dev.parent = dev;
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platform_set_drvdata(pdev, gpiomtd);
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if (gpio_is_valid(gpiomtd->plat.gpio_nwp))
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gpio_direction_output(gpiomtd->plat.gpio_nwp, 1);
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/* Disable write protection, if wired up */
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if (gpiomtd->nwp && !IS_ERR(gpiomtd->nwp))
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gpiod_direction_output(gpiomtd->nwp, 1);
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ret = nand_scan(mtd, 1);
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if (ret)
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@ -305,8 +304,11 @@ static int gpio_nand_probe(struct platform_device *pdev)
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return 0;
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err_wp:
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if (gpio_is_valid(gpiomtd->plat.gpio_nwp))
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gpio_set_value(gpiomtd->plat.gpio_nwp, 0);
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if (gpiomtd->nwp && !IS_ERR(gpiomtd->nwp))
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gpiod_set_value(gpiomtd->nwp, 0);
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out_ce:
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if (gpiomtd->nce && !IS_ERR(gpiomtd->nce))
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gpiod_set_value(gpiomtd->nce, 0);
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return ret;
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}
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@ -4,11 +4,6 @@
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#include <linux/mtd/rawnand.h>
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struct gpio_nand_platdata {
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int gpio_nce;
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int gpio_nwp;
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int gpio_cle;
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int gpio_ale;
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int gpio_rdy;
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void (*adjust_parts)(struct gpio_nand_platdata *, size_t);
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struct mtd_partition *parts;
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unsigned int num_parts;
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