drm/nouveau/gr/gf100-: virtualise init_tex_hww_esr
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Родитель
70d2148209
Коммит
f3ef80c0c4
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@ -1914,6 +1914,13 @@ gf100_gr_new_(const struct gf100_gr_func *func, struct nvkm_device *device,
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return 0;
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}
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void
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gf100_gr_init_tex_hww_esr(struct gf100_gr *gr, int tpc, int gpc)
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{
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struct nvkm_device *device = gr->base.engine.subdev.device;
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x224), 0xc0000000);
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}
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void
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gf100_gr_init_419eb4(struct gf100_gr *gr)
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{
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@ -2082,7 +2089,8 @@ gf100_gr_init(struct gf100_gr *gr)
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for (tpc = 0; tpc < gr->tpc_nr[gpc]; tpc++) {
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x508), 0xffffffff);
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x50c), 0xffffffff);
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x224), 0xc0000000);
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if (gr->func->init_tex_hww_esr)
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gr->func->init_tex_hww_esr(gr, gpc, tpc);
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x084), 0xc0000000);
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x644), 0x001ffffe);
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x64c), 0x0000000f);
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@ -2143,6 +2151,7 @@ gf100_gr = {
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.init_40601c = gf100_gr_init_40601c,
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.init_419cc0 = gf100_gr_init_419cc0,
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.init_419eb4 = gf100_gr_init_419eb4,
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.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
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.mmio = gf100_gr_pack_mmio,
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.fecs.ucode = &gf100_gr_fecs_ucode,
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.gpccs.ucode = &gf100_gr_gpccs_ucode,
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@ -138,6 +138,7 @@ struct gf100_gr_func {
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void (*init_419eb4)(struct gf100_gr *);
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void (*init_419c9c)(struct gf100_gr *);
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void (*init_ppc_exceptions)(struct gf100_gr *);
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void (*init_tex_hww_esr)(struct gf100_gr *, int gpc, int tpc);
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void (*set_hww_esr_report_mask)(struct gf100_gr *);
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const struct gf100_gr_pack *mmio;
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struct {
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@ -162,6 +163,7 @@ void gf100_gr_init_fecs_exceptions(struct gf100_gr *);
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void gf100_gr_init_40601c(struct gf100_gr *);
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void gf100_gr_init_419cc0(struct gf100_gr *);
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void gf100_gr_init_419eb4(struct gf100_gr *);
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void gf100_gr_init_tex_hww_esr(struct gf100_gr *, int, int);
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void gf117_gr_init_zcull(struct gf100_gr *);
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@ -123,6 +123,7 @@ gf104_gr = {
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.init_40601c = gf100_gr_init_40601c,
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.init_419cc0 = gf100_gr_init_419cc0,
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.init_419eb4 = gf100_gr_init_419eb4,
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.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
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.mmio = gf104_gr_pack_mmio,
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.fecs.ucode = &gf100_gr_fecs_ucode,
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.gpccs.ucode = &gf100_gr_gpccs_ucode,
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@ -121,6 +121,7 @@ gf108_gr = {
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.init_40601c = gf100_gr_init_40601c,
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.init_419cc0 = gf100_gr_init_419cc0,
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.init_419eb4 = gf100_gr_init_419eb4,
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.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
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.mmio = gf108_gr_pack_mmio,
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.fecs.ucode = &gf100_gr_fecs_ucode,
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.gpccs.ucode = &gf100_gr_gpccs_ucode,
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@ -95,6 +95,7 @@ gf110_gr = {
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.init_40601c = gf100_gr_init_40601c,
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.init_419cc0 = gf100_gr_init_419cc0,
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.init_419eb4 = gf100_gr_init_419eb4,
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.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
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.mmio = gf110_gr_pack_mmio,
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.fecs.ucode = &gf100_gr_fecs_ucode,
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.gpccs.ucode = &gf100_gr_gpccs_ucode,
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@ -159,6 +159,7 @@ gf117_gr = {
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.init_40601c = gf100_gr_init_40601c,
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.init_419cc0 = gf100_gr_init_419cc0,
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.init_419eb4 = gf100_gr_init_419eb4,
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.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
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.mmio = gf117_gr_pack_mmio,
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.fecs.ucode = &gf117_gr_fecs_ucode,
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.gpccs.ucode = &gf117_gr_gpccs_ucode,
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@ -186,6 +186,7 @@ gf119_gr = {
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.init_40601c = gf100_gr_init_40601c,
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.init_419cc0 = gf100_gr_init_419cc0,
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.init_419eb4 = gf100_gr_init_419eb4,
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.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
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.mmio = gf119_gr_pack_mmio,
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.fecs.ucode = &gf100_gr_fecs_ucode,
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.gpccs.ucode = &gf100_gr_gpccs_ucode,
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@ -473,7 +473,7 @@ gk104_gr_init(struct gf100_gr *gr)
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for (tpc = 0; tpc < gr->tpc_nr[gpc]; tpc++) {
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x508), 0xffffffff);
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x50c), 0xffffffff);
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x224), 0xc0000000);
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gr->func->init_tex_hww_esr(gr, gpc, tpc);
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x084), 0xc0000000);
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x644), 0x001ffffe);
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x64c), 0x0000000f);
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@ -536,6 +536,7 @@ gk104_gr = {
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.init_419cc0 = gf100_gr_init_419cc0,
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.init_419eb4 = gf100_gr_init_419eb4,
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.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
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.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
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.mmio = gk104_gr_pack_mmio,
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.fecs.ucode = &gk104_gr_fecs_ucode,
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.gpccs.ucode = &gk104_gr_gpccs_ucode,
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@ -361,6 +361,7 @@ gk110_gr = {
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.init_419cc0 = gf100_gr_init_419cc0,
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.init_419eb4 = gk110_gr_init_419eb4,
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.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
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.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
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.mmio = gk110_gr_pack_mmio,
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.fecs.ucode = &gk110_gr_fecs_ucode,
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.gpccs.ucode = &gk110_gr_gpccs_ucode,
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@ -113,6 +113,7 @@ gk110b_gr = {
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.init_419cc0 = gf100_gr_init_419cc0,
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.init_419eb4 = gk110_gr_init_419eb4,
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.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
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.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
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.mmio = gk110b_gr_pack_mmio,
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.fecs.ucode = &gk110_gr_fecs_ucode,
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.gpccs.ucode = &gk110_gr_gpccs_ucode,
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@ -171,6 +171,7 @@ gk208_gr = {
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.init_sked_hww_esr = gk104_gr_init_sked_hww_esr,
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.init_419cc0 = gf100_gr_init_419cc0,
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.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
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.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
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.mmio = gk208_gr_pack_mmio,
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.fecs.ucode = &gk208_gr_fecs_ucode,
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.gpccs.ucode = &gk208_gr_gpccs_ucode,
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@ -393,7 +393,7 @@ gm107_gr_init(struct gf100_gr *gr)
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for (tpc = 0; tpc < gr->tpc_nr[gpc]; tpc++) {
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x508), 0xffffffff);
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x50c), 0xffffffff);
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x224), 0xc0000000);
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gr->func->init_tex_hww_esr(gr, gpc, tpc);
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x084), 0xc0000000);
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x430), 0xc0000000);
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x644), 0x00dffffe);
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@ -458,6 +458,7 @@ gm107_gr = {
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.init_sked_hww_esr = gk104_gr_init_sked_hww_esr,
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.init_419cc0 = gf100_gr_init_419cc0,
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.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
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.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
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.mmio = gm107_gr_pack_mmio,
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.fecs.ucode = &gm107_gr_fecs_ucode,
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.gpccs.ucode = &gm107_gr_gpccs_ucode,
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@ -121,7 +121,7 @@ gm200_gr_init(struct gf100_gr *gr)
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for (tpc = 0; tpc < gr->tpc_nr[gpc]; tpc++) {
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x508), 0xffffffff);
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x50c), 0xffffffff);
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x224), 0xc0000000);
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gr->func->init_tex_hww_esr(gr, gpc, tpc);
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x084), 0xc0000000);
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x430), 0xc0000000);
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x644), 0x00dffffe);
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@ -204,6 +204,7 @@ gm200_gr = {
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.init_sked_hww_esr = gk104_gr_init_sked_hww_esr,
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.init_419cc0 = gf100_gr_init_419cc0,
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.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
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.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
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.rops = gm200_gr_rops,
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.ppc_nr = 2,
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.grctx = &gm200_grctx,
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@ -101,7 +101,7 @@ gp100_gr_init(struct gf100_gr *gr)
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for (tpc = 0; tpc < gr->tpc_nr[gpc]; tpc++) {
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x508), 0xffffffff);
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x50c), 0xffffffff);
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x224), 0xc0000000);
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gr->func->init_tex_hww_esr(gr, gpc, tpc);
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x084), 0xc0000000);
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x430), 0xc0000000);
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x644), 0x00dffffe);
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@ -144,6 +144,7 @@ gp100_gr = {
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.init_419cc0 = gf100_gr_init_419cc0,
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.init_419c9c = gp100_gr_init_419c9c,
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.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
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.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
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.rops = gm200_gr_rops,
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.ppc_nr = 2,
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.grctx = &gp100_grctx,
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@ -54,6 +54,7 @@ gp102_gr = {
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.init_sked_hww_esr = gk104_gr_init_sked_hww_esr,
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.init_419cc0 = gf100_gr_init_419cc0,
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.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
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.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
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.rops = gm200_gr_rops,
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.ppc_nr = 3,
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.grctx = &gp102_grctx,
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@ -40,6 +40,7 @@ gp107_gr = {
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.init_sked_hww_esr = gk104_gr_init_sked_hww_esr,
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.init_419cc0 = gf100_gr_init_419cc0,
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.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
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.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
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.rops = gm200_gr_rops,
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.ppc_nr = 1,
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.grctx = &gp107_grctx,
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@ -38,6 +38,7 @@ gp10b_gr = {
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.init_sked_hww_esr = gk104_gr_init_sked_hww_esr,
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.init_419cc0 = gf100_gr_init_419cc0,
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.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
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.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
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.rops = gm200_gr_rops,
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.ppc_nr = 1,
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.grctx = &gp102_grctx,
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