atomic.h: add atomic64 cmpxchg, xchg and add_unless to powerpc
[akpm@linux-foundation.org: build fixes] Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Mathieu Desnoyers
Linus Torvalds
Родитель
8ffe9d0bff
Коммит
f46e477ed9
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@ -165,8 +165,7 @@ static __inline__ int atomic_dec_return(atomic_t *v)
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return t;
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}
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#define atomic_cmpxchg(v, o, n) \
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((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n)))
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#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
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#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
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/**
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@ -414,8 +413,7 @@ static __inline__ long atomic64_dec_if_positive(atomic64_t *v)
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return t;
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}
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#define atomic64_cmpxchg(v, o, n) \
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((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n)))
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#define atomic64_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
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#define atomic64_xchg(v, new) (xchg(&((v)->counter), new))
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/**
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@ -39,7 +39,6 @@
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#ifdef __KERNEL__
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#include <linux/compiler.h>
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#include <asm/atomic.h>
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#include <asm/asm-compat.h>
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#include <asm/synch.h>
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@ -7,7 +7,6 @@
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#include <linux/kernel.h>
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#include <asm/hw_irq.h>
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#include <asm/atomic.h>
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/*
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* Memory barrier.
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@ -227,6 +226,29 @@ __xchg_u32(volatile void *p, unsigned long val)
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return prev;
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}
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/*
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* Atomic exchange
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*
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* Changes the memory location '*ptr' to be val and returns
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* the previous value stored there.
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*/
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static __inline__ unsigned long
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__xchg_u32_local(volatile void *p, unsigned long val)
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{
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unsigned long prev;
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__asm__ __volatile__(
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"1: lwarx %0,0,%2 \n"
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PPC405_ERR77(0,%2)
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" stwcx. %3,0,%2 \n\
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bne- 1b"
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: "=&r" (prev), "+m" (*(volatile unsigned int *)p)
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: "r" (p), "r" (val)
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: "cc", "memory");
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return prev;
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}
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#ifdef CONFIG_PPC64
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static __inline__ unsigned long
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__xchg_u64(volatile void *p, unsigned long val)
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@ -246,6 +268,23 @@ __xchg_u64(volatile void *p, unsigned long val)
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return prev;
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}
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static __inline__ unsigned long
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__xchg_u64_local(volatile void *p, unsigned long val)
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{
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unsigned long prev;
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__asm__ __volatile__(
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"1: ldarx %0,0,%2 \n"
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PPC405_ERR77(0,%2)
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" stdcx. %3,0,%2 \n\
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bne- 1b"
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: "=&r" (prev), "+m" (*(volatile unsigned long *)p)
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: "r" (p), "r" (val)
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: "cc", "memory");
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return prev;
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}
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#endif
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/*
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@ -269,12 +308,33 @@ __xchg(volatile void *ptr, unsigned long x, unsigned int size)
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return x;
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}
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static __inline__ unsigned long
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__xchg_local(volatile void *ptr, unsigned long x, unsigned int size)
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{
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switch (size) {
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case 4:
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return __xchg_u32_local(ptr, x);
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#ifdef CONFIG_PPC64
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case 8:
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return __xchg_u64_local(ptr, x);
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#endif
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}
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__xchg_called_with_bad_pointer();
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return x;
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}
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#define xchg(ptr,x) \
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({ \
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__typeof__(*(ptr)) _x_ = (x); \
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(__typeof__(*(ptr))) __xchg((ptr), (unsigned long)_x_, sizeof(*(ptr))); \
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})
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#define xchg_local(ptr,x) \
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({ \
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__typeof__(*(ptr)) _x_ = (x); \
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(__typeof__(*(ptr))) __xchg_local((ptr), \
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(unsigned long)_x_, sizeof(*(ptr))); \
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})
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#define tas(ptr) (xchg((ptr),1))
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/*
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@ -306,6 +366,28 @@ __cmpxchg_u32(volatile unsigned int *p, unsigned long old, unsigned long new)
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return prev;
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}
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static __inline__ unsigned long
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__cmpxchg_u32_local(volatile unsigned int *p, unsigned long old,
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unsigned long new)
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{
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unsigned int prev;
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__asm__ __volatile__ (
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"1: lwarx %0,0,%2 # __cmpxchg_u32\n\
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cmpw 0,%0,%3\n\
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bne- 2f\n"
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PPC405_ERR77(0,%2)
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" stwcx. %4,0,%2\n\
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bne- 1b"
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"\n\
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2:"
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: "=&r" (prev), "+m" (*p)
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: "r" (p), "r" (old), "r" (new)
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: "cc", "memory");
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return prev;
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}
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#ifdef CONFIG_PPC64
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static __inline__ unsigned long
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__cmpxchg_u64(volatile unsigned long *p, unsigned long old, unsigned long new)
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@ -328,6 +410,27 @@ __cmpxchg_u64(volatile unsigned long *p, unsigned long old, unsigned long new)
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return prev;
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}
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static __inline__ unsigned long
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__cmpxchg_u64_local(volatile unsigned long *p, unsigned long old,
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unsigned long new)
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{
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unsigned long prev;
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__asm__ __volatile__ (
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"1: ldarx %0,0,%2 # __cmpxchg_u64\n\
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cmpd 0,%0,%3\n\
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bne- 2f\n\
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stdcx. %4,0,%2\n\
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bne- 1b"
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"\n\
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2:"
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: "=&r" (prev), "+m" (*p)
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: "r" (p), "r" (old), "r" (new)
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: "cc", "memory");
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return prev;
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}
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#endif
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/* This function doesn't exist, so you'll get a linker error
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@ -350,6 +453,22 @@ __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new,
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return old;
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}
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static __inline__ unsigned long
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__cmpxchg_local(volatile void *ptr, unsigned long old, unsigned long new,
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unsigned int size)
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{
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switch (size) {
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case 4:
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return __cmpxchg_u32_local(ptr, old, new);
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#ifdef CONFIG_PPC64
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case 8:
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return __cmpxchg_u64_local(ptr, old, new);
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#endif
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}
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__cmpxchg_called_with_bad_pointer();
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return old;
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}
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#define cmpxchg(ptr,o,n) \
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({ \
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__typeof__(*(ptr)) _o_ = (o); \
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@ -358,6 +477,15 @@ __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new,
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(unsigned long)_n_, sizeof(*(ptr))); \
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})
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#define cmpxchg_local(ptr,o,n) \
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({ \
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__typeof__(*(ptr)) _o_ = (o); \
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__typeof__(*(ptr)) _n_ = (n); \
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(__typeof__(*(ptr))) __cmpxchg_local((ptr), (unsigned long)_o_, \
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(unsigned long)_n_, sizeof(*(ptr))); \
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})
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#ifdef CONFIG_PPC64
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/*
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* We handle most unaligned accesses in hardware. On the other hand
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