ftgmac100: Add ndo_set_rx_mode() and support for multicast & promisc
This adds the ndo_set_rx_mode() callback to configure the multicast filters, promisc and allmulti options. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Родитель
7c8e5141ca
Коммит
f48b3c0d5b
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@ -32,6 +32,7 @@
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#include <linux/phy.h>
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#include <linux/phy.h>
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#include <linux/platform_device.h>
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#include <linux/platform_device.h>
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#include <linux/property.h>
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#include <linux/property.h>
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#include <linux/crc32.h>
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#include <net/ip.h>
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#include <net/ip.h>
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#include <net/ncsi.h>
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#include <net/ncsi.h>
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@ -99,6 +100,10 @@ struct ftgmac100 {
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int cur_duplex;
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int cur_duplex;
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bool use_ncsi;
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bool use_ncsi;
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/* Multicast filter settings */
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u32 maht0;
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u32 maht1;
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/* Flow control settings */
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/* Flow control settings */
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bool tx_pause;
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bool tx_pause;
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bool rx_pause;
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bool rx_pause;
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@ -266,6 +271,10 @@ static void ftgmac100_init_hw(struct ftgmac100 *priv)
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/* Write MAC address */
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/* Write MAC address */
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ftgmac100_write_mac_addr(priv, priv->netdev->dev_addr);
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ftgmac100_write_mac_addr(priv, priv->netdev->dev_addr);
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/* Write multicast filter */
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iowrite32(priv->maht0, priv->base + FTGMAC100_OFFSET_MAHT0);
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iowrite32(priv->maht1, priv->base + FTGMAC100_OFFSET_MAHT1);
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/* Configure descriptor sizes and increase burst sizes according
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/* Configure descriptor sizes and increase burst sizes according
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* to values in Aspeed SDK. The FIFO arbitration is enabled and
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* to values in Aspeed SDK. The FIFO arbitration is enabled and
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* the thresholds set based on the recommended values in the
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* the thresholds set based on the recommended values in the
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@ -319,6 +328,12 @@ static void ftgmac100_start_hw(struct ftgmac100 *priv)
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/* Add other bits as needed */
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/* Add other bits as needed */
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if (priv->cur_duplex == DUPLEX_FULL)
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if (priv->cur_duplex == DUPLEX_FULL)
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maccr |= FTGMAC100_MACCR_FULLDUP;
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maccr |= FTGMAC100_MACCR_FULLDUP;
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if (priv->netdev->flags & IFF_PROMISC)
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maccr |= FTGMAC100_MACCR_RX_ALL;
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if (priv->netdev->flags & IFF_ALLMULTI)
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maccr |= FTGMAC100_MACCR_RX_MULTIPKT;
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else if (netdev_mc_count(priv->netdev))
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maccr |= FTGMAC100_MACCR_HT_MULTI_EN;
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/* Hit the HW */
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/* Hit the HW */
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iowrite32(maccr, priv->base + FTGMAC100_OFFSET_MACCR);
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iowrite32(maccr, priv->base + FTGMAC100_OFFSET_MACCR);
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@ -329,6 +344,42 @@ static void ftgmac100_stop_hw(struct ftgmac100 *priv)
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iowrite32(0, priv->base + FTGMAC100_OFFSET_MACCR);
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iowrite32(0, priv->base + FTGMAC100_OFFSET_MACCR);
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}
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}
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static void ftgmac100_calc_mc_hash(struct ftgmac100 *priv)
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{
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struct netdev_hw_addr *ha;
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priv->maht1 = 0;
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priv->maht0 = 0;
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netdev_for_each_mc_addr(ha, priv->netdev) {
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u32 crc_val = ether_crc_le(ETH_ALEN, ha->addr);
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crc_val = (~(crc_val >> 2)) & 0x3f;
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if (crc_val >= 32)
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priv->maht1 |= 1ul << (crc_val - 32);
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else
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priv->maht0 |= 1ul << (crc_val);
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}
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}
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static void ftgmac100_set_rx_mode(struct net_device *netdev)
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{
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struct ftgmac100 *priv = netdev_priv(netdev);
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/* Setup the hash filter */
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ftgmac100_calc_mc_hash(priv);
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/* Interface down ? that's all there is to do */
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if (!netif_running(netdev))
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return;
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/* Update the HW */
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iowrite32(priv->maht0, priv->base + FTGMAC100_OFFSET_MAHT0);
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iowrite32(priv->maht1, priv->base + FTGMAC100_OFFSET_MAHT1);
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/* Reconfigure MACCR */
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ftgmac100_start_hw(priv);
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}
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static int ftgmac100_alloc_rx_buf(struct ftgmac100 *priv, unsigned int entry,
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static int ftgmac100_alloc_rx_buf(struct ftgmac100 *priv, unsigned int entry,
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struct ftgmac100_rxdes *rxdes, gfp_t gfp)
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struct ftgmac100_rxdes *rxdes, gfp_t gfp)
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{
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{
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@ -1503,6 +1554,7 @@ static const struct net_device_ops ftgmac100_netdev_ops = {
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.ndo_validate_addr = eth_validate_addr,
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.ndo_validate_addr = eth_validate_addr,
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.ndo_do_ioctl = ftgmac100_do_ioctl,
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.ndo_do_ioctl = ftgmac100_do_ioctl,
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.ndo_tx_timeout = ftgmac100_tx_timeout,
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.ndo_tx_timeout = ftgmac100_tx_timeout,
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.ndo_set_rx_mode = ftgmac100_set_rx_mode,
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};
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};
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static int ftgmac100_setup_mdio(struct net_device *netdev)
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static int ftgmac100_setup_mdio(struct net_device *netdev)
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