powerpc/booke: Avoid link stack corruption in several places
Use bcl 20,31,+4 instead of bl in order to preserve link stack.
See commit c974809a26 ("powerpc/vdso: Avoid link stack corruption
in __get_datapage()") for details.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/e9fbc285eceb720e6c0e032ef47fe8b05f669b48.1629791751.git.christophe.leroy@csgroup.eu
This commit is contained in:
Christophe Leroy
Michael Ellerman
Родитель
113ec9ccc8
Коммит
f5007dbf4d
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@ -260,7 +260,7 @@ n:
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/* Be careful, this will clobber the lr register. */
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#define LOAD_REG_ADDR_PIC(reg, name) \
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bl 0f; \
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bcl 20,31,$+4; \
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0: mflr reg; \
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addis reg,reg,(name - 0b)@ha; \
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addi reg,reg,(name - 0b)@l;
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@ -1127,7 +1127,7 @@ found_iprot:
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* r3 = MAS0_TLBSEL (for the iprot array)
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* r4 = SPRN_TLBnCFG
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*/
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bl invstr /* Find our address */
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bcl 20,31,$+4 /* Find our address */
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invstr: mflr r6 /* Make it accessible */
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mfmsr r7
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rlwinm r5,r7,27,31,31 /* extract MSR[IS] */
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@ -1196,7 +1196,7 @@ skpinv: addi r6,r6,1 /* Increment */
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mfmsr r6
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xori r6,r6,MSR_IS
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mtspr SPRN_SRR1,r6
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bl 1f /* Find our address */
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bcl 20,31,$+4 /* Find our address */
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1: mflr r6
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addi r6,r6,(2f - 1b)
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mtspr SPRN_SRR0,r6
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@ -1256,7 +1256,7 @@ skpinv: addi r6,r6,1 /* Increment */
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* r4 = MAS0 w/TLBSEL & ESEL for the temp mapping
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*/
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/* Now we branch the new virtual address mapped by this entry */
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bl 1f /* Find our address */
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bcl 20,31,$+4 /* Find our address */
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1: mflr r6
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addi r6,r6,(2f - 1b)
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tovirt(r6,r6)
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@ -1,7 +1,7 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/* 1. Find the index of the entry we're executing in */
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bl invstr /* Find our address */
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bcl 20,31,$+4 /* Find our address */
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invstr: mflr r6 /* Make it accessible */
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mfmsr r7
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rlwinm r4,r7,27,31,31 /* extract MSR[IS] */
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@ -85,7 +85,7 @@ skpinv: addi r6,r6,1 /* Increment */
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addi r6,r6,10
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slw r6,r8,r6 /* convert to mask */
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bl 1f /* Find our address */
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bcl 20,31,$+4 /* Find our address */
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1: mflr r7
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mfspr r8,SPRN_MAS3
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@ -117,7 +117,7 @@ skpinv: addi r6,r6,1 /* Increment */
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xori r6,r4,1
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slwi r6,r6,5 /* setup new context with other address space */
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bl 1f /* Find our address */
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bcl 20,31,$+4 /* Find our address */
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1: mflr r9
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rlwimi r7,r9,0,20,31
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addi r7,r7,(2f - 1b)
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@ -207,7 +207,7 @@ next_tlb_setup:
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lis r7,MSR_KERNEL@h
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ori r7,r7,MSR_KERNEL@l
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bl 1f /* Find our address */
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bcl 20,31,$+4 /* Find our address */
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1: mflr r9
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rlwimi r6,r9,0,20,31
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addi r6,r6,(2f - 1b)
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@ -70,7 +70,7 @@ _ENTRY(_start);
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* address.
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* r21 will be loaded with the physical runtime address of _stext
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*/
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bl 0f /* Get our runtime address */
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bcl 20,31,$+4 /* Get our runtime address */
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0: mflr r21 /* Make it accessible */
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addis r21,r21,(_stext - 0b)@ha
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addi r21,r21,(_stext - 0b)@l /* Get our current runtime base */
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@ -853,7 +853,7 @@ _GLOBAL(init_cpu_state)
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wmmucr: mtspr SPRN_MMUCR,r3 /* Put MMUCR */
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sync
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bl invstr /* Find our address */
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bcl 20,31,$+4 /* Find our address */
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invstr: mflr r5 /* Make it accessible */
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tlbsx r23,0,r5 /* Find entry we are in */
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li r4,0 /* Start at TLB entry 0 */
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@ -1045,7 +1045,7 @@ head_start_47x:
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sync
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/* Find the entry we are running from */
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bl 1f
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bcl 20,31,$+4
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1: mflr r23
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tlbsx r23,0,r23
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tlbre r24,r23,0
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@ -79,7 +79,7 @@ _ENTRY(_start);
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mr r23,r3
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mr r25,r4
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bl 0f
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bcl 20,31,$+4
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0: mflr r8
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addis r3,r8,(is_second_reloc - 0b)@ha
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lwz r19,(is_second_reloc - 0b)@l(r3)
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@ -1132,7 +1132,7 @@ _GLOBAL(switch_to_as1)
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bne 1b
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/* Get the tlb entry used by the current running code */
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bl 0f
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bcl 20,31,$+4
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0: mflr r4
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tlbsx 0,r4
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@ -1166,7 +1166,7 @@ _GLOBAL(switch_to_as1)
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_GLOBAL(restore_to_as0)
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mflr r0
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bl 0f
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bcl 20,31,$+4
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0: mflr r9
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addi r9,r9,1f - 0b
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@ -199,7 +199,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_476_DD2)
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* Touch enough instruction cache lines to ensure cache hits
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*/
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1: mflr r9
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bl 2f
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bcl 20,31,$+4
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2: mflr r6
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li r7,32
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PPC_ICBT(0,R6,R7) /* touch next cache line */
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@ -414,7 +414,7 @@ _GLOBAL(loadcam_multi)
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* Set up temporary TLB entry that is the same as what we're
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* running from, but in AS=1.
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*/
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bl 1f
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bcl 20,31,$+4
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1: mflr r6
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tlbsx 0,r8
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mfspr r6,SPRN_MAS1
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