hwmon: (it87) Fix PWM frequency display for chips with newer PWM control
On chips with newer PWM control, the PWM frequency divider is 256 instead of 128. Since the base PWM frequency remained the same, the actual PWM frequency is half of what it used to be with the older PWM control mechanism. Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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1696d1deb0
Коммит
f56c9c0aa6
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@ -502,15 +502,25 @@ static int DIV_TO_REG(int val)
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}
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#define DIV_FROM_REG(val) (1 << (val))
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/*
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* PWM base frequencies. The frequency has to be divided by either 128 or 256,
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* depending on the chip type, to calculate the actual PWM frequency.
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*
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* Some of the chip datasheets suggest a base frequency of 51 kHz instead
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* of 750 kHz for the slowest base frequency, resulting in a PWM frequency
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* of 200 Hz. Sometimes both PWM frequency select registers are affected,
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* sometimes just one. It is unknown if this is a datasheet error or real,
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* so this is ignored for now.
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*/
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static const unsigned int pwm_freq[8] = {
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48000000 / 128,
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24000000 / 128,
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12000000 / 128,
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8000000 / 128,
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6000000 / 128,
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3000000 / 128,
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1500000 / 128,
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750000 / 128,
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48000000,
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24000000,
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12000000,
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8000000,
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6000000,
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3000000,
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1500000,
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750000,
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};
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static int it87_probe(struct platform_device *pdev);
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@ -828,8 +838,11 @@ static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
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{
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struct it87_data *data = it87_update_device(dev);
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int index = (data->fan_ctl >> 4) & 0x07;
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unsigned int freq;
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return sprintf(buf, "%u\n", pwm_freq[index]);
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freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
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return sprintf(buf, "%u\n", freq);
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}
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static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
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@ -1051,6 +1064,9 @@ static ssize_t set_pwm_freq(struct device *dev,
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if (kstrtoul(buf, 10, &val) < 0)
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return -EINVAL;
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val = clamp_val(val, 0, 1000000);
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val *= has_newer_autopwm(data) ? 256 : 128;
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/* Search for the nearest available frequency */
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for (i = 0; i < 7; i++) {
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if (val > (pwm_freq[i] + pwm_freq[i+1]) / 2)
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