Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux
Pull drm fixes from Dave Airlie: "Xmas fixes pull, all small nothing major, intel, radeon, one ttm regression, and one build fix" * 'drm-fixes' of git://people.freedesktop.org/~airlied/linux: drm/ttm: Fix swapin regression gpu: fix qxl missing crc32_le drm/radeon: fix asic gfx values for scrapper asics drm/i915: Use the correct GMCH_CTRL register for Sandybridge+ drm/radeon: check for 0 count in speaker allocation and SAD code drm/radeon/dpm: disable ss on Cayman drm/radeon/dce6: set correct number of audio pins drm/i915: get a PC8 reference when enabling the power well drm/i915: change CRTC assertion on LCPLL disable drm/i915: Fix erroneous dereference of batch_obj inside reset_status drm/i915: Prevent double unref following alloc failure during execbuffer
This commit is contained in:
Коммит
f5835372eb
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@ -2343,15 +2343,24 @@ static void i915_gem_free_request(struct drm_i915_gem_request *request)
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kfree(request);
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}
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static void i915_gem_reset_ring_lists(struct drm_i915_private *dev_priv,
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struct intel_ring_buffer *ring)
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static void i915_gem_reset_ring_status(struct drm_i915_private *dev_priv,
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struct intel_ring_buffer *ring)
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{
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u32 completed_seqno;
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u32 acthd;
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u32 completed_seqno = ring->get_seqno(ring, false);
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u32 acthd = intel_ring_get_active_head(ring);
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struct drm_i915_gem_request *request;
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acthd = intel_ring_get_active_head(ring);
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completed_seqno = ring->get_seqno(ring, false);
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list_for_each_entry(request, &ring->request_list, list) {
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if (i915_seqno_passed(completed_seqno, request->seqno))
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continue;
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i915_set_reset_status(ring, request, acthd);
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}
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}
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static void i915_gem_reset_ring_cleanup(struct drm_i915_private *dev_priv,
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struct intel_ring_buffer *ring)
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{
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while (!list_empty(&ring->request_list)) {
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struct drm_i915_gem_request *request;
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@ -2359,9 +2368,6 @@ static void i915_gem_reset_ring_lists(struct drm_i915_private *dev_priv,
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struct drm_i915_gem_request,
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list);
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if (request->seqno > completed_seqno)
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i915_set_reset_status(ring, request, acthd);
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i915_gem_free_request(request);
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}
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@ -2403,8 +2409,16 @@ void i915_gem_reset(struct drm_device *dev)
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struct intel_ring_buffer *ring;
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int i;
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/*
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* Before we free the objects from the requests, we need to inspect
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* them for finding the guilty party. As the requests only borrow
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* their reference to the objects, the inspection must be done first.
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*/
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for_each_ring(ring, dev_priv, i)
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i915_gem_reset_ring_lists(dev_priv, ring);
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i915_gem_reset_ring_status(dev_priv, ring);
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for_each_ring(ring, dev_priv, i)
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i915_gem_reset_ring_cleanup(dev_priv, ring);
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i915_gem_cleanup_ringbuffer(dev);
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@ -93,7 +93,7 @@ eb_lookup_vmas(struct eb_vmas *eb,
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{
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struct drm_i915_gem_object *obj;
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struct list_head objects;
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int i, ret = 0;
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int i, ret;
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INIT_LIST_HEAD(&objects);
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spin_lock(&file->table_lock);
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@ -106,7 +106,7 @@ eb_lookup_vmas(struct eb_vmas *eb,
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DRM_DEBUG("Invalid object handle %d at index %d\n",
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exec[i].handle, i);
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ret = -ENOENT;
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goto out;
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goto err;
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}
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if (!list_empty(&obj->obj_exec_link)) {
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@ -114,7 +114,7 @@ eb_lookup_vmas(struct eb_vmas *eb,
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DRM_DEBUG("Object %p [handle %d, index %d] appears more than once in object list\n",
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obj, exec[i].handle, i);
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ret = -EINVAL;
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goto out;
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goto err;
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}
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drm_gem_object_reference(&obj->base);
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@ -123,9 +123,13 @@ eb_lookup_vmas(struct eb_vmas *eb,
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spin_unlock(&file->table_lock);
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i = 0;
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list_for_each_entry(obj, &objects, obj_exec_link) {
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while (!list_empty(&objects)) {
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struct i915_vma *vma;
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obj = list_first_entry(&objects,
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struct drm_i915_gem_object,
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obj_exec_link);
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/*
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* NOTE: We can leak any vmas created here when something fails
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* later on. But that's no issue since vma_unbind can deal with
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@ -138,10 +142,12 @@ eb_lookup_vmas(struct eb_vmas *eb,
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if (IS_ERR(vma)) {
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DRM_DEBUG("Failed to lookup VMA\n");
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ret = PTR_ERR(vma);
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goto out;
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goto err;
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}
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/* Transfer ownership from the objects list to the vmas list. */
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list_add_tail(&vma->exec_list, &eb->vmas);
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list_del_init(&obj->obj_exec_link);
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vma->exec_entry = &exec[i];
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if (eb->and < 0) {
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@ -155,16 +161,22 @@ eb_lookup_vmas(struct eb_vmas *eb,
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++i;
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}
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return 0;
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out:
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err:
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while (!list_empty(&objects)) {
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obj = list_first_entry(&objects,
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struct drm_i915_gem_object,
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obj_exec_link);
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list_del_init(&obj->obj_exec_link);
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if (ret)
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drm_gem_object_unreference(&obj->base);
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drm_gem_object_unreference(&obj->base);
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}
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/*
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* Objects already transfered to the vmas list will be unreferenced by
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* eb_destroy.
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*/
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return ret;
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}
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@ -6303,7 +6303,7 @@ static void assert_can_disable_lcpll(struct drm_i915_private *dev_priv)
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uint32_t val;
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list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head)
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WARN(crtc->base.enabled, "CRTC for pipe %c enabled\n",
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WARN(crtc->active, "CRTC for pipe %c enabled\n",
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pipe_name(crtc->pipe));
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WARN(I915_READ(HSW_PWR_WELL_DRIVER), "Power well on\n");
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@ -11126,14 +11126,15 @@ void intel_connector_attach_encoder(struct intel_connector *connector,
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int intel_modeset_vga_set_state(struct drm_device *dev, bool state)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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unsigned reg = INTEL_INFO(dev)->gen >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL;
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u16 gmch_ctrl;
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pci_read_config_word(dev_priv->bridge_dev, INTEL_GMCH_CTRL, &gmch_ctrl);
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pci_read_config_word(dev_priv->bridge_dev, reg, &gmch_ctrl);
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if (state)
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gmch_ctrl &= ~INTEL_GMCH_VGA_DISABLE;
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else
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gmch_ctrl |= INTEL_GMCH_VGA_DISABLE;
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pci_write_config_word(dev_priv->bridge_dev, INTEL_GMCH_CTRL, gmch_ctrl);
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pci_write_config_word(dev_priv->bridge_dev, reg, gmch_ctrl);
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return 0;
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}
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@ -5688,6 +5688,8 @@ static void __intel_set_power_well(struct drm_device *dev, bool enable)
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unsigned long irqflags;
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uint32_t tmp;
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WARN_ON(dev_priv->pc8.enabled);
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tmp = I915_READ(HSW_PWR_WELL_DRIVER);
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is_enabled = tmp & HSW_PWR_WELL_STATE_ENABLED;
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enable_requested = tmp & HSW_PWR_WELL_ENABLE_REQUEST;
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@ -5747,16 +5749,24 @@ static void __intel_set_power_well(struct drm_device *dev, bool enable)
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static void __intel_power_well_get(struct drm_device *dev,
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struct i915_power_well *power_well)
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{
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if (!power_well->count++)
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struct drm_i915_private *dev_priv = dev->dev_private;
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if (!power_well->count++) {
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hsw_disable_package_c8(dev_priv);
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__intel_set_power_well(dev, true);
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}
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}
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static void __intel_power_well_put(struct drm_device *dev,
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struct i915_power_well *power_well)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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WARN_ON(!power_well->count);
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if (!--power_well->count && i915_disable_power_well)
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if (!--power_well->count && i915_disable_power_well) {
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__intel_set_power_well(dev, false);
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hsw_enable_package_c8(dev_priv);
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}
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}
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void intel_display_power_get(struct drm_device *dev,
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@ -8,5 +8,6 @@ config DRM_QXL
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select DRM_KMS_HELPER
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select DRM_KMS_FB_HELPER
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select DRM_TTM
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select CRC32
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help
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QXL virtual GPU for Spice virtualization desktop integration. Do not enable this driver unless your distro ships a corresponding X.org QXL driver that can handle kernel modesetting.
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@ -24,7 +24,7 @@
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*/
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#include "linux/crc32.h"
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#include <linux/crc32.h>
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#include "qxl_drv.h"
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#include "qxl_object.h"
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@ -174,7 +174,7 @@ void dce6_afmt_write_speaker_allocation(struct drm_encoder *encoder)
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}
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sad_count = drm_edid_to_speaker_allocation(radeon_connector->edid, &sadb);
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if (sad_count < 0) {
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if (sad_count <= 0) {
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DRM_ERROR("Couldn't read Speaker Allocation Data Block: %d\n", sad_count);
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return;
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}
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@ -235,7 +235,7 @@ void dce6_afmt_write_sad_regs(struct drm_encoder *encoder)
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}
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sad_count = drm_edid_to_sad(radeon_connector->edid, &sads);
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if (sad_count < 0) {
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if (sad_count <= 0) {
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DRM_ERROR("Couldn't read SADs: %d\n", sad_count);
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return;
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}
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@ -308,7 +308,9 @@ int dce6_audio_init(struct radeon_device *rdev)
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rdev->audio.enabled = true;
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if (ASIC_IS_DCE8(rdev))
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rdev->audio.num_pins = 7;
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rdev->audio.num_pins = 6;
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else if (ASIC_IS_DCE61(rdev))
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rdev->audio.num_pins = 4;
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else
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rdev->audio.num_pins = 6;
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@ -118,7 +118,7 @@ static void dce4_afmt_write_speaker_allocation(struct drm_encoder *encoder)
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}
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sad_count = drm_edid_to_speaker_allocation(radeon_connector->edid, &sadb);
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if (sad_count < 0) {
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if (sad_count <= 0) {
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DRM_ERROR("Couldn't read Speaker Allocation Data Block: %d\n", sad_count);
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return;
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}
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@ -173,7 +173,7 @@ static void evergreen_hdmi_write_sad_regs(struct drm_encoder *encoder)
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}
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sad_count = drm_edid_to_sad(radeon_connector->edid, &sads);
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if (sad_count < 0) {
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if (sad_count <= 0) {
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DRM_ERROR("Couldn't read SADs: %d\n", sad_count);
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return;
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}
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@ -895,6 +895,10 @@ static void cayman_gpu_init(struct radeon_device *rdev)
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(rdev->pdev->device == 0x999C)) {
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rdev->config.cayman.max_simds_per_se = 6;
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rdev->config.cayman.max_backends_per_se = 2;
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rdev->config.cayman.max_hw_contexts = 8;
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rdev->config.cayman.sx_max_export_size = 256;
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rdev->config.cayman.sx_max_export_pos_size = 64;
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rdev->config.cayman.sx_max_export_smx_size = 192;
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} else if ((rdev->pdev->device == 0x9903) ||
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(rdev->pdev->device == 0x9904) ||
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(rdev->pdev->device == 0x990A) ||
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@ -905,6 +909,10 @@ static void cayman_gpu_init(struct radeon_device *rdev)
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(rdev->pdev->device == 0x999D)) {
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rdev->config.cayman.max_simds_per_se = 4;
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rdev->config.cayman.max_backends_per_se = 2;
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rdev->config.cayman.max_hw_contexts = 8;
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rdev->config.cayman.sx_max_export_size = 256;
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rdev->config.cayman.sx_max_export_pos_size = 64;
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rdev->config.cayman.sx_max_export_smx_size = 192;
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} else if ((rdev->pdev->device == 0x9919) ||
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(rdev->pdev->device == 0x9990) ||
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(rdev->pdev->device == 0x9991) ||
|
||||
|
@ -915,9 +923,17 @@ static void cayman_gpu_init(struct radeon_device *rdev)
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(rdev->pdev->device == 0x99A0)) {
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rdev->config.cayman.max_simds_per_se = 3;
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rdev->config.cayman.max_backends_per_se = 1;
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rdev->config.cayman.max_hw_contexts = 4;
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rdev->config.cayman.sx_max_export_size = 128;
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rdev->config.cayman.sx_max_export_pos_size = 32;
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rdev->config.cayman.sx_max_export_smx_size = 96;
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} else {
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rdev->config.cayman.max_simds_per_se = 2;
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rdev->config.cayman.max_backends_per_se = 1;
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rdev->config.cayman.max_hw_contexts = 4;
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rdev->config.cayman.sx_max_export_size = 128;
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rdev->config.cayman.sx_max_export_pos_size = 32;
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rdev->config.cayman.sx_max_export_smx_size = 96;
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}
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rdev->config.cayman.max_texture_channel_caches = 2;
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rdev->config.cayman.max_gprs = 256;
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|
@ -925,10 +941,6 @@ static void cayman_gpu_init(struct radeon_device *rdev)
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rdev->config.cayman.max_gs_threads = 32;
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rdev->config.cayman.max_stack_entries = 512;
|
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rdev->config.cayman.sx_num_of_sets = 8;
|
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rdev->config.cayman.sx_max_export_size = 256;
|
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rdev->config.cayman.sx_max_export_pos_size = 64;
|
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rdev->config.cayman.sx_max_export_smx_size = 192;
|
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rdev->config.cayman.max_hw_contexts = 8;
|
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rdev->config.cayman.sq_num_cf_insts = 2;
|
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|
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rdev->config.cayman.sc_prim_fifo_size = 0x40;
|
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|
|
|
@ -2328,6 +2328,12 @@ void rv770_get_engine_memory_ss(struct radeon_device *rdev)
|
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pi->mclk_ss = radeon_atombios_get_asic_ss_info(rdev, &ss,
|
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ASIC_INTERNAL_MEMORY_SS, 0);
|
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|
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/* disable ss, causes hangs on some cayman boards */
|
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if (rdev->family == CHIP_CAYMAN) {
|
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pi->sclk_ss = false;
|
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pi->mclk_ss = false;
|
||||
}
|
||||
|
||||
if (pi->sclk_ss || pi->mclk_ss)
|
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pi->dynamic_ss = true;
|
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else
|
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|
|
|
@ -353,7 +353,8 @@ int ttm_bo_move_memcpy(struct ttm_buffer_object *bo,
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* Don't move nonexistent data. Clear destination instead.
|
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*/
|
||||
if (old_iomap == NULL &&
|
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(ttm == NULL || ttm->state == tt_unpopulated)) {
|
||||
(ttm == NULL || (ttm->state == tt_unpopulated &&
|
||||
!(ttm->page_flags & TTM_PAGE_FLAG_SWAPPED)))) {
|
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memset_io(new_iomap, 0, new_mem->num_pages*PAGE_SIZE);
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goto out2;
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}
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