rtw89: support variant of fill_txdesc
The txdesc is descriptor related to skb->data. The v1 version contains 8 dwords txwd_body and 6 dwords txwd_info, and the format is also different from original one. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220318023214.32411-10-pkshih@realtek.com
This commit is contained in:
Ping-Ke Shih
Kalle Valo
Родитель
6d5b5d6290
Коммит
f59acdde51
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@ -897,6 +897,26 @@ static __le32 rtw89_build_txwd_body0(struct rtw89_tx_desc_info *desc_info)
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return cpu_to_le32(dword);
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}
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static __le32 rtw89_build_txwd_body0_v1(struct rtw89_tx_desc_info *desc_info)
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{
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u32 dword = FIELD_PREP(RTW89_TXWD_BODY0_WP_OFFSET_V1, desc_info->wp_offset) |
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FIELD_PREP(RTW89_TXWD_BODY0_WD_INFO_EN, desc_info->en_wd_info) |
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FIELD_PREP(RTW89_TXWD_BODY0_CHANNEL_DMA, desc_info->ch_dma) |
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FIELD_PREP(RTW89_TXWD_BODY0_HDR_LLC_LEN, desc_info->hdr_llc_len) |
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FIELD_PREP(RTW89_TXWD_BODY0_WD_PAGE, desc_info->wd_page) |
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FIELD_PREP(RTW89_TXWD_BODY0_FW_DL, desc_info->fw_dl);
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return cpu_to_le32(dword);
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}
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static __le32 rtw89_build_txwd_body1_v1(struct rtw89_tx_desc_info *desc_info)
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{
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u32 dword = FIELD_PREP(RTW89_TXWD_BODY1_ADDR_INFO_NUM, desc_info->addr_info_nr) |
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FIELD_PREP(RTW89_TXWD_BODY1_SEC_TYPE, desc_info->sec_type);
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return cpu_to_le32(dword);
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}
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static __le32 rtw89_build_txwd_body2(struct rtw89_tx_desc_info *desc_info)
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{
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u32 dword = FIELD_PREP(RTW89_TXWD_BODY2_TID_INDICATE, desc_info->tid_indicate) |
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@ -916,6 +936,14 @@ static __le32 rtw89_build_txwd_body3(struct rtw89_tx_desc_info *desc_info)
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return cpu_to_le32(dword);
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}
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static __le32 rtw89_build_txwd_body7_v1(struct rtw89_tx_desc_info *desc_info)
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{
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u32 dword = FIELD_PREP(RTW89_TXWD_BODY7_USE_RATE_V1, desc_info->use_rate) |
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FIELD_PREP(RTW89_TXWD_BODY7_DATA_RATE, desc_info->data_rate);
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return cpu_to_le32(dword);
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}
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static __le32 rtw89_build_txwd_info0(struct rtw89_tx_desc_info *desc_info)
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{
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u32 dword = FIELD_PREP(RTW89_TXWD_INFO0_USE_RATE, desc_info->use_rate) |
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@ -926,6 +954,13 @@ static __le32 rtw89_build_txwd_info0(struct rtw89_tx_desc_info *desc_info)
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return cpu_to_le32(dword);
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}
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static __le32 rtw89_build_txwd_info0_v1(struct rtw89_tx_desc_info *desc_info)
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{
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u32 dword = FIELD_PREP(RTW89_TXWD_INFO0_DISDATAFB, desc_info->dis_data_fb);
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return cpu_to_le32(dword);
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}
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static __le32 rtw89_build_txwd_info1(struct rtw89_tx_desc_info *desc_info)
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{
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u32 dword = FIELD_PREP(RTW89_TXWD_INFO1_MAX_AGGNUM, desc_info->ampdu_num) |
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@ -946,6 +981,15 @@ static __le32 rtw89_build_txwd_info2(struct rtw89_tx_desc_info *desc_info)
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return cpu_to_le32(dword);
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}
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static __le32 rtw89_build_txwd_info2_v1(struct rtw89_tx_desc_info *desc_info)
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{
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u32 dword = FIELD_PREP(RTW89_TXWD_INFO2_AMPDU_DENSITY, desc_info->ampdu_density) |
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FIELD_PREP(RTW89_TXWD_INFO2_FORCE_KEY_EN, desc_info->sec_en) |
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FIELD_PREP(RTW89_TXWD_INFO2_SEC_CAM_IDX, desc_info->sec_cam_idx);
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return cpu_to_le32(dword);
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}
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static __le32 rtw89_build_txwd_info4(struct rtw89_tx_desc_info *desc_info)
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{
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u32 dword = FIELD_PREP(RTW89_TXWD_INFO4_RTS_EN, 1) |
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@ -977,6 +1021,30 @@ void rtw89_core_fill_txdesc(struct rtw89_dev *rtwdev,
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}
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EXPORT_SYMBOL(rtw89_core_fill_txdesc);
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void rtw89_core_fill_txdesc_v1(struct rtw89_dev *rtwdev,
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struct rtw89_tx_desc_info *desc_info,
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void *txdesc)
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{
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struct rtw89_txwd_body_v1 *txwd_body = (struct rtw89_txwd_body_v1 *)txdesc;
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struct rtw89_txwd_info *txwd_info;
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txwd_body->dword0 = rtw89_build_txwd_body0_v1(desc_info);
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txwd_body->dword1 = rtw89_build_txwd_body1_v1(desc_info);
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txwd_body->dword2 = rtw89_build_txwd_body2(desc_info);
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txwd_body->dword3 = rtw89_build_txwd_body3(desc_info);
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txwd_body->dword7 = rtw89_build_txwd_body7_v1(desc_info);
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if (!desc_info->en_wd_info)
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return;
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txwd_info = (struct rtw89_txwd_info *)(txwd_body + 1);
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txwd_info->dword0 = rtw89_build_txwd_info0_v1(desc_info);
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txwd_info->dword1 = rtw89_build_txwd_info1(desc_info);
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txwd_info->dword2 = rtw89_build_txwd_info2_v1(desc_info);
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txwd_info->dword4 = rtw89_build_txwd_info4(desc_info);
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}
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EXPORT_SYMBOL(rtw89_core_fill_txdesc_v1);
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static __le32 rtw89_build_txwd_fwcmd0_v1(struct rtw89_tx_desc_info *desc_info)
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{
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u32 dword = FIELD_PREP(AX_RXD_RPKT_LEN_MASK, desc_info->pkt_size) |
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@ -642,6 +642,17 @@ struct rtw89_txwd_body {
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__le32 dword5;
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} __packed;
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struct rtw89_txwd_body_v1 {
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__le32 dword0;
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__le32 dword1;
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__le32 dword2;
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__le32 dword3;
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__le32 dword4;
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__le32 dword5;
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__le32 dword6;
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__le32 dword7;
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} __packed;
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struct rtw89_txwd_info {
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__le32 dword0;
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__le32 dword1;
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@ -2079,6 +2090,9 @@ struct rtw89_chip_ops {
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s8 pw_ofst, enum rtw89_mac_idx mac_idx);
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int (*pwr_on_func)(struct rtw89_dev *rtwdev);
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int (*pwr_off_func)(struct rtw89_dev *rtwdev);
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void (*fill_txdesc)(struct rtw89_dev *rtwdev,
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struct rtw89_tx_desc_info *desc_info,
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void *txdesc);
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void (*fill_txdesc_fwcmd)(struct rtw89_dev *rtwdev,
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struct rtw89_tx_desc_info *desc_info,
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void *txdesc);
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@ -2351,6 +2365,7 @@ struct rtw89_chip_info {
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u32 hci_func_en_addr;
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u32 h2c_desc_size;
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u32 txwd_body_size;
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u32 h2c_ctrl_reg;
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const u32 *h2c_regs;
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u32 c2h_ctrl_reg;
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@ -3514,6 +3529,16 @@ static inline void rtw89_ctrl_btg(struct rtw89_dev *rtwdev, bool btg)
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chip->ops->ctrl_btg(rtwdev, btg);
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}
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static inline
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void rtw89_chip_fill_txdesc(struct rtw89_dev *rtwdev,
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struct rtw89_tx_desc_info *desc_info,
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void *txdesc)
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{
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const struct rtw89_chip_info *chip = rtwdev->chip;
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chip->ops->fill_txdesc(rtwdev, desc_info, txdesc);
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}
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static inline
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void rtw89_chip_fill_txdesc_fwcmd(struct rtw89_dev *rtwdev,
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struct rtw89_tx_desc_info *desc_info,
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@ -3597,6 +3622,9 @@ void rtw89_core_tx_kick_off(struct rtw89_dev *rtwdev, u8 qsel);
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void rtw89_core_fill_txdesc(struct rtw89_dev *rtwdev,
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struct rtw89_tx_desc_info *desc_info,
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void *txdesc);
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void rtw89_core_fill_txdesc_v1(struct rtw89_dev *rtwdev,
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struct rtw89_tx_desc_info *desc_info,
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void *txdesc);
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void rtw89_core_fill_txdesc_fwcmd_v1(struct rtw89_dev *rtwdev,
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struct rtw89_tx_desc_info *desc_info,
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void *txdesc);
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@ -1035,8 +1035,8 @@ static int rtw89_pci_txwd_submit(struct rtw89_dev *rtwdev,
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struct rtw89_core_tx_request *tx_req)
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{
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struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv;
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const struct rtw89_chip_info *chip = rtwdev->chip;
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struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
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struct rtw89_txwd_body *txwd_body;
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struct rtw89_txwd_info *txwd_info;
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struct rtw89_pci_tx_wp_info *txwp_info;
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void *txaddr_info_addr;
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@ -1050,8 +1050,6 @@ static int rtw89_pci_txwd_submit(struct rtw89_dev *rtwdev,
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dma_addr_t dma;
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int ret;
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rtw89_core_fill_txdesc(rtwdev, desc_info, txwd->vaddr);
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dma = dma_map_single(&pdev->dev, skb->data, skb->len, DMA_TO_DEVICE);
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if (dma_mapping_error(&pdev->dev, dma)) {
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rtw89_err(rtwdev, "failed to map skb dma data\n");
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@ -1062,7 +1060,7 @@ static int rtw89_pci_txwd_submit(struct rtw89_dev *rtwdev,
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tx_data->dma = dma;
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txwp_len = sizeof(*txwp_info);
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txwd_len = sizeof(*txwd_body);
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txwd_len = chip->txwd_body_size;
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txwd_len += en_wd_info ? sizeof(*txwd_info) : 0;
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txwp_info = txwd->vaddr + txwd_len;
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@ -1079,6 +1077,8 @@ static int rtw89_pci_txwd_submit(struct rtw89_dev *rtwdev,
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txwd->len = txwd_len + txwp_len + txaddr_info_len;
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rtw89_chip_fill_txdesc(rtwdev, desc_info, txwd->vaddr);
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skb_queue_tail(&txwd->queue, skb);
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return 0;
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@ -2021,6 +2021,7 @@ static const struct rtw89_chip_ops rtw8852a_chip_ops = {
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.set_txpwr_ul_tb_offset = rtw8852a_set_txpwr_ul_tb_offset,
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.pwr_on_func = NULL,
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.pwr_off_func = NULL,
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.fill_txdesc = rtw89_core_fill_txdesc,
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.fill_txdesc_fwcmd = rtw89_core_fill_txdesc,
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.cfg_ctrl_path = rtw89_mac_cfg_ctrl_path,
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.mac_cfg_gnt = rtw89_mac_cfg_gnt,
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@ -2099,6 +2100,7 @@ const struct rtw89_chip_info rtw8852a_chip_info = {
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BIT(RTW89_PS_MODE_PWR_GATED),
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.hci_func_en_addr = R_AX_HCI_FUNC_EN,
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.h2c_desc_size = sizeof(struct rtw89_txwd_body),
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.txwd_body_size = sizeof(struct rtw89_txwd_body),
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.h2c_ctrl_reg = R_AX_H2CREG_CTRL,
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.h2c_regs = rtw8852a_h2c_regs,
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.c2h_ctrl_reg = R_AX_C2HREG_CTRL,
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@ -492,6 +492,7 @@ static const struct rtw89_chip_ops rtw8852c_chip_ops = {
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.set_txpwr_ul_tb_offset = rtw8852c_set_txpwr_ul_tb_offset,
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.pwr_on_func = rtw8852c_pwr_on_func,
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.pwr_off_func = rtw8852c_pwr_off_func,
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.fill_txdesc = rtw89_core_fill_txdesc_v1,
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.fill_txdesc_fwcmd = rtw89_core_fill_txdesc_fwcmd_v1,
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.cfg_ctrl_path = rtw89_mac_cfg_ctrl_path_v1,
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.mac_cfg_gnt = rtw89_mac_cfg_gnt_v1,
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@ -517,6 +518,7 @@ const struct rtw89_chip_info rtw8852c_chip_info = {
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.phycap_size = 0x60,
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.hci_func_en_addr = R_AX_HCI_FUNC_EN_V1,
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.h2c_desc_size = sizeof(struct rtw89_rxdesc_short),
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.txwd_body_size = sizeof(struct rtw89_txwd_body_v1),
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.h2c_ctrl_reg = R_AX_H2CREG_CTRL_V1,
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.h2c_regs = rtw8852c_h2c_regs,
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.c2h_ctrl_reg = R_AX_C2HREG_CTRL_V1,
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@ -24,6 +24,7 @@
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/* TX WD BODY DWORD 0 */
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#define RTW89_TXWD_BODY0_WP_OFFSET GENMASK(31, 24)
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#define RTW89_TXWD_BODY0_WP_OFFSET_V1 GENMASK(28, 24)
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#define RTW89_TXWD_BODY0_MORE_DATA BIT(23)
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#define RTW89_TXWD_BODY0_WD_INFO_EN BIT(22)
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#define RTW89_TXWD_BODY0_FW_DL BIT(20)
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@ -35,7 +36,9 @@
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#define RTW89_TXWD_BODY0_HW_SSN_MODE GENMASK(1, 0)
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/* TX WD BODY DWORD 1 */
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#define RTW89_TXWD_BODY1_ADDR_INFO_NUM GENMASK(31, 26)
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#define RTW89_TXWD_BODY1_PAYLOAD_ID GENMASK(31, 16)
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#define RTW89_TXWD_BODY1_SEC_TYPE GENMASK(3, 0)
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/* TX WD BODY DWORD 2 */
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#define RTW89_TXWD_BODY2_MACID GENMASK(30, 24)
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@ -52,6 +55,14 @@
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/* TX WD BODY DWORD 5 */
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/* TX WD BODY DWORD 6 (V1) */
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/* TX WD BODY DWORD 7 (V1) */
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#define RTW89_TXWD_BODY7_USE_RATE_V1 BIT(31)
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#define RTW89_TXWD_BODY7_DATA_BW GENMASK(29, 28)
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#define RTW89_TXWD_BODY7_GI_LTF GENMASK(27, 25)
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#define RTW89_TXWD_BODY7_DATA_RATE GENMASK(24, 16)
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/* TX WD INFO DWORD 0 */
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#define RTW89_TXWD_INFO0_USE_RATE BIT(30)
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#define RTW89_TXWD_INFO0_DATA_BW GENMASK(29, 28)
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@ -69,6 +80,7 @@
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#define RTW89_TXWD_INFO2_AMPDU_DENSITY GENMASK(20, 18)
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#define RTW89_TXWD_INFO2_SEC_TYPE GENMASK(12, 9)
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#define RTW89_TXWD_INFO2_SEC_HW_ENC BIT(8)
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#define RTW89_TXWD_INFO2_FORCE_KEY_EN BIT(8)
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#define RTW89_TXWD_INFO2_SEC_CAM_IDX GENMASK(7, 0)
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/* TX WD INFO DWORD 3 */
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