arm64: dts: qcom: sc7180: Add remoteproc enablers
Add scm, smem, smp2p, aoss-qmp, aoss-cc and pdc-global device nodes to SC7180 SoCs. Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20191218143332.29107-1-sibis@codeaurora.org [bjorn: Updated subject] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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@ -9,6 +9,9 @@
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#include <dt-bindings/clock/qcom,rpmh.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/phy/phy-qcom-qusb2.h>
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#include <dt-bindings/power/qcom-aoss-qmp.h>
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#include <dt-bindings/reset/qcom,sdm845-aoss.h>
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#include <dt-bindings/reset/qcom,sdm845-pdc.h>
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#include <dt-bindings/soc/qcom,rpmh-rsc.h>
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/ {
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@ -64,6 +67,10 @@
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aop_cmd_db_mem: memory@80820000 {
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reg = <0x0 0x80820000 0x0 0x20000>;
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compatible = "qcom,cmd-db";
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};
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smem_mem: memory@80900000 {
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reg = <0x0 0x80900000 0x0 0x200000>;
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no-map;
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};
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};
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@ -191,6 +198,92 @@
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interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;
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};
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firmware {
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scm {
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compatible = "qcom,scm-sc7180", "qcom,scm";
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};
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};
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tcsr_mutex: hwlock {
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compatible = "qcom,tcsr-mutex";
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syscon = <&tcsr_mutex_regs 0 0x1000>;
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#hwlock-cells = <1>;
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};
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smem {
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compatible = "qcom,smem";
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memory-region = <&smem_mem>;
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hwlocks = <&tcsr_mutex 3>;
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};
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smp2p-cdsp {
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compatible = "qcom,smp2p";
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qcom,smem = <94>, <432>;
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interrupts = <GIC_SPI 576 IRQ_TYPE_EDGE_RISING>;
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mboxes = <&apss_shared 6>;
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qcom,local-pid = <0>;
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qcom,remote-pid = <5>;
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cdsp_smp2p_out: master-kernel {
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qcom,entry-name = "master-kernel";
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#qcom,smem-state-cells = <1>;
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};
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cdsp_smp2p_in: slave-kernel {
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qcom,entry-name = "slave-kernel";
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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};
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smp2p-lpass {
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compatible = "qcom,smp2p";
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qcom,smem = <443>, <429>;
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interrupts = <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>;
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mboxes = <&apss_shared 10>;
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qcom,local-pid = <0>;
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qcom,remote-pid = <2>;
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adsp_smp2p_out: master-kernel {
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qcom,entry-name = "master-kernel";
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#qcom,smem-state-cells = <1>;
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};
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adsp_smp2p_in: slave-kernel {
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qcom,entry-name = "slave-kernel";
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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};
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smp2p-mpss {
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compatible = "qcom,smp2p";
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qcom,smem = <435>, <428>;
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interrupts = <GIC_SPI 451 IRQ_TYPE_EDGE_RISING>;
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mboxes = <&apss_shared 14>;
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qcom,local-pid = <0>;
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qcom,remote-pid = <1>;
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modem_smp2p_out: master-kernel {
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qcom,entry-name = "master-kernel";
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#qcom,smem-state-cells = <1>;
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};
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modem_smp2p_in: slave-kernel {
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qcom,entry-name = "slave-kernel";
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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};
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psci {
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compatible = "arm,psci-1.0";
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method = "smc";
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@ -642,6 +735,11 @@
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};
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};
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tcsr_mutex_regs: syscon@1f40000 {
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compatible = "syscon";
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reg = <0 0x01f40000 0 0x40000>;
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};
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tlmm: pinctrl@3500000 {
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compatible = "qcom,sc7180-pinctrl";
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reg = <0 0x03500000 0 0x300000>,
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@ -1053,6 +1151,12 @@
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interrupt-controller;
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};
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pdc_reset: reset-controller@b2e0000 {
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compatible = "qcom,sc7180-pdc-global", "qcom,sdm845-pdc-global";
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reg = <0 0x0b2e0000 0 0x20000>;
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#reset-cells = <1>;
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};
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tsens0: thermal-sensor@c263000 {
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compatible = "qcom,sc7180-tsens","qcom,tsens-v2";
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reg = <0 0x0c263000 0 0x1ff>, /* TM */
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@ -1073,6 +1177,22 @@
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#thermal-sensor-cells = <1>;
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};
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aoss_reset: reset-controller@c2a0000 {
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compatible = "qcom,sc7180-aoss-cc", "qcom,sdm845-aoss-cc";
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reg = <0 0x0c2a0000 0 0x31000>;
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#reset-cells = <1>;
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};
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aoss_qmp: qmp@c300000 {
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compatible = "qcom,sc7180-aoss-qmp";
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reg = <0 0x0c300000 0 0x100000>;
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interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
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mboxes = <&apss_shared 0>;
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#clock-cells = <0>;
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#power-domain-cells = <1>;
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};
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spmi_bus: spmi@c440000 {
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compatible = "qcom,spmi-pmic-arb";
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reg = <0 0x0c440000 0 0x1100>,
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@ -1200,6 +1320,12 @@
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};
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};
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apss_shared: mailbox@17c00000 {
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compatible = "qcom,sc7180-apss-shared";
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reg = <0 0x17c00000 0 0x10000>;
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#mbox-cells = <1>;
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};
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watchdog@17c10000 {
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compatible = "qcom,apss-wdt-sc7180", "qcom,kpss-wdt";
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reg = <0 0x17c10000 0 0x1000>;
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