irqchip: GICv3: rework redistributor structure
The basic GICv3 driver has almost no use for the redistributor (other than the basic per-CPU interrupts), but the ITS needs a lot more from them. As such, rework the set of data structures. The behaviour of the GICv3 driver is otherwise unaffected. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Link: https://lkml.kernel.org/r/1416839720-18400-4-git-send-email-marc.zyngier@arm.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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f5c1434c21
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@ -34,20 +34,25 @@
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#include "irq-gic-common.h"
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#include "irqchip.h"
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struct redist_region {
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void __iomem *redist_base;
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phys_addr_t phys_base;
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};
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struct gic_chip_data {
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void __iomem *dist_base;
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void __iomem **redist_base;
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void __iomem * __percpu *rdist;
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struct redist_region *redist_regions;
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struct rdists rdists;
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struct irq_domain *domain;
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u64 redist_stride;
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u32 redist_regions;
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u32 nr_redist_regions;
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unsigned int irq_nr;
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};
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static struct gic_chip_data gic_data __read_mostly;
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#define gic_data_rdist() (this_cpu_ptr(gic_data.rdist))
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#define gic_data_rdist_rd_base() (*gic_data_rdist())
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#define gic_data_rdist() (this_cpu_ptr(gic_data.rdists.rdist))
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#define gic_data_rdist_rd_base() (gic_data_rdist()->rd_base)
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#define gic_data_rdist_sgi_base() (gic_data_rdist_rd_base() + SZ_64K)
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/* Our default, arbitrary priority value. Linux only uses one anyway. */
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@ -333,8 +338,8 @@ static int gic_populate_rdist(void)
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MPIDR_AFFINITY_LEVEL(mpidr, 1) << 8 |
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MPIDR_AFFINITY_LEVEL(mpidr, 0));
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for (i = 0; i < gic_data.redist_regions; i++) {
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void __iomem *ptr = gic_data.redist_base[i];
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for (i = 0; i < gic_data.nr_redist_regions; i++) {
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void __iomem *ptr = gic_data.redist_regions[i].redist_base;
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u32 reg;
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reg = readl_relaxed(ptr + GICR_PIDR2) & GIC_PIDR2_ARCH_MASK;
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@ -347,10 +352,13 @@ static int gic_populate_rdist(void)
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do {
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typer = readq_relaxed(ptr + GICR_TYPER);
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if ((typer >> 32) == aff) {
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u64 offset = ptr - gic_data.redist_regions[i].redist_base;
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gic_data_rdist_rd_base() = ptr;
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pr_info("CPU%d: found redistributor %llx @%p\n",
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gic_data_rdist()->phys_base = gic_data.redist_regions[i].phys_base + offset;
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pr_info("CPU%d: found redistributor %llx region %d:%pa\n",
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smp_processor_id(),
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(unsigned long long)mpidr, ptr);
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(unsigned long long)mpidr,
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i, &gic_data_rdist()->phys_base);
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return 0;
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}
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@ -673,9 +681,10 @@ static const struct irq_domain_ops gic_irq_domain_ops = {
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static int __init gic_of_init(struct device_node *node, struct device_node *parent)
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{
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void __iomem *dist_base;
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void __iomem **redist_base;
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struct redist_region *rdist_regs;
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u64 redist_stride;
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u32 redist_regions;
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u32 nr_redist_regions;
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u32 typer;
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u32 reg;
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int gic_irqs;
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int err;
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@ -696,48 +705,54 @@ static int __init gic_of_init(struct device_node *node, struct device_node *pare
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goto out_unmap_dist;
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}
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if (of_property_read_u32(node, "#redistributor-regions", &redist_regions))
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redist_regions = 1;
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if (of_property_read_u32(node, "#redistributor-regions", &nr_redist_regions))
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nr_redist_regions = 1;
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redist_base = kzalloc(sizeof(*redist_base) * redist_regions, GFP_KERNEL);
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if (!redist_base) {
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rdist_regs = kzalloc(sizeof(*rdist_regs) * nr_redist_regions, GFP_KERNEL);
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if (!rdist_regs) {
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err = -ENOMEM;
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goto out_unmap_dist;
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}
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for (i = 0; i < redist_regions; i++) {
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redist_base[i] = of_iomap(node, 1 + i);
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if (!redist_base[i]) {
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for (i = 0; i < nr_redist_regions; i++) {
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struct resource res;
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int ret;
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ret = of_address_to_resource(node, 1 + i, &res);
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rdist_regs[i].redist_base = of_iomap(node, 1 + i);
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if (ret || !rdist_regs[i].redist_base) {
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pr_err("%s: couldn't map region %d\n",
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node->full_name, i);
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err = -ENODEV;
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goto out_unmap_rdist;
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}
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rdist_regs[i].phys_base = res.start;
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}
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if (of_property_read_u64(node, "redistributor-stride", &redist_stride))
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redist_stride = 0;
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gic_data.dist_base = dist_base;
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gic_data.redist_base = redist_base;
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gic_data.redist_regions = redist_regions;
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gic_data.redist_regions = rdist_regs;
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gic_data.nr_redist_regions = nr_redist_regions;
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gic_data.redist_stride = redist_stride;
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/*
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* Find out how many interrupts are supported.
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* The GIC only supports up to 1020 interrupt sources (SGI+PPI+SPI)
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*/
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gic_irqs = readl_relaxed(gic_data.dist_base + GICD_TYPER) & 0x1f;
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gic_irqs = (gic_irqs + 1) * 32;
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typer = readl_relaxed(gic_data.dist_base + GICD_TYPER);
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gic_data.rdists.id_bits = GICD_TYPER_ID_BITS(typer);
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gic_irqs = GICD_TYPER_IRQS(typer);
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if (gic_irqs > 1020)
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gic_irqs = 1020;
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gic_data.irq_nr = gic_irqs;
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gic_data.domain = irq_domain_add_tree(node, &gic_irq_domain_ops,
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&gic_data);
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gic_data.rdist = alloc_percpu(typeof(*gic_data.rdist));
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gic_data.rdists.rdist = alloc_percpu(typeof(*gic_data.rdists.rdist));
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if (WARN_ON(!gic_data.domain) || WARN_ON(!gic_data.rdist)) {
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if (WARN_ON(!gic_data.domain) || WARN_ON(!gic_data.rdists.rdist)) {
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err = -ENOMEM;
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goto out_free;
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}
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@ -754,12 +769,12 @@ static int __init gic_of_init(struct device_node *node, struct device_node *pare
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out_free:
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if (gic_data.domain)
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irq_domain_remove(gic_data.domain);
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free_percpu(gic_data.rdist);
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free_percpu(gic_data.rdists.rdist);
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out_unmap_rdist:
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for (i = 0; i < redist_regions; i++)
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if (redist_base[i])
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iounmap(redist_base[i]);
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kfree(redist_base);
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for (i = 0; i < nr_redist_regions; i++)
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if (rdist_regs[i].redist_base)
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iounmap(rdist_regs[i].redist_base);
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kfree(rdist_regs);
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out_unmap_dist:
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iounmap(dist_base);
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return err;
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@ -49,6 +49,10 @@
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#define GICD_CTLR_ENABLE_G1A (1U << 1)
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#define GICD_CTLR_ENABLE_G1 (1U << 0)
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#define GICD_TYPER_ID_BITS(typer) ((((typer) >> 19) & 0x1f) + 1)
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#define GICD_TYPER_IRQS(typer) ((((typer) & 0x1f) + 1) * 32)
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#define GICD_TYPER_LPIS (1U << 17)
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#define GICD_IROUTER_SPI_MODE_ONE (0U << 31)
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#define GICD_IROUTER_SPI_MODE_ANY (1U << 31)
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@ -189,6 +193,17 @@
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#include <linux/stringify.h>
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struct rdists {
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struct {
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void __iomem *rd_base;
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struct page *pend_page;
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phys_addr_t phys_base;
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} __percpu *rdist;
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struct page *prop_page;
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int id_bits;
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u64 flags;
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};
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static inline void gic_write_eoir(u64 irq)
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{
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asm volatile("msr_s " __stringify(ICC_EOIR1_EL1) ", %0" : : "r" (irq));
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