KVM: ppc: remove debug support broken by KVM debug rewrite
After the rewrite of KVM's debug support, this code doesn't even build any more. Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com> Signed-off-by: Avi Kivity <avi@redhat.com>
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269e05e485
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f5d0906b5b
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@ -111,11 +111,6 @@ struct kvm_arch {
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struct kvm_vcpu_arch {
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u32 host_stack;
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u32 host_pid;
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u32 host_dbcr0;
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u32 host_dbcr1;
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u32 host_dbcr2;
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u32 host_iac[4];
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u32 host_msr;
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u64 fpr[32];
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ulong gpr[32];
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@ -77,9 +77,6 @@ extern int kvmppc_core_vcpu_translate(struct kvm_vcpu *vcpu,
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extern void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu);
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extern void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu);
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extern void kvmppc_core_load_guest_debugstate(struct kvm_vcpu *vcpu);
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extern void kvmppc_core_load_host_debugstate(struct kvm_vcpu *vcpu);
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extern void kvmppc_core_deliver_interrupts(struct kvm_vcpu *vcpu);
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extern int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu);
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extern void kvmppc_core_queue_program(struct kvm_vcpu *vcpu);
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@ -28,72 +28,6 @@
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#include "44x_tlb.h"
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/* Note: clearing MSR[DE] just means that the debug interrupt will not be
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* delivered *immediately*. Instead, it simply sets the appropriate DBSR bits.
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* If those DBSR bits are still set when MSR[DE] is re-enabled, the interrupt
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* will be delivered as an "imprecise debug event" (which is indicated by
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* DBSR[IDE].
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*/
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static void kvm44x_disable_debug_interrupts(void)
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{
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mtmsr(mfmsr() & ~MSR_DE);
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}
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void kvmppc_core_load_host_debugstate(struct kvm_vcpu *vcpu)
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{
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kvm44x_disable_debug_interrupts();
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mtspr(SPRN_IAC1, vcpu->arch.host_iac[0]);
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mtspr(SPRN_IAC2, vcpu->arch.host_iac[1]);
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mtspr(SPRN_IAC3, vcpu->arch.host_iac[2]);
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mtspr(SPRN_IAC4, vcpu->arch.host_iac[3]);
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mtspr(SPRN_DBCR1, vcpu->arch.host_dbcr1);
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mtspr(SPRN_DBCR2, vcpu->arch.host_dbcr2);
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mtspr(SPRN_DBCR0, vcpu->arch.host_dbcr0);
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mtmsr(vcpu->arch.host_msr);
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}
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void kvmppc_core_load_guest_debugstate(struct kvm_vcpu *vcpu)
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{
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struct kvm_guest_debug *dbg = &vcpu->guest_debug;
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u32 dbcr0 = 0;
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vcpu->arch.host_msr = mfmsr();
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kvm44x_disable_debug_interrupts();
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/* Save host debug register state. */
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vcpu->arch.host_iac[0] = mfspr(SPRN_IAC1);
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vcpu->arch.host_iac[1] = mfspr(SPRN_IAC2);
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vcpu->arch.host_iac[2] = mfspr(SPRN_IAC3);
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vcpu->arch.host_iac[3] = mfspr(SPRN_IAC4);
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vcpu->arch.host_dbcr0 = mfspr(SPRN_DBCR0);
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vcpu->arch.host_dbcr1 = mfspr(SPRN_DBCR1);
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vcpu->arch.host_dbcr2 = mfspr(SPRN_DBCR2);
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/* set registers up for guest */
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if (dbg->bp[0]) {
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mtspr(SPRN_IAC1, dbg->bp[0]);
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dbcr0 |= DBCR0_IAC1 | DBCR0_IDM;
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}
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if (dbg->bp[1]) {
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mtspr(SPRN_IAC2, dbg->bp[1]);
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dbcr0 |= DBCR0_IAC2 | DBCR0_IDM;
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}
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if (dbg->bp[2]) {
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mtspr(SPRN_IAC3, dbg->bp[2]);
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dbcr0 |= DBCR0_IAC3 | DBCR0_IDM;
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}
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if (dbg->bp[3]) {
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mtspr(SPRN_IAC4, dbg->bp[3]);
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dbcr0 |= DBCR0_IAC4 | DBCR0_IDM;
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}
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mtspr(SPRN_DBCR0, dbcr0);
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mtspr(SPRN_DBCR1, 0);
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mtspr(SPRN_DBCR2, 0);
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}
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void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
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{
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kvmppc_44x_tlb_load(vcpu);
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@ -221,41 +221,18 @@ void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
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void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
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{
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if (vcpu->guest_debug.enabled)
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kvmppc_core_load_guest_debugstate(vcpu);
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kvmppc_core_vcpu_load(vcpu, cpu);
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}
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void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
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{
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if (vcpu->guest_debug.enabled)
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kvmppc_core_load_host_debugstate(vcpu);
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/* Don't leave guest TLB entries resident when being de-scheduled. */
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/* XXX It would be nice to differentiate between heavyweight exit and
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* sched_out here, since we could avoid the TLB flush for heavyweight
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* exits. */
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_tlbil_all();
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kvmppc_core_vcpu_put(vcpu);
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}
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int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
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struct kvm_guest_debug *dbg)
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{
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int i;
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vcpu->guest_debug.enabled = dbg->enabled;
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if (vcpu->guest_debug.enabled) {
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for (i=0; i < ARRAY_SIZE(vcpu->guest_debug.bp); i++) {
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if (dbg->breakpoints[i].enabled)
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vcpu->guest_debug.bp[i] = dbg->breakpoints[i].address;
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else
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vcpu->guest_debug.bp[i] = 0;
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}
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}
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return 0;
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return -EINVAL;
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}
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static void kvmppc_complete_dcr_load(struct kvm_vcpu *vcpu,
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