V4L/DVB (12304): cx23885: Remove hardcoded gpio bits from the encoder driver
The encoder driver has hardcoded GPIO bits set for the HVR1800, regardless of whether it's being used by a HVR1800 or not. I've implemented some generic GPIO manipulation routines and I'm calling them only when appropriate. Signed-off-by: Steven Toth <stoth@kernellabs.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
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@ -630,6 +630,39 @@ int mc417_memory_read(struct cx23885_dev *dev, u32 address, u32 *value)
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return retval;
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return retval;
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}
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}
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void mc417_gpio_set(struct cx23885_dev *dev, u32 mask)
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{
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u32 val;
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/* Set the gpio value */
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mc417_register_read(dev, 0x900C, &val);
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val |= (mask & 0x000ffff);
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mc417_register_write(dev, 0x900C, val);
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}
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void mc417_gpio_clear(struct cx23885_dev *dev, u32 mask)
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{
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u32 val;
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/* Clear the gpio value */
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mc417_register_read(dev, 0x900C, &val);
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val &= ~(mask & 0x0000ffff);
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mc417_register_write(dev, 0x900C, val);
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}
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void mc417_gpio_enable(struct cx23885_dev *dev, u32 mask, int asoutput)
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{
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u32 val;
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/* Enable GPIO direction bits */
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mc417_register_read(dev, 0x9020, &val);
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if (asoutput)
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val |= (mask & 0x0000ffff);
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else
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val &= ~(mask & 0x0000ffff);
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mc417_register_write(dev, 0x9020, val);
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}
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/* ------------------------------------------------------------------ */
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/* ------------------------------------------------------------------ */
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/* MPEG encoder API */
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/* MPEG encoder API */
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@ -955,25 +988,8 @@ static int cx23885_load_firmware(struct cx23885_dev *dev)
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retval |= mc417_register_write(dev, IVTV_REG_HW_BLOCKS,
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retval |= mc417_register_write(dev, IVTV_REG_HW_BLOCKS,
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IVTV_CMD_HW_BLOCKS_RST);
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IVTV_CMD_HW_BLOCKS_RST);
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/* Restore GPIO settings, make sure EIO14 is enabled as an output. */
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/* F/W power up disturbs the GPIOs, restore state */
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dprintk(2, "%s: GPIO output EIO 0-15 was = 0x%x\n",
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retval |= mc417_register_write(dev, 0x9020, gpio_output);
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__func__, gpio_output);
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/* Power-up seems to have GPIOs AFU. This was causing digital side
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* to fail at power-up. Seems GPIOs should be set to 0x10ff0411 at
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* power-up.
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* gpio_output |= (1<<14);
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*/
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/* Note: GPIO14 is specific to the HVR1800 here */
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gpio_output = 0x10ff0411 | (1<<14);
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retval |= mc417_register_write(dev, 0x9020, gpio_output | (1<<14));
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dprintk(2, "%s: GPIO output EIO 0-15 now = 0x%x\n",
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__func__, gpio_output);
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dprintk(1, "%s: GPIO value EIO 0-15 was = 0x%x\n",
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__func__, value);
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value |= (1<<14);
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dprintk(1, "%s: GPIO value EIO 0-15 now = 0x%x\n",
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__func__, value);
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retval |= mc417_register_write(dev, 0x900C, value);
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retval |= mc417_register_write(dev, 0x900C, value);
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retval |= mc417_register_read(dev, IVTV_REG_VPU, &value);
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retval |= mc417_register_read(dev, IVTV_REG_VPU, &value);
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@ -1788,9 +1804,6 @@ int cx23885_417_register(struct cx23885_dev *dev)
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return err;
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return err;
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}
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}
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/* Initialize MC417 registers */
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cx23885_mc417_init(dev);
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printk(KERN_INFO "%s: registered device video%d [mpeg]\n",
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printk(KERN_INFO "%s: registered device video%d [mpeg]\n",
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dev->name, dev->v4l_device->num);
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dev->name, dev->v4l_device->num);
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@ -582,6 +582,15 @@ void cx23885_gpio_setup(struct cx23885_dev *dev)
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/* CX23417 GPIO's */
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/* CX23417 GPIO's */
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/* EIO15 Zilog Reset */
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/* EIO15 Zilog Reset */
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/* EIO14 S5H1409/CX24227 Reset */
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/* EIO14 S5H1409/CX24227 Reset */
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mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
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/* Put the demod into reset and protect the eeprom */
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mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
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mdelay(100);
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/* Bring the demod and blaster out of reset */
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mc417_gpio_set(dev, GPIO_15 | GPIO_14);
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mdelay(100);
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/* Force the TDA8295A into reset and back */
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/* Force the TDA8295A into reset and back */
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cx_set(GP0_IO, 0x00040004);
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cx_set(GP0_IO, 0x00040004);
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@ -868,6 +868,14 @@ static int cx23885_dev_setup(struct cx23885_dev *dev)
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dprintk(1, "%s() radio_type = 0x%x radio_addr = 0x%x\n",
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dprintk(1, "%s() radio_type = 0x%x radio_addr = 0x%x\n",
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__func__, dev->radio_type, dev->radio_addr);
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__func__, dev->radio_type, dev->radio_addr);
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/* The cx23417 encoder has GPIO's that need to be initialised
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* before DVB, so that demodulators and tuners are out of
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* reset before DVB uses them.
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*/
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if ((cx23885_boards[dev->board].portb == CX23885_MPEG_ENCODER) ||
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(cx23885_boards[dev->board].portc == CX23885_MPEG_ENCODER))
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cx23885_mc417_init(dev);
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/* init hardware */
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/* init hardware */
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cx23885_reset(dev);
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cx23885_reset(dev);
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@ -88,6 +88,12 @@
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#define GPIO_7 0x00000080
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#define GPIO_7 0x00000080
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#define GPIO_8 0x00000100
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#define GPIO_8 0x00000100
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#define GPIO_9 0x00000200
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#define GPIO_9 0x00000200
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#define GPIO_10 0x00000400
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#define GPIO_11 0x00000800
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#define GPIO_12 0x00001000
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#define GPIO_13 0x00002000
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#define GPIO_14 0x00004000
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#define GPIO_15 0x00008000
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/* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */
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/* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */
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#define CX23885_NORMS (\
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#define CX23885_NORMS (\
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@ -505,6 +511,9 @@ extern void cx23885_417_check_encoder(struct cx23885_dev *dev);
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extern void cx23885_mc417_init(struct cx23885_dev *dev);
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extern void cx23885_mc417_init(struct cx23885_dev *dev);
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extern int mc417_memory_read(struct cx23885_dev *dev, u32 address, u32 *value);
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extern int mc417_memory_read(struct cx23885_dev *dev, u32 address, u32 *value);
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extern int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value);
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extern int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value);
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extern void mc417_gpio_set(struct cx23885_dev *dev, u32 mask);
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extern void mc417_gpio_clear(struct cx23885_dev *dev, u32 mask);
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extern void mc417_gpio_enable(struct cx23885_dev *dev, u32 mask, int asoutput);
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/* ----------------------------------------------------------- */
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/* ----------------------------------------------------------- */
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