MIPS: microMIPS: Support dynamic ASID sizing.
Changes for pure microMIPS cores to dynamically determine the ASID size at boot time. Includes bug fix https://patchwork.linux-mips.org/patch/5230/ Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com> Signed-off-by: Jonas Gorski <jogo@openwrt.org>
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@ -309,13 +309,32 @@ static int check_for_high_segbits __cpuinitdata;
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static void __cpuinit insn_fixup(unsigned int **start, unsigned int **stop,
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unsigned int i_const)
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{
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unsigned int **p, *ip;
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unsigned int **p;
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for (p = start; p < stop; p++) {
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#ifndef CONFIG_CPU_MICROMIPS
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unsigned int *ip;
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ip = *p;
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*ip = (*ip & 0xffff0000) | i_const;
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#else
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unsigned short *ip;
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ip = ((unsigned short *)((unsigned int)*p - 1));
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if ((*ip & 0xf000) == 0x4000) {
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*ip &= 0xfff1;
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*ip |= (i_const << 1);
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} else if ((*ip & 0xf000) == 0x6000) {
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*ip &= 0xfff1;
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*ip |= ((i_const >> 2) << 1);
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} else {
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ip++;
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*ip = i_const;
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}
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#endif
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local_flush_icache_range((unsigned long)ip,
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(unsigned long)ip + sizeof(*ip));
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}
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local_flush_icache_range((unsigned long)*p, (unsigned long)((*p) + 1));
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}
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#define asid_insn_fixup(section, const) \
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@ -335,6 +354,14 @@ static void __cpuinit setup_asid(unsigned int inc, unsigned int mask,
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extern asmlinkage void handle_ri_rdhwr_vivt(void);
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unsigned long *vivt_exc;
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#ifdef CONFIG_CPU_MICROMIPS
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/*
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* Worst case optimised microMIPS addiu instructions support
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* only a 3-bit immediate value.
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*/
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if(inc > 7)
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panic("Invalid ASID increment value!");
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#endif
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asid_insn_fixup(__asid_inc, inc);
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asid_insn_fixup(__asid_mask, mask);
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asid_insn_fixup(__asid_version_mask, version_mask);
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@ -342,6 +369,9 @@ static void __cpuinit setup_asid(unsigned int inc, unsigned int mask,
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/* Patch up the 'handle_ri_rdhwr_vivt' handler. */
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vivt_exc = (unsigned long *) &handle_ri_rdhwr_vivt;
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#ifdef CONFIG_CPU_MICROMIPS
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vivt_exc = (unsigned long *)((unsigned long) vivt_exc - 1);
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#endif
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vivt_exc++;
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*vivt_exc = (*vivt_exc & ~mask) | mask;
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