ARM: OMAP2+: dma: Define dma capabilities register bitfields and use them.
The system dma module has capabiities register indicating the support for descriptor loading, constant fill, etc. Use this instead of OMAP revision check to identify the features supported runtime. This avoids patching the code for feature SOCs which has those capabilities. Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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@ -227,10 +227,6 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
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dma_stride = OMAP2_DMA_STRIDE;
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dma_stride = OMAP2_DMA_STRIDE;
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dma_common_ch_start = CSDP;
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dma_common_ch_start = CSDP;
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if (cpu_is_omap3630() || cpu_is_omap44xx())
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dma_common_ch_end = CCDN;
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else
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dma_common_ch_end = CCFN;
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p = kzalloc(sizeof(struct omap_system_dma_plat_info), GFP_KERNEL);
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p = kzalloc(sizeof(struct omap_system_dma_plat_info), GFP_KERNEL);
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if (!p) {
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if (!p) {
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@ -277,6 +273,13 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
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dev_err(&pdev->dev, "%s: kzalloc fail\n", __func__);
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dev_err(&pdev->dev, "%s: kzalloc fail\n", __func__);
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return -ENOMEM;
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return -ENOMEM;
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}
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}
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/* Check the capabilities register for descriptor loading feature */
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if (dma_read(CAPS_0, 0) & DMA_HAS_DESCRIPTOR_CAPS)
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dma_common_ch_end = CCDN;
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else
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dma_common_ch_end = CCFN;
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return 0;
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return 0;
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}
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}
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@ -312,6 +312,11 @@
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#define CLEAR_CSR_ON_READ BIT(0xC)
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#define CLEAR_CSR_ON_READ BIT(0xC)
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#define IS_WORD_16 BIT(0xD)
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#define IS_WORD_16 BIT(0xD)
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/* Defines for DMA Capabilities */
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#define DMA_HAS_TRANSPARENT_CAPS (0x1 << 18)
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#define DMA_HAS_CONSTANT_FILL_CAPS (0x1 << 19)
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#define DMA_HAS_DESCRIPTOR_CAPS (0x3 << 20)
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enum omap_reg_offsets {
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enum omap_reg_offsets {
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GCR, GSCR, GRST1, HW_ID,
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GCR, GSCR, GRST1, HW_ID,
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