x86: entry_64.S: fold SAVE_ARGS_IRQ macro into its sole user
No code changes. This is a preparatory patch for change in "struct pt_regs" handling. CC: Linus Torvalds <torvalds@linux-foundation.org> CC: Oleg Nesterov <oleg@redhat.com> CC: "H. Peter Anvin" <hpa@zytor.com> CC: Andy Lutomirski <luto@amacapital.net> CC: Frederic Weisbecker <fweisbec@gmail.com> CC: X86 ML <x86@kernel.org> CC: Alexei Starovoitov <ast@plumgrid.com> CC: Will Drewry <wad@chromium.org> CC: Kees Cook <keescook@chromium.org> CC: linux-kernel@vger.kernel.org Signed-off-by: Denys Vlasenko <dvlasenk@redhat.com> Signed-off-by: Andy Lutomirski <luto@amacapital.net>
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@ -217,51 +217,6 @@ ENDPROC(native_usergs_sysret64)
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CFI_REL_OFFSET r15, R15+\offset
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.endm
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/* save partial stack frame */
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.macro SAVE_ARGS_IRQ
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cld
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/* start from rbp in pt_regs and jump over */
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movq_cfi rdi, (RDI-RBP)
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movq_cfi rsi, (RSI-RBP)
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movq_cfi rdx, (RDX-RBP)
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movq_cfi rcx, (RCX-RBP)
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movq_cfi rax, (RAX-RBP)
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movq_cfi r8, (R8-RBP)
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movq_cfi r9, (R9-RBP)
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movq_cfi r10, (R10-RBP)
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movq_cfi r11, (R11-RBP)
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/* Save rbp so that we can unwind from get_irq_regs() */
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movq_cfi rbp, 0
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/* Save previous stack value */
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movq %rsp, %rsi
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leaq -RBP(%rsp),%rdi /* arg1 for handler */
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testl $3, CS-RBP(%rsi)
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je 1f
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SWAPGS
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/*
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* irq_count is used to check if a CPU is already on an interrupt stack
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* or not. While this is essentially redundant with preempt_count it is
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* a little cheaper to use a separate counter in the PDA (short of
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* moving irq_enter into assembly, which would be too much work)
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*/
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1: incl PER_CPU_VAR(irq_count)
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cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp
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CFI_DEF_CFA_REGISTER rsi
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/* Store previous stack value */
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pushq %rsi
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CFI_ESCAPE 0x0f /* DW_CFA_def_cfa_expression */, 6, \
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0x77 /* DW_OP_breg7 */, 0, \
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0x06 /* DW_OP_deref */, \
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0x08 /* DW_OP_const1u */, SS+8-RBP, \
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0x22 /* DW_OP_plus */
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/* We entered an interrupt context - irqs are off: */
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TRACE_IRQS_OFF
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.endm
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ENTRY(save_paranoid)
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XCPT_FRAME 1 RDI+8
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cld
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@ -745,7 +700,48 @@ END(interrupt)
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/* reserve pt_regs for scratch regs and rbp */
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subq $ORIG_RAX-RBP, %rsp
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CFI_ADJUST_CFA_OFFSET ORIG_RAX-RBP
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SAVE_ARGS_IRQ
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cld
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/* start from rbp in pt_regs and jump over */
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movq_cfi rdi, (RDI-RBP)
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movq_cfi rsi, (RSI-RBP)
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movq_cfi rdx, (RDX-RBP)
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movq_cfi rcx, (RCX-RBP)
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movq_cfi rax, (RAX-RBP)
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movq_cfi r8, (R8-RBP)
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movq_cfi r9, (R9-RBP)
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movq_cfi r10, (R10-RBP)
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movq_cfi r11, (R11-RBP)
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/* Save rbp so that we can unwind from get_irq_regs() */
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movq_cfi rbp, 0
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/* Save previous stack value */
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movq %rsp, %rsi
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leaq -RBP(%rsp),%rdi /* arg1 for handler */
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testl $3, CS-RBP(%rsi)
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je 1f
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SWAPGS
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/*
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* irq_count is used to check if a CPU is already on an interrupt stack
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* or not. While this is essentially redundant with preempt_count it is
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* a little cheaper to use a separate counter in the PDA (short of
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* moving irq_enter into assembly, which would be too much work)
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*/
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1: incl PER_CPU_VAR(irq_count)
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cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp
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CFI_DEF_CFA_REGISTER rsi
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/* Store previous stack value */
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pushq %rsi
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CFI_ESCAPE 0x0f /* DW_CFA_def_cfa_expression */, 6, \
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0x77 /* DW_OP_breg7 */, 0, \
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0x06 /* DW_OP_deref */, \
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0x08 /* DW_OP_const1u */, SS+8-RBP, \
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0x22 /* DW_OP_plus */
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/* We entered an interrupt context - irqs are off: */
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TRACE_IRQS_OFF
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call \func
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.endm
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