drm/i915: i2c: unconditionally set up gpio fallback
This way we can simplify the setup and teardown a bit. Because we don't actually allocate anything anymore for the force_bit case, we can now convert that into a boolean. Also and the functionality supported by the bit-banging together with what gmbus can do, so that this doesn't randomly change any more. v2: Chris Wilson noticed that I've mixed up && and & ... v3: Clarify an if block as suggested by Eugeni Dodonov. Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -301,7 +301,8 @@ struct intel_fbc_work;
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struct intel_gmbus {
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struct i2c_adapter adapter;
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struct i2c_adapter *force_bit;
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bool force_bit;
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bool has_gpio;
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u32 reg0;
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u32 gpio_reg;
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struct i2c_algo_bit_data bit_algo;
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@ -140,8 +140,8 @@ static void set_data(void *data, int state_high)
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POSTING_READ(bus->gpio_reg);
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}
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static struct i2c_adapter *
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intel_gpio_create(struct intel_gmbus *bus, u32 pin)
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static bool
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intel_gpio_setup(struct intel_gmbus *bus, u32 pin)
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{
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struct drm_i915_private *dev_priv = bus->dev_priv;
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static const int map_pin_to_reg[] = {
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@ -157,7 +157,7 @@ intel_gpio_create(struct intel_gmbus *bus, u32 pin)
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struct i2c_algo_bit_data *algo;
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if (pin >= ARRAY_SIZE(map_pin_to_reg) || !map_pin_to_reg[pin])
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return NULL;
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return false;
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algo = &bus->bit_algo;
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@ -174,12 +174,11 @@ intel_gpio_create(struct intel_gmbus *bus, u32 pin)
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algo->timeout = usecs_to_jiffies(2200);
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algo->data = bus;
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return &bus->adapter;
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return true;
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}
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static int
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intel_i2c_quirk_xfer(struct intel_gmbus *bus,
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struct i2c_adapter *adapter,
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struct i2c_msg *msgs,
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int num)
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{
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@ -193,7 +192,7 @@ intel_i2c_quirk_xfer(struct intel_gmbus *bus,
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set_clock(bus, 1);
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udelay(I2C_RISEFALL_TIME);
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ret = i2c_bit_algo.master_xfer(adapter, msgs, num);
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ret = i2c_bit_algo.master_xfer(&bus->adapter, msgs, num);
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set_data(bus, 1);
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set_clock(bus, 1);
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@ -216,7 +215,7 @@ gmbus_xfer(struct i2c_adapter *adapter,
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mutex_lock(&dev_priv->gmbus_mutex);
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if (bus->force_bit) {
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ret = intel_i2c_quirk_xfer(bus, bus->force_bit, msgs, num);
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ret = intel_i2c_quirk_xfer(bus, msgs, num);
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goto out;
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}
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@ -316,11 +315,12 @@ timeout:
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I915_WRITE(GMBUS0 + reg_offset, 0);
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/* Hardware may not support GMBUS over these pins? Try GPIO bitbanging instead. */
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bus->force_bit = intel_gpio_create(bus, bus->reg0 & 0xff);
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if (!bus->force_bit)
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ret = -ENOMEM;
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else
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ret = intel_i2c_quirk_xfer(bus, bus->force_bit, msgs, num);
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if (!bus->has_gpio) {
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ret = -EIO;
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} else {
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bus->force_bit = true;
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ret = intel_i2c_quirk_xfer(bus, msgs, num);
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}
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out:
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mutex_unlock(&dev_priv->gmbus_mutex);
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return ret;
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@ -328,14 +328,8 @@ out:
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static u32 gmbus_func(struct i2c_adapter *adapter)
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{
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struct intel_gmbus *bus = container_of(adapter,
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struct intel_gmbus,
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adapter);
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if (bus->force_bit)
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i2c_bit_algo.functionality(bus->force_bit);
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return (I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL |
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return i2c_bit_algo.functionality(adapter) &
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(I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL |
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/* I2C_FUNC_10BIT_ADDR | */
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I2C_FUNC_SMBUS_READ_BLOCK_DATA |
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I2C_FUNC_SMBUS_BLOCK_PROC_CALL);
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@ -393,8 +387,11 @@ int intel_setup_gmbus(struct drm_device *dev)
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/* By default use a conservative clock rate */
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bus->reg0 = i | GMBUS_RATE_100KHZ;
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bus->has_gpio = intel_gpio_setup(bus, i);
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/* XXX force bit banging until GMBUS is fully debugged */
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bus->force_bit = intel_gpio_create(bus, i);
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if (bus->has_gpio)
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bus->force_bit = true;
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}
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intel_i2c_reset(dev_priv->dev);
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@ -422,16 +419,8 @@ void intel_gmbus_force_bit(struct i2c_adapter *adapter, bool force_bit)
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{
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struct intel_gmbus *bus = to_intel_gmbus(adapter);
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if (force_bit) {
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if (bus->force_bit == NULL) {
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bus->force_bit = intel_gpio_create(bus,
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bus->reg0 & 0xff);
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}
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} else {
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if (bus->force_bit) {
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bus->force_bit = NULL;
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}
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}
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if (bus->has_gpio)
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bus->force_bit = force_bit;
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}
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void intel_teardown_gmbus(struct drm_device *dev)
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